1 /* $NetBSD: ifpga_pci.c,v 1.2 2002/01/30 03:59:41 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1997,1998 Mark Brinicombe. 32 * Copyright (c) 1997,1998 Causality Limited 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. All advertising materials mentioning features or use of this software 44 * must display the following acknowledgement: 45 * This product includes software developed by Mark Brinicombe 46 * for the NetBSD Project. 47 * 4. The name of the company nor the name of the author may be used to 48 * endorse or promote products derived from this software without specific 49 * prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 52 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 53 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 55 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 56 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 58 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 59 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 60 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 61 * SUCH DAMAGE. 62 */ 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/conf.h> 67 #include <sys/malloc.h> 68 #include <sys/device.h> 69 70 #define _ARM32_BUS_DMA_PRIVATE 71 #include <evbarm/integrator/int_bus_dma.h> 72 73 #include <machine/intr.h> 74 #include <evbarm/ifpga/irqhandler.h> /* XXX XXX XXX */ 75 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcivar.h> 78 79 #include <evbarm/ifpga/ifpgareg.h> 80 #include <evbarm/ifpga/ifpgamem.h> 81 #include <evbarm/ifpga/ifpga_pcivar.h> 82 #include <evbarm/dev/v360reg.h> 83 84 85 void ifpga_pci_attach_hook (struct device *, struct device *, 86 struct pcibus_attach_args *); 87 int ifpga_pci_bus_maxdevs (void *, int); 88 pcitag_t ifpga_pci_make_tag (void *, int, int, int); 89 void ifpga_pci_decompose_tag (void *, pcitag_t, int *, int *, 90 int *); 91 pcireg_t ifpga_pci_conf_read (void *, pcitag_t, int); 92 void ifpga_pci_conf_write (void *, pcitag_t, int, pcireg_t); 93 int ifpga_pci_intr_map (struct pci_attach_args *, 94 pci_intr_handle_t *); 95 const char *ifpga_pci_intr_string (void *, pci_intr_handle_t); 96 const struct evcnt *ifpga_pci_intr_evcnt (void *, pci_intr_handle_t); 97 void *ifpga_pci_intr_establish (void *, pci_intr_handle_t, int, 98 int (*)(void *), void *); 99 void ifpga_pci_intr_disestablish (void *, void *); 100 101 struct arm32_pci_chipset ifpga_pci_chipset = { 102 NULL, /* conf_v */ 103 ifpga_pci_attach_hook, 104 ifpga_pci_bus_maxdevs, 105 ifpga_pci_make_tag, 106 ifpga_pci_decompose_tag, 107 ifpga_pci_conf_read, 108 ifpga_pci_conf_write, 109 NULL, /* intr_v */ 110 ifpga_pci_intr_map, 111 ifpga_pci_intr_string, 112 ifpga_pci_intr_evcnt, 113 ifpga_pci_intr_establish, 114 ifpga_pci_intr_disestablish 115 }; 116 117 /* 118 * Use the integrator-specific bus_dma routines. 119 */ 120 struct arm32_bus_dma_tag ifpga_pci_bus_dma_tag = { 121 0, 122 0, 123 _bus_dmamap_create, 124 _bus_dmamap_destroy, 125 integrator_bus_dmamap_load, 126 integrator_bus_dmamap_load_mbuf, 127 integrator_bus_dmamap_load_uio, 128 _bus_dmamap_load_raw, 129 _bus_dmamap_unload, 130 _bus_dmamap_sync, 131 integrator_bus_dmamem_alloc, 132 integrator_bus_dmamem_free, 133 integrator_bus_dmamem_map, 134 _bus_dmamem_unmap, 135 integrator_bus_dmamem_mmap, 136 }; 137 138 /* 139 * Currently we only support 12 devices as we select directly in the 140 * type 0 config cycle 141 * (See conf_{read,write} for more detail 142 */ 143 #define MAX_PCI_DEVICES 21 144 145 /*static int 146 pci_intr(void *arg) 147 { 148 printf("pci int %x\n", (int)arg); 149 return 0; 150 }*/ 151 152 153 void 154 ifpga_pci_attach_hook(struct device *parent, struct device *self, 155 struct pcibus_attach_args *pba) 156 { 157 #ifdef PCI_DEBUG 158 printf("ifpga_pci_attach_hook()\n"); 159 #endif 160 } 161 162 int 163 ifpga_pci_bus_maxdevs(void *pcv, int busno) 164 { 165 #ifdef PCI_DEBUG 166 printf("ifpga_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno); 167 #endif 168 return MAX_PCI_DEVICES; 169 } 170 171 pcitag_t 172 ifpga_pci_make_tag(void *pcv, int bus, int device, int function) 173 { 174 #ifdef PCI_DEBUG 175 printf("ifpga_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n", 176 pcv, bus, device, function); 177 #endif 178 return (bus << 16) | (device << 11) | (function << 8); 179 } 180 181 void 182 ifpga_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep, 183 int *functionp) 184 { 185 #ifdef PCI_DEBUG 186 printf("ifpga_pci_decompose_tag(pcv=%p, tag=0x%08lx, bp=%p, dp=%p, " 187 "fp=%p)\n", pcv, tag, busp, devicep, functionp); 188 #endif 189 190 if (busp != NULL) 191 *busp = (tag >> 16) & 0xff; 192 if (devicep != NULL) 193 *devicep = (tag >> 11) & 0x1f; 194 if (functionp != NULL) 195 *functionp = (tag >> 8) & 0x7; 196 } 197 198 pcireg_t 199 ifpga_pci_conf_read(void *pcv, pcitag_t tag, int reg) 200 { 201 pcireg_t data; 202 struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv; 203 int bus, device, function; 204 u_int address; 205 206 ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function); 207 208 /* Reset the appertures so that we can talk to the register space. */ 209 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 210 IFPGA_PCI_APP0_512MB_BASE); 211 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 212 IFPGA_PCI_APP1_CONF_BASE); 213 214 if (bus == 0) { 215 address = (1 << (device + 11)) | reg; 216 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 217 IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00)); 218 219 /* Read the value from the bus... */ 220 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh, 221 address & 0x00ffffff); 222 223 } else { 224 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 225 IFPGA_PCI_APP1_CONF_T1_MAP); 226 227 /* Read the value from the bus... */ 228 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh, 229 tag | reg); 230 } 231 /* ... and put the memory spaces back again. */ 232 233 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 234 IFPGA_PCI_APP1_256MB_BASE); 235 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 236 IFPGA_PCI_APP1_256MB_MAP); 237 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 238 IFPGA_PCI_APP0_256MB_BASE); 239 #ifdef PCI_DEBUG 240 printf("ifpga_pci_conf_read(pcv=%p tag=0x%08lx reg=0x%02x)=0x%08x\n", 241 pcv, tag, reg, data); 242 #endif 243 return data; 244 } 245 246 void 247 ifpga_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data) 248 { 249 struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv; 250 int bus, device, function; 251 u_int address; 252 253 #ifdef PCI_DEBUG 254 printf("ifpga_pci_conf_write(pcv=%p tag=0x%08lx reg=0x%02x, 0x%08x)\n", 255 pcv, tag, reg, data); 256 #endif 257 258 ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function); 259 260 /* Reset the appertures so that we can talk to the register space. */ 261 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 262 IFPGA_PCI_APP0_512MB_BASE); 263 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 264 IFPGA_PCI_APP1_CONF_BASE); 265 266 if (bus == 0) { 267 address = (1 << (device + 11)) | reg; 268 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 269 IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00)); 270 271 /* Read the value from the bus... */ 272 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, 273 address & 0x00ffffff, data); 274 275 } else { 276 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 277 IFPGA_PCI_APP1_CONF_T1_MAP); 278 279 /* Read the value from the bus... */ 280 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, tag | reg, 281 data); 282 } 283 /* ... and put the memory spaces back again. */ 284 285 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 286 IFPGA_PCI_APP1_256MB_BASE); 287 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 288 IFPGA_PCI_APP1_256MB_MAP); 289 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 290 IFPGA_PCI_APP0_256MB_BASE); 291 } 292 293 int 294 ifpga_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 295 { 296 int line = pa->pa_intrline; 297 298 #ifdef PCI_DEBUG 299 int pin = pa->pa_intrpin; 300 void *pcv = pa->pa_pc; 301 pcitag_t intrtag = pa->pa_intrtag; 302 int bus, device, function; 303 304 ifpga_pci_decompose_tag(pcv, intrtag, &bus, &device, &function); 305 printf("ifpga_pci_intr_map: pcv=%p, tag=%08lx pin=%d line=%d " 306 "dev=%d\n", pcv, intrtag, pin, line, device); 307 #endif 308 309 310 #ifdef PCI_DEBUG 311 printf("pin %d, line %d mapped to int %d\n", pin, line, line); 312 #endif 313 314 *ihp = line; 315 return 0; 316 } 317 318 const char * 319 ifpga_pci_intr_string(void *pcv, pci_intr_handle_t ih) 320 { 321 static char irqstr[12]; /* 6 + 1 + NULL + sanity */ 322 323 #ifdef PCI_DEBUG 324 printf("ifpga_pci_intr_string(pcv=0x%p, ih=0x%lx)\n", pcv, ih); 325 #endif 326 if (ih == 0) 327 panic("ifpga_pci_intr_string: bogus handle 0x%lx\n", ih); 328 329 sprintf(irqstr, "pciint%ld", ih - IFPGA_INTRNUM_PCIINT0); 330 return irqstr; 331 } 332 333 const struct evcnt * 334 ifpga_pci_intr_evcnt(void *pcv, pci_intr_handle_t ih) 335 { 336 337 /* XXX for now, no evcnt parent reported */ 338 return NULL; 339 } 340 341 void * 342 ifpga_pci_intr_establish(void *pcv, pci_intr_handle_t ih, int level, 343 int (*func) (void *), void *arg) 344 { 345 void *intr; 346 int length; 347 char *string; 348 349 #ifdef PCI_DEBUG 350 printf("ifpga_pci_intr_establish(pcv=%p, ih=0x%lx, level=%d, " 351 "func=%p, arg=%p)\n", pcv, ih, level, func, arg); 352 #endif 353 354 /* Copy the interrupt string to a private buffer */ 355 length = strlen(ifpga_pci_intr_string(pcv, ih)); 356 string = malloc(length + 1, M_DEVBUF, M_WAITOK); 357 strcpy(string, ifpga_pci_intr_string(pcv, ih)); 358 intr = intr_claim(ih, level, string, func, arg); 359 360 return intr; 361 } 362 363 void 364 ifpga_pci_intr_disestablish(void *pcv, void *cookie) 365 { 366 #ifdef PCI_DEBUG 367 printf("ifpga_pci_intr_disestablish(pcv=%p, cookie=%p)\n", 368 pcv, cookie); 369 #endif 370 /* XXXX Need to free the string */ 371 372 intr_release(cookie); 373 } 374