1 /* $NetBSD: ifpga_pci.c,v 1.19 2015/10/02 05:22:50 msaitoh Exp $ */ 2 3 /* 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1997,1998 Mark Brinicombe. 32 * Copyright (c) 1997,1998 Causality Limited 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. All advertising materials mentioning features or use of this software 44 * must display the following acknowledgement: 45 * This product includes software developed by Mark Brinicombe 46 * for the NetBSD Project. 47 * 4. The name of the company nor the name of the author may be used to 48 * endorse or promote products derived from this software without specific 49 * prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 52 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 53 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 55 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 56 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 57 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 58 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 59 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 60 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 61 * SUCH DAMAGE. 62 */ 63 64 #define _ARM32_BUS_DMA_PRIVATE 65 66 #include <sys/cdefs.h> 67 __KERNEL_RCSID(0, "$NetBSD: ifpga_pci.c,v 1.19 2015/10/02 05:22:50 msaitoh Exp $"); 68 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/conf.h> 72 #include <sys/malloc.h> 73 #include <sys/device.h> 74 75 #include <evbarm/integrator/int_bus_dma.h> 76 77 #include <machine/intr.h> 78 79 #include <dev/pci/pcireg.h> 80 #include <dev/pci/pcivar.h> 81 82 #include <evbarm/ifpga/ifpgareg.h> 83 #include <evbarm/ifpga/ifpgamem.h> 84 #include <evbarm/ifpga/ifpga_pcivar.h> 85 #include <evbarm/dev/v360reg.h> 86 87 88 void ifpga_pci_attach_hook (device_t, device_t, 89 struct pcibus_attach_args *); 90 int ifpga_pci_bus_maxdevs (void *, int); 91 pcitag_t ifpga_pci_make_tag (void *, int, int, int); 92 void ifpga_pci_decompose_tag (void *, pcitag_t, int *, int *, 93 int *); 94 pcireg_t ifpga_pci_conf_read (void *, pcitag_t, int); 95 void ifpga_pci_conf_write (void *, pcitag_t, int, pcireg_t); 96 int ifpga_pci_intr_map (const struct pci_attach_args *, 97 pci_intr_handle_t *); 98 const char *ifpga_pci_intr_string (void *, pci_intr_handle_t, char *, size_t); 99 const struct evcnt *ifpga_pci_intr_evcnt (void *, pci_intr_handle_t); 100 void *ifpga_pci_intr_establish (void *, pci_intr_handle_t, int, 101 int (*)(void *), void *); 102 void ifpga_pci_intr_disestablish (void *, void *); 103 104 struct arm32_pci_chipset ifpga_pci_chipset = { 105 NULL, /* conf_v */ 106 ifpga_pci_attach_hook, 107 ifpga_pci_bus_maxdevs, 108 ifpga_pci_make_tag, 109 ifpga_pci_decompose_tag, 110 ifpga_pci_conf_read, 111 ifpga_pci_conf_write, 112 NULL, /* intr_v */ 113 ifpga_pci_intr_map, 114 ifpga_pci_intr_string, 115 ifpga_pci_intr_evcnt, 116 ifpga_pci_intr_establish, 117 ifpga_pci_intr_disestablish, 118 #ifdef __HAVE_PCI_CONF_HOOK 119 NULL, 120 #endif 121 ifpga_pci_conf_interrupt, 122 }; 123 124 /* 125 * Use the integrator-specific bus_dma routines. 126 */ 127 struct arm32_bus_dma_tag ifpga_pci_bus_dma_tag = { 128 0, 129 0, 130 NULL, 131 _bus_dmamap_create, 132 _bus_dmamap_destroy, 133 _bus_dmamap_load, 134 _bus_dmamap_load_mbuf, 135 _bus_dmamap_load_uio, 136 _bus_dmamap_load_raw, 137 _bus_dmamap_unload, 138 _bus_dmamap_sync, /* pre */ 139 NULL, /* post */ 140 _bus_dmamem_alloc, 141 _bus_dmamem_free, 142 _bus_dmamem_map, 143 _bus_dmamem_unmap, 144 _bus_dmamem_mmap, 145 }; 146 147 /* 148 * Currently we only support 12 devices as we select directly in the 149 * type 0 config cycle 150 * (See conf_{read,write} for more detail 151 */ 152 #define MAX_PCI_DEVICES 21 153 154 /*static int 155 pci_intr(void *arg) 156 { 157 printf("pci int %x\n", (int)arg); 158 return 0; 159 }*/ 160 161 162 void 163 ifpga_pci_attach_hook(device_t parent, device_t self, 164 struct pcibus_attach_args *pba) 165 { 166 #ifdef PCI_DEBUG 167 printf("ifpga_pci_attach_hook()\n"); 168 #endif 169 } 170 171 int 172 ifpga_pci_bus_maxdevs(void *pcv, int busno) 173 { 174 #ifdef PCI_DEBUG 175 printf("ifpga_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno); 176 #endif 177 return MAX_PCI_DEVICES; 178 } 179 180 pcitag_t 181 ifpga_pci_make_tag(void *pcv, int bus, int device, int function) 182 { 183 #ifdef PCI_DEBUG 184 printf("ifpga_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n", 185 pcv, bus, device, function); 186 #endif 187 return (bus << 16) | (device << 11) | (function << 8); 188 } 189 190 void 191 ifpga_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep, 192 int *functionp) 193 { 194 #ifdef PCI_DEBUG 195 printf("ifpga_pci_decompose_tag(pcv=%p, tag=0x%08lx, bp=%p, dp=%p, " 196 "fp=%p)\n", pcv, tag, busp, devicep, functionp); 197 #endif 198 199 if (busp != NULL) 200 *busp = (tag >> 16) & 0xff; 201 if (devicep != NULL) 202 *devicep = (tag >> 11) & 0x1f; 203 if (functionp != NULL) 204 *functionp = (tag >> 8) & 0x7; 205 } 206 207 pcireg_t 208 ifpga_pci_conf_read(void *pcv, pcitag_t tag, int reg) 209 { 210 pcireg_t data; 211 struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv; 212 int bus, device, function; 213 u_int address; 214 215 if ((unsigned int)reg >= PCI_CONF_SIZE) 216 return (pcireg_t) -1; 217 218 ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function); 219 220 /* Reset the appertures so that we can talk to the register space. */ 221 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 222 IFPGA_PCI_APP0_512MB_BASE); 223 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 224 IFPGA_PCI_APP1_CONF_BASE); 225 226 if (bus == 0) { 227 address = (1 << (device + 11)) | reg; 228 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 229 IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00)); 230 231 /* Read the value from the bus... */ 232 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh, 233 address & 0x00ffffff); 234 235 } else { 236 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 237 IFPGA_PCI_APP1_CONF_T1_MAP); 238 239 /* Read the value from the bus... */ 240 data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh, 241 tag | reg); 242 } 243 /* ... and put the memory spaces back again. */ 244 245 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 246 IFPGA_PCI_APP1_256MB_BASE); 247 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 248 IFPGA_PCI_APP1_256MB_MAP); 249 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 250 IFPGA_PCI_APP0_256MB_BASE); 251 #ifdef PCI_DEBUG 252 printf("ifpga_pci_conf_read(pcv=%p tag=0x%08lx reg=0x%02x)=0x%08x\n", 253 pcv, tag, reg, data); 254 #endif 255 return data; 256 } 257 258 void 259 ifpga_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data) 260 { 261 struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv; 262 int bus, device, function; 263 u_int address; 264 265 #ifdef PCI_DEBUG 266 printf("ifpga_pci_conf_write(pcv=%p tag=0x%08lx reg=0x%02x, 0x%08x)\n", 267 pcv, tag, reg, data); 268 #endif 269 270 if ((unsigned int)reg >= PCI_CONF_SIZE) 271 return; 272 273 ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function); 274 275 /* Reset the appertures so that we can talk to the register space. */ 276 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 277 IFPGA_PCI_APP0_512MB_BASE); 278 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 279 IFPGA_PCI_APP1_CONF_BASE); 280 281 if (bus == 0) { 282 address = (1 << (device + 11)) | reg; 283 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 284 IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00)); 285 286 /* Write the value to the bus... */ 287 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, 288 address & 0x00ffffff, data); 289 290 } else { 291 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 292 IFPGA_PCI_APP1_CONF_T1_MAP); 293 294 /* Write the value to the bus... */ 295 bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, tag | reg, 296 data); 297 } 298 /* ... and put the memory spaces back again. */ 299 300 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1, 301 IFPGA_PCI_APP1_256MB_BASE); 302 bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1, 303 IFPGA_PCI_APP1_256MB_MAP); 304 bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0, 305 IFPGA_PCI_APP0_256MB_BASE); 306 } 307 308 int 309 ifpga_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 310 { 311 int line = pa->pa_intrline; 312 313 #ifdef PCI_DEBUG 314 int pin = pa->pa_intrpin; 315 void *pcv = pa->pa_pc; 316 pcitag_t intrtag = pa->pa_intrtag; 317 int bus, device, function; 318 319 ifpga_pci_decompose_tag(pcv, intrtag, &bus, &device, &function); 320 printf("ifpga_pci_intr_map: pcv=%p, tag=%08lx pin=%d line=%d " 321 "dev=%d\n", pcv, intrtag, pin, line, device); 322 #endif 323 324 325 #ifdef PCI_DEBUG 326 printf("pin %d, line %d mapped to int %d\n", pin, line, line); 327 #endif 328 329 *ihp = line; 330 return 0; 331 } 332 333 const char * 334 ifpga_pci_intr_string(void *pcv, pci_intr_handle_t ih, char *buf, size_t len) 335 { 336 #ifdef PCI_DEBUG 337 printf("ifpga_pci_intr_string(pcv=%p, ih=0x%lx)\n", pcv, ih); 338 #endif 339 if (ih == 0) 340 panic("ifpga_pci_intr_string: bogus handle 0x%lx", ih); 341 342 snprintf(buf, len, "pciint%ld", ih - IFPGA_INTRNUM_PCIINT0); 343 return buf; 344 } 345 346 const struct evcnt * 347 ifpga_pci_intr_evcnt(void *pcv, pci_intr_handle_t ih) 348 { 349 350 /* XXX for now, no evcnt parent reported */ 351 return NULL; 352 } 353 354 void * 355 ifpga_pci_intr_establish(void *pcv, pci_intr_handle_t ih, int level, 356 int (*func) (void *), void *arg) 357 { 358 void *intr; 359 360 #ifdef PCI_DEBUG 361 printf("ifpga_pci_intr_establish(pcv=%p, ih=0x%lx, level=%d, " 362 "func=%p, arg=%p)\n", pcv, ih, level, func, arg); 363 #endif 364 365 intr = ifpga_intr_establish(ih, level, func, arg); 366 367 return intr; 368 } 369 370 void 371 ifpga_pci_intr_disestablish(void *pcv, void *cookie) 372 { 373 #ifdef PCI_DEBUG 374 printf("ifpga_pci_intr_disestablish(pcv=%p, cookie=%p)\n", 375 pcv, cookie); 376 #endif 377 ifpga_intr_disestablish(cookie); 378 } 379