1 /* $NetBSD: plcom.c,v 1.62 2020/10/19 17:00:02 tnn Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * Copyright (c) 1998, 1999, 2012 The NetBSD Foundation, Inc. 32 * All rights reserved. 33 * 34 * This code is derived from software contributed to The NetBSD Foundation 35 * by Charles M. Hannum and Nick Hudson. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 47 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 48 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 49 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 50 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 51 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 52 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 53 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 54 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 55 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 59 /* 60 * Copyright (c) 1991 The Regents of the University of California. 61 * All rights reserved. 62 * 63 * Redistribution and use in source and binary forms, with or without 64 * modification, are permitted provided that the following conditions 65 * are met: 66 * 1. Redistributions of source code must retain the above copyright 67 * notice, this list of conditions and the following disclaimer. 68 * 2. Redistributions in binary form must reproduce the above copyright 69 * notice, this list of conditions and the following disclaimer in the 70 * documentation and/or other materials provided with the distribution. 71 * 3. Neither the name of the University nor the names of its contributors 72 * may be used to endorse or promote products derived from this software 73 * without specific prior written permission. 74 * 75 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 76 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 77 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 78 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 79 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 80 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 81 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 82 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 83 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 84 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 85 * SUCH DAMAGE. 86 * 87 * @(#)com.c 7.5 (Berkeley) 5/16/91 88 */ 89 90 /* 91 * COM driver for the Prime Cell PL010 and PL011 UARTs. Both are is similar to 92 * the 16C550, but have a completely different programmer's model. 93 * Derived from the NS16550AF com driver. 94 */ 95 96 #include <sys/cdefs.h> 97 __KERNEL_RCSID(0, "$NetBSD: plcom.c,v 1.62 2020/10/19 17:00:02 tnn Exp $"); 98 99 #include "opt_plcom.h" 100 #include "opt_ddb.h" 101 #include "opt_kgdb.h" 102 #include "opt_lockdebug.h" 103 #include "opt_multiprocessor.h" 104 105 /* 106 * Override cnmagic(9) macro before including <sys/systm.h>. 107 * We need to know if cn_check_magic triggered debugger, so set a flag. 108 * Callers of cn_check_magic must declare int cn_trapped = 0; 109 * XXX: this is *ugly*! 110 */ 111 #define cn_trap() \ 112 do { \ 113 console_debugger(); \ 114 cn_trapped = 1; \ 115 } while (/* CONSTCOND */ 0) 116 117 #include <sys/param.h> 118 #include <sys/systm.h> 119 #include <sys/ioctl.h> 120 #include <sys/select.h> 121 #include <sys/tty.h> 122 #include <sys/proc.h> 123 #include <sys/conf.h> 124 #include <sys/file.h> 125 #include <sys/uio.h> 126 #include <sys/kernel.h> 127 #include <sys/syslog.h> 128 #include <sys/types.h> 129 #include <sys/device.h> 130 #include <sys/malloc.h> 131 #include <sys/timepps.h> 132 #include <sys/vnode.h> 133 #include <sys/kauth.h> 134 #include <sys/intr.h> 135 #include <sys/bus.h> 136 #ifdef RND_COM 137 #include <sys/rndsource.h> 138 #endif 139 140 #include <evbarm/dev/plcomreg.h> 141 #include <evbarm/dev/plcomvar.h> 142 143 #include <dev/cons.h> 144 145 static void plcom_enable_debugport (struct plcom_softc *); 146 147 void plcom_config (struct plcom_softc *); 148 void plcom_shutdown (struct plcom_softc *); 149 int pl010comspeed (long, long); 150 int pl011comspeed (long, long); 151 static u_char cflag2lcr (tcflag_t); 152 int plcomparam (struct tty *, struct termios *); 153 void plcomstart (struct tty *); 154 int plcomhwiflow (struct tty *, int); 155 156 void plcom_loadchannelregs (struct plcom_softc *); 157 void plcom_hwiflow (struct plcom_softc *); 158 void plcom_break (struct plcom_softc *, int); 159 void plcom_modem (struct plcom_softc *, int); 160 void tiocm_to_plcom (struct plcom_softc *, u_long, int); 161 int plcom_to_tiocm (struct plcom_softc *); 162 void plcom_iflush (struct plcom_softc *); 163 164 int plcom_common_getc (dev_t, struct plcom_instance *); 165 void plcom_common_putc (dev_t, struct plcom_instance *, int); 166 167 int plcominit (struct plcom_instance *, int, int, tcflag_t); 168 169 dev_type_open(plcomopen); 170 dev_type_close(plcomclose); 171 dev_type_read(plcomread); 172 dev_type_write(plcomwrite); 173 dev_type_ioctl(plcomioctl); 174 dev_type_stop(plcomstop); 175 dev_type_tty(plcomtty); 176 dev_type_poll(plcompoll); 177 178 int plcomcngetc (dev_t); 179 void plcomcnputc (dev_t, int); 180 void plcomcnpollc (dev_t, int); 181 void plcomcnhalt (dev_t); 182 183 #define integrate static inline 184 void plcomsoft (void *); 185 integrate void plcom_rxsoft (struct plcom_softc *, struct tty *); 186 integrate void plcom_txsoft (struct plcom_softc *, struct tty *); 187 integrate void plcom_stsoft (struct plcom_softc *, struct tty *); 188 integrate void plcom_schedrx (struct plcom_softc *); 189 void plcomdiag (void *); 190 191 bool plcom_intstatus(struct plcom_instance *, u_int *); 192 193 extern struct cfdriver plcom_cd; 194 195 const struct cdevsw plcom_cdevsw = { 196 .d_open = plcomopen, 197 .d_close = plcomclose, 198 .d_read = plcomread, 199 .d_write = plcomwrite, 200 .d_ioctl = plcomioctl, 201 .d_stop = plcomstop, 202 .d_tty = plcomtty, 203 .d_poll = plcompoll, 204 .d_mmap = nommap, 205 .d_kqfilter = ttykqfilter, 206 .d_discard = nodiscard, 207 .d_flag = D_TTY 208 }; 209 210 /* 211 * Make this an option variable one can patch. 212 * But be warned: this must be a power of 2! 213 */ 214 u_int plcom_rbuf_size = PLCOM_RING_SIZE; 215 216 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 217 u_int plcom_rbuf_hiwat = (PLCOM_RING_SIZE * 1) / 4; 218 u_int plcom_rbuf_lowat = (PLCOM_RING_SIZE * 3) / 4; 219 220 static int plcomconsunit = -1; 221 static struct plcom_instance plcomcons_info; 222 223 static int plcomconsattached; 224 static int plcomconsrate; 225 static tcflag_t plcomconscflag; 226 static struct cnm_state plcom_cnm_state; 227 228 static int ppscap = 229 PPS_TSFMT_TSPEC | 230 PPS_CAPTUREASSERT | 231 PPS_CAPTURECLEAR | 232 #ifdef PPS_SYNC 233 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 234 #endif /* PPS_SYNC */ 235 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 236 237 #ifdef KGDB 238 #include <sys/kgdb.h> 239 240 static struct plcom_instance plcomkgdb_info; 241 static int plcom_kgdb_attached; 242 243 int plcom_kgdb_getc (void *); 244 void plcom_kgdb_putc (void *, int); 245 #endif /* KGDB */ 246 247 #define PLCOMDIALOUT_MASK TTDIALOUT_MASK 248 249 #define PLCOMUNIT(x) TTUNIT(x) 250 #define PLCOMDIALOUT(x) TTDIALOUT(x) 251 252 #define PLCOM_ISALIVE(sc) ((sc)->enabled != 0 && \ 253 device_is_active((sc)->sc_dev)) 254 255 #define BR BUS_SPACE_BARRIER_READ 256 #define BW BUS_SPACE_BARRIER_WRITE 257 #define PLCOM_BARRIER(pi, f) \ 258 bus_space_barrier((pi)->pi_iot, (pi)->pi_ioh, 0, (pi)->pi_size, (f)) 259 260 static uint8_t 261 pread1(struct plcom_instance *pi, bus_size_t reg) 262 { 263 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) 264 return bus_space_read_1(pi->pi_iot, pi->pi_ioh, reg); 265 266 return bus_space_read_4(pi->pi_iot, pi->pi_ioh, reg & -4) >> 267 (8 * (reg & 3)); 268 } 269 int nhcr; 270 static void 271 pwrite1(struct plcom_instance *pi, bus_size_t o, uint8_t val) 272 { 273 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 274 bus_space_write_1(pi->pi_iot, pi->pi_ioh, o, val); 275 } else { 276 const size_t shift = 8 * (o & 3); 277 o &= -4; 278 uint32_t tmp = bus_space_read_4(pi->pi_iot, pi->pi_ioh, o); 279 tmp = (val << shift) | (tmp & ~(0xff << shift)); 280 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, tmp); 281 } 282 } 283 284 static void 285 pwritem1(struct plcom_instance *pi, bus_size_t o, const uint8_t *datap, 286 bus_size_t count) 287 { 288 if (!ISSET(pi->pi_flags, PLC_FLAG_32BIT_ACCESS)) { 289 bus_space_write_multi_1(pi->pi_iot, pi->pi_ioh, o, datap, count); 290 } else { 291 KASSERT((o & 3) == 0); 292 while (count--) { 293 bus_space_write_4(pi->pi_iot, pi->pi_ioh, o, *datap++); 294 }; 295 } 296 } 297 298 #define PREAD1(pi, reg) pread1(pi, reg) 299 #define PREAD4(pi, reg) \ 300 bus_space_read_4((pi)->pi_iot, (pi)->pi_ioh, (reg)) 301 302 #define PWRITE1(pi, reg, val) pwrite1(pi, reg, val) 303 #define PWRITEM1(pi, reg, d, c) pwritem1(pi, reg, d, c) 304 #define PWRITE4(pi, reg, val) \ 305 bus_space_write_4((pi)->pi_iot, (pi)->pi_ioh, (reg), (val)) 306 307 int 308 pl010comspeed(long speed, long frequency) 309 { 310 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 311 312 int x, err; 313 314 #if 0 315 if (speed == 0) 316 return 0; 317 #endif 318 if (speed <= 0) 319 return -1; 320 x = divrnd(frequency / 16, speed); 321 if (x <= 0) 322 return -1; 323 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 324 if (err < 0) 325 err = -err; 326 if (err > PLCOM_TOLERANCE) 327 return -1; 328 return x; 329 330 #undef divrnd 331 } 332 333 int 334 pl011comspeed(long speed, long frequency) 335 { 336 int denom = 16 * speed; 337 int div = frequency / denom; 338 int rem = frequency % denom; 339 340 int ibrd = div << 6; 341 int fbrd = (((8 * rem) / speed) + 1) / 2; 342 343 /* Tolerance? */ 344 return ibrd | fbrd; 345 } 346 347 #ifdef PLCOM_DEBUG 348 int plcom_debug = 0; 349 350 void plcomstatus (struct plcom_softc *, const char *); 351 void 352 plcomstatus(struct plcom_softc *sc, const char *str) 353 { 354 struct tty *tp = sc->sc_tty; 355 356 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 357 device_xname(sc->sc_dev), str, 358 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 359 ISSET(sc->sc_msr, PL01X_MSR_DCD) ? "+" : "-", 360 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 361 ISSET(sc->sc_mcr, PL01X_MCR_DTR) ? "+" : "-", 362 sc->sc_tx_stopped ? "+" : "-"); 363 364 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 365 device_xname(sc->sc_dev), str, 366 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 367 ISSET(sc->sc_msr, PL01X_MSR_CTS) ? "+" : "-", 368 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 369 ISSET(sc->sc_mcr, PL01X_MCR_RTS) ? "+" : "-", 370 sc->sc_rx_flags); 371 } 372 #endif 373 374 #if 0 375 int 376 plcomprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 377 { 378 int data; 379 380 /* Disable the UART. */ 381 bus_space_write_1(iot, ioh, plcom_cr, 0); 382 /* Make sure the FIFO is off. */ 383 bus_space_write_1(iot, ioh, plcom_lcr, PL01X_LCR_8BITS); 384 /* Disable interrupts. */ 385 bus_space_write_1(iot, ioh, plcom_iir, 0); 386 387 /* Make sure we swallow anything in the receiving register. */ 388 data = bus_space_read_1(iot, ioh, plcom_dr); 389 390 if (bus_space_read_1(iot, ioh, plcom_lcr) != PL01X_LCR_8BITS) 391 return 0; 392 393 data = bus_space_read_1(iot, ioh, plcom_fr) & (PL01X_FR_RXFF | PL01X_FR_RXFE); 394 395 if (data != PL01X_FR_RXFE) 396 return 0; 397 398 return 1; 399 } 400 #endif 401 402 /* 403 * No locking in this routine; it is only called during attach, 404 * or with the port already locked. 405 */ 406 static void 407 plcom_enable_debugport(struct plcom_softc *sc) 408 { 409 struct plcom_instance *pi = &sc->sc_pi; 410 411 sc->sc_cr = PL01X_CR_UARTEN; 412 SET(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 413 414 /* Turn on line break interrupt, set carrier. */ 415 switch (pi->pi_type) { 416 case PLCOM_TYPE_PL010: 417 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 418 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 419 if (sc->sc_set_mcr) { 420 /* XXX device_unit() abuse */ 421 sc->sc_set_mcr(sc->sc_set_mcr_arg, 422 device_unit(sc->sc_dev), sc->sc_mcr); 423 } 424 break; 425 case PLCOM_TYPE_PL011: 426 sc->sc_imsc = PL011_INT_RX | PL011_INT_RT; 427 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 428 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr)); 429 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 430 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 431 break; 432 } 433 434 } 435 436 void 437 plcom_attach_subr(struct plcom_softc *sc) 438 { 439 struct plcom_instance *pi = &sc->sc_pi; 440 struct tty *tp; 441 442 callout_init(&sc->sc_diag_callout, 0); 443 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 444 445 switch (pi->pi_type) { 446 case PLCOM_TYPE_PL010: 447 case PLCOM_TYPE_PL011: 448 break; 449 default: 450 aprint_error_dev(sc->sc_dev, 451 "Unknown plcom type: %d\n", pi->pi_type); 452 return; 453 } 454 455 /* Disable interrupts before configuring the device. */ 456 sc->sc_cr = 0; 457 sc->sc_imsc = 0; 458 459 if (bus_space_is_equal(pi->pi_iot, plcomcons_info.pi_iot) && 460 pi->pi_iobase == plcomcons_info.pi_iobase) { 461 plcomconsattached = 1; 462 463 /* Make sure the console is always "hardwired". */ 464 delay(1000); /* wait for output to finish */ 465 SET(sc->sc_hwflags, PLCOM_HW_CONSOLE); 466 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 467 /* 468 * Must re-enable the console immediately, or we will 469 * hang when trying to print. 470 */ 471 sc->sc_cr = PL01X_CR_UARTEN; 472 if (pi->pi_type == PLCOM_TYPE_PL011) 473 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 474 } 475 476 switch (pi->pi_type) { 477 case PLCOM_TYPE_PL010: 478 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 479 break; 480 481 case PLCOM_TYPE_PL011: 482 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 483 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 484 break; 485 } 486 487 if (sc->sc_fifolen == 0) { 488 switch (pi->pi_type) { 489 case PLCOM_TYPE_PL010: 490 /* 491 * The PL010 has a 16-byte fifo, but the tx interrupt 492 * triggers when there is space for 8 more bytes. 493 */ 494 sc->sc_fifolen = 8; 495 break; 496 case PLCOM_TYPE_PL011: 497 /* Some revisions have a 32 byte TX FIFO */ 498 sc->sc_fifolen = 16; 499 break; 500 } 501 } 502 503 if (ISSET(sc->sc_hwflags, PLCOM_HW_TXFIFO_DISABLE)) { 504 sc->sc_fifolen = 1; 505 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 506 } 507 508 if (sc->sc_fifolen > 1) 509 SET(sc->sc_hwflags, PLCOM_HW_FIFO); 510 511 tp = tty_alloc(); 512 tp->t_oproc = plcomstart; 513 tp->t_param = plcomparam; 514 tp->t_hwiflow = plcomhwiflow; 515 516 sc->sc_tty = tp; 517 sc->sc_rbuf = malloc(plcom_rbuf_size << 1, M_DEVBUF, M_WAITOK); 518 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 519 sc->sc_rbavail = plcom_rbuf_size; 520 sc->sc_ebuf = sc->sc_rbuf + (plcom_rbuf_size << 1); 521 522 tty_attach(tp); 523 524 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 525 int maj; 526 527 /* locate the major number */ 528 maj = cdevsw_lookup_major(&plcom_cdevsw); 529 530 tp->t_dev = cn_tab->cn_dev = makedev(maj, device_unit(sc->sc_dev)); 531 532 aprint_normal_dev(sc->sc_dev, "console\n"); 533 } 534 535 #ifdef KGDB 536 /* 537 * Allow kgdb to "take over" this port. If this is 538 * the kgdb device, it has exclusive use. 539 */ 540 if (bus_space_is_equal(pi->pi_iot, plcomkgdb_info.pi_iot) && 541 pi->pi_iobase == plcomkgdb_info.pi_iobase) { 542 if (!ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 543 plcom_kgdb_attached = 1; 544 545 SET(sc->sc_hwflags, PLCOM_HW_KGDB); 546 } 547 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 548 } 549 #endif 550 551 sc->sc_si = softint_establish(SOFTINT_SERIAL, plcomsoft, sc); 552 553 #ifdef RND_COM 554 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 555 RND_TYPE_TTY, RND_FLAG_DEFAULT); 556 #endif 557 558 /* 559 * if there are no enable/disable functions, assume the device 560 * is always enabled 561 */ 562 if (!sc->enable) 563 sc->enabled = 1; 564 565 plcom_config(sc); 566 567 SET(sc->sc_hwflags, PLCOM_HW_DEV_OK); 568 } 569 570 void 571 plcom_config(struct plcom_softc *sc) 572 { 573 struct plcom_instance *pi = &sc->sc_pi; 574 575 /* Disable interrupts before configuring the device. */ 576 sc->sc_cr = 0; 577 sc->sc_imsc = 0; 578 switch (pi->pi_type) { 579 case PLCOM_TYPE_PL010: 580 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 581 break; 582 583 case PLCOM_TYPE_PL011: 584 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 585 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 586 break; 587 } 588 589 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 590 plcom_enable_debugport(sc); 591 } 592 593 int 594 plcom_detach(device_t self, int flags) 595 { 596 struct plcom_softc *sc = device_private(self); 597 int maj, mn; 598 599 if (sc->sc_hwflags & (PLCOM_HW_CONSOLE|PLCOM_HW_KGDB)) 600 return EBUSY; 601 602 if (sc->disable != NULL && sc->enabled != 0) { 603 (*sc->disable)(sc); 604 sc->enabled = 0; 605 } 606 607 /* locate the major number */ 608 maj = cdevsw_lookup_major(&plcom_cdevsw); 609 610 /* Nuke the vnodes for any open instances. */ 611 mn = device_unit(self); 612 vdevgone(maj, mn, mn, VCHR); 613 614 mn |= PLCOMDIALOUT_MASK; 615 vdevgone(maj, mn, mn, VCHR); 616 617 if (sc->sc_rbuf == NULL) { 618 /* 619 * Ring buffer allocation failed in the plcom_attach_subr, 620 * only the tty is allocated, and nothing else. 621 */ 622 tty_free(sc->sc_tty); 623 return 0; 624 } 625 626 /* Free the receive buffer. */ 627 free(sc->sc_rbuf, M_DEVBUF); 628 629 /* Detach and free the tty. */ 630 tty_detach(sc->sc_tty); 631 tty_free(sc->sc_tty); 632 633 /* Unhook the soft interrupt handler. */ 634 softint_disestablish(sc->sc_si); 635 636 #ifdef RND_COM 637 /* Unhook the entropy source. */ 638 rnd_detach_source(&sc->rnd_source); 639 #endif 640 callout_destroy(&sc->sc_diag_callout); 641 642 /* Destroy the lock. */ 643 mutex_destroy(&sc->sc_lock); 644 645 return 0; 646 } 647 648 int 649 plcom_activate(device_t self, enum devact act) 650 { 651 struct plcom_softc *sc = device_private(self); 652 653 switch (act) { 654 case DVACT_DEACTIVATE: 655 sc->enabled = 0; 656 return 0; 657 default: 658 return EOPNOTSUPP; 659 } 660 } 661 662 void 663 plcom_shutdown(struct plcom_softc *sc) 664 { 665 struct plcom_instance *pi = &sc->sc_pi; 666 struct tty *tp = sc->sc_tty; 667 mutex_spin_enter(&sc->sc_lock); 668 669 /* If we were asserting flow control, then deassert it. */ 670 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 671 plcom_hwiflow(sc); 672 673 /* Clear any break condition set with TIOCSBRK. */ 674 plcom_break(sc, 0); 675 676 /* Turn off PPS capture on last close. */ 677 mutex_spin_enter(&timecounter_lock); 678 sc->sc_ppsmask = 0; 679 sc->ppsparam.mode = 0; 680 mutex_spin_exit(&timecounter_lock); 681 682 /* 683 * Hang up if necessary. Wait a bit, so the other side has time to 684 * notice even if we immediately open the port again. 685 * Avoid tsleeping above splhigh(). 686 */ 687 if (ISSET(tp->t_cflag, HUPCL)) { 688 plcom_modem(sc, 0); 689 mutex_spin_exit(&sc->sc_lock); 690 /* XXX will only timeout */ 691 (void) kpause(ttclos, false, hz, NULL); 692 mutex_spin_enter(&sc->sc_lock); 693 } 694 695 sc->sc_cr = 0; 696 sc->sc_imsc = 0; 697 /* Turn off interrupts. */ 698 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 699 /* interrupt on break */ 700 701 sc->sc_cr = PL01X_CR_UARTEN; 702 sc->sc_imsc = 0; 703 switch (pi->pi_type) { 704 case PLCOM_TYPE_PL010: 705 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 706 break; 707 case PLCOM_TYPE_PL011: 708 SET(sc->sc_cr, PL011_CR_RXE); 709 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 710 break; 711 } 712 } 713 switch (pi->pi_type) { 714 case PLCOM_TYPE_PL010: 715 SET(sc->sc_cr, PL010_CR_RIE | PL010_CR_RTIE); 716 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 717 break; 718 case PLCOM_TYPE_PL011: 719 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 720 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX); 721 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 722 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 723 break; 724 } 725 726 mutex_spin_exit(&sc->sc_lock); 727 if (sc->disable) { 728 #ifdef DIAGNOSTIC 729 if (!sc->enabled) 730 panic("plcom_shutdown: not enabled?"); 731 #endif 732 (*sc->disable)(sc); 733 sc->enabled = 0; 734 } 735 } 736 737 int 738 plcomopen(dev_t dev, int flag, int mode, struct lwp *l) 739 { 740 struct plcom_softc *sc; 741 struct plcom_instance *pi; 742 struct tty *tp; 743 int s; 744 int error; 745 746 sc = device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 747 if (sc == NULL || !ISSET(sc->sc_hwflags, PLCOM_HW_DEV_OK) || 748 sc->sc_rbuf == NULL) 749 return ENXIO; 750 751 if (!device_is_active(sc->sc_dev)) 752 return ENXIO; 753 754 pi = &sc->sc_pi; 755 756 #ifdef KGDB 757 /* 758 * If this is the kgdb port, no other use is permitted. 759 */ 760 if (ISSET(sc->sc_hwflags, PLCOM_HW_KGDB)) 761 return EBUSY; 762 #endif 763 764 tp = sc->sc_tty; 765 766 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 767 return (EBUSY); 768 769 s = spltty(); 770 771 /* 772 * Do the following iff this is a first open. 773 */ 774 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 775 struct termios t; 776 777 tp->t_dev = dev; 778 779 if (sc->enable) { 780 if ((*sc->enable)(sc)) { 781 splx(s); 782 aprint_error_dev(sc->sc_dev, 783 "device enable failed\n"); 784 return EIO; 785 } 786 mutex_spin_enter(&sc->sc_lock); 787 sc->enabled = 1; 788 plcom_config(sc); 789 } else { 790 mutex_spin_enter(&sc->sc_lock); 791 } 792 793 /* Turn on interrupts. */ 794 /* IER_ERXRDY | IER_ERLS | IER_EMSC; */ 795 /* Fetch the current modem control status, needed later. */ 796 sc->sc_cr = PL01X_CR_UARTEN; 797 switch (pi->pi_type) { 798 case PLCOM_TYPE_PL010: 799 SET(sc->sc_cr, 800 PL010_CR_RIE | PL010_CR_RTIE | PL010_CR_MSIE); 801 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 802 sc->sc_msr = PREAD1(pi, PL01XCOM_FR); 803 break; 804 case PLCOM_TYPE_PL011: 805 SET(sc->sc_cr, PL011_CR_RXE | PL011_CR_TXE); 806 SET(sc->sc_imsc, PL011_INT_RT | PL011_INT_RX | 807 PL011_INT_MSMASK); 808 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 809 sc->sc_msr = PREAD4(pi, PL01XCOM_FR); 810 break; 811 } 812 813 /* Clear PPS capture state on first open. */ 814 815 mutex_spin_enter(&timecounter_lock); 816 sc->sc_ppsmask = 0; 817 sc->ppsparam.mode = 0; 818 mutex_spin_exit(&timecounter_lock); 819 820 mutex_spin_exit(&sc->sc_lock); 821 822 /* 823 * Initialize the termios status to the defaults. Add in the 824 * sticky bits from TIOCSFLAGS. 825 */ 826 if (ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 827 t.c_ospeed = plcomconsrate; 828 t.c_cflag = plcomconscflag; 829 } else { 830 t.c_ospeed = TTYDEF_SPEED; 831 t.c_cflag = TTYDEF_CFLAG; 832 } 833 t.c_ispeed = t.c_ospeed; 834 835 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 836 SET(t.c_cflag, CLOCAL); 837 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 838 SET(t.c_cflag, CRTSCTS); 839 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 840 SET(t.c_cflag, MDMBUF); 841 /* Make sure plcomparam() will do something. */ 842 tp->t_ospeed = 0; 843 (void) plcomparam(tp, &t); 844 tp->t_iflag = TTYDEF_IFLAG; 845 tp->t_oflag = TTYDEF_OFLAG; 846 tp->t_lflag = TTYDEF_LFLAG; 847 ttychars(tp); 848 ttsetwater(tp); 849 850 mutex_spin_enter(&sc->sc_lock); 851 852 /* 853 * Turn on DTR. We must always do this, even if carrier is not 854 * present, because otherwise we'd have to use TIOCSDTR 855 * immediately after setting CLOCAL, which applications do not 856 * expect. We always assert DTR while the device is open 857 * unless explicitly requested to deassert it. 858 */ 859 plcom_modem(sc, 1); 860 861 /* Clear the input ring, and unblock. */ 862 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 863 sc->sc_rbavail = plcom_rbuf_size; 864 plcom_iflush(sc); 865 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 866 plcom_hwiflow(sc); 867 868 #ifdef PLCOM_DEBUG 869 if (plcom_debug) 870 plcomstatus(sc, "plcomopen "); 871 #endif 872 873 mutex_spin_exit(&sc->sc_lock); 874 } 875 876 splx(s); 877 878 error = ttyopen(tp, PLCOMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 879 if (error) 880 goto bad; 881 882 error = (*tp->t_linesw->l_open)(dev, tp); 883 if (error) 884 goto bad; 885 886 return 0; 887 888 bad: 889 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 890 /* 891 * We failed to open the device, and nobody else had it opened. 892 * Clean up the state as appropriate. 893 */ 894 plcom_shutdown(sc); 895 } 896 897 return error; 898 } 899 900 int 901 plcomclose(dev_t dev, int flag, int mode, struct lwp *l) 902 { 903 struct plcom_softc *sc = 904 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 905 struct tty *tp = sc->sc_tty; 906 907 /* XXX This is for cons.c. */ 908 if (!ISSET(tp->t_state, TS_ISOPEN)) 909 return 0; 910 911 (*tp->t_linesw->l_close)(tp, flag); 912 ttyclose(tp); 913 914 if (PLCOM_ISALIVE(sc) == 0) 915 return 0; 916 917 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 918 /* 919 * Although we got a last close, the device may still be in 920 * use; e.g. if this was the dialout node, and there are still 921 * processes waiting for carrier on the non-dialout node. 922 */ 923 plcom_shutdown(sc); 924 } 925 926 return 0; 927 } 928 929 int 930 plcomread(dev_t dev, struct uio *uio, int flag) 931 { 932 struct plcom_softc *sc = 933 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 934 struct tty *tp = sc->sc_tty; 935 936 if (PLCOM_ISALIVE(sc) == 0) 937 return EIO; 938 939 return (*tp->t_linesw->l_read)(tp, uio, flag); 940 } 941 942 int 943 plcomwrite(dev_t dev, struct uio *uio, int flag) 944 { 945 struct plcom_softc *sc = 946 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 947 struct tty *tp = sc->sc_tty; 948 949 if (PLCOM_ISALIVE(sc) == 0) 950 return EIO; 951 952 return (*tp->t_linesw->l_write)(tp, uio, flag); 953 } 954 955 int 956 plcompoll(dev_t dev, int events, struct lwp *l) 957 { 958 struct plcom_softc *sc = 959 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 960 struct tty *tp = sc->sc_tty; 961 962 if (PLCOM_ISALIVE(sc) == 0) 963 return EIO; 964 965 return (*tp->t_linesw->l_poll)(tp, events, l); 966 } 967 968 struct tty * 969 plcomtty(dev_t dev) 970 { 971 struct plcom_softc *sc = 972 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 973 struct tty *tp = sc->sc_tty; 974 975 return tp; 976 } 977 978 int 979 plcomioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 980 { 981 struct plcom_softc *sc = 982 device_lookup_private(&plcom_cd, PLCOMUNIT(dev)); 983 struct tty *tp; 984 int error; 985 986 if (sc == NULL) 987 return ENXIO; 988 if (PLCOM_ISALIVE(sc) == 0) 989 return EIO; 990 991 tp = sc->sc_tty; 992 993 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 994 if (error != EPASSTHROUGH) 995 return error; 996 997 error = ttioctl(tp, cmd, data, flag, l); 998 if (error != EPASSTHROUGH) 999 return error; 1000 1001 error = 0; 1002 switch (cmd) { 1003 case TIOCSFLAGS: 1004 error = kauth_authorize_device_tty(l->l_cred, 1005 KAUTH_DEVICE_TTY_PRIVSET, tp); 1006 break; 1007 default: 1008 /* nothing */ 1009 break; 1010 } 1011 if (error) { 1012 return error; 1013 } 1014 1015 mutex_spin_enter(&sc->sc_lock); 1016 switch (cmd) { 1017 case TIOCSBRK: 1018 plcom_break(sc, 1); 1019 break; 1020 1021 case TIOCCBRK: 1022 plcom_break(sc, 0); 1023 break; 1024 1025 case TIOCSDTR: 1026 plcom_modem(sc, 1); 1027 break; 1028 1029 case TIOCCDTR: 1030 plcom_modem(sc, 0); 1031 break; 1032 1033 case TIOCGFLAGS: 1034 *(int *)data = sc->sc_swflags; 1035 break; 1036 1037 case TIOCSFLAGS: 1038 sc->sc_swflags = *(int *)data; 1039 break; 1040 1041 case TIOCMSET: 1042 case TIOCMBIS: 1043 case TIOCMBIC: 1044 tiocm_to_plcom(sc, cmd, *(int *)data); 1045 break; 1046 1047 case TIOCMGET: 1048 *(int *)data = plcom_to_tiocm(sc); 1049 break; 1050 1051 case PPS_IOC_CREATE: 1052 break; 1053 1054 case PPS_IOC_DESTROY: 1055 break; 1056 1057 case PPS_IOC_GETPARAMS: { 1058 pps_params_t *pp; 1059 pp = (pps_params_t *)data; 1060 mutex_spin_enter(&timecounter_lock); 1061 *pp = sc->ppsparam; 1062 mutex_spin_exit(&timecounter_lock); 1063 break; 1064 } 1065 1066 case PPS_IOC_SETPARAMS: { 1067 pps_params_t *pp; 1068 int mode; 1069 pp = (pps_params_t *)data; 1070 mutex_spin_enter(&timecounter_lock); 1071 if (pp->mode & ~ppscap) { 1072 error = EINVAL; 1073 mutex_spin_exit(&timecounter_lock); 1074 break; 1075 } 1076 sc->ppsparam = *pp; 1077 /* 1078 * Compute msr masks from user-specified timestamp state. 1079 */ 1080 mode = sc->ppsparam.mode; 1081 #ifdef PPS_SYNC 1082 if (mode & PPS_HARDPPSONASSERT) { 1083 mode |= PPS_CAPTUREASSERT; 1084 /* XXX revoke any previous HARDPPS source */ 1085 } 1086 if (mode & PPS_HARDPPSONCLEAR) { 1087 mode |= PPS_CAPTURECLEAR; 1088 /* XXX revoke any previous HARDPPS source */ 1089 } 1090 #endif /* PPS_SYNC */ 1091 switch (mode & PPS_CAPTUREBOTH) { 1092 case 0: 1093 sc->sc_ppsmask = 0; 1094 break; 1095 1096 case PPS_CAPTUREASSERT: 1097 sc->sc_ppsmask = PL01X_MSR_DCD; 1098 sc->sc_ppsassert = PL01X_MSR_DCD; 1099 sc->sc_ppsclear = -1; 1100 break; 1101 1102 case PPS_CAPTURECLEAR: 1103 sc->sc_ppsmask = PL01X_MSR_DCD; 1104 sc->sc_ppsassert = -1; 1105 sc->sc_ppsclear = 0; 1106 break; 1107 1108 case PPS_CAPTUREBOTH: 1109 sc->sc_ppsmask = PL01X_MSR_DCD; 1110 sc->sc_ppsassert = PL01X_MSR_DCD; 1111 sc->sc_ppsclear = 0; 1112 break; 1113 1114 default: 1115 error = EINVAL; 1116 break; 1117 } 1118 mutex_spin_exit(&timecounter_lock); 1119 break; 1120 } 1121 1122 case PPS_IOC_GETCAP: 1123 *(int*)data = ppscap; 1124 break; 1125 1126 case PPS_IOC_FETCH: { 1127 pps_info_t *pi; 1128 pi = (pps_info_t *)data; 1129 mutex_spin_enter(&timecounter_lock); 1130 *pi = sc->ppsinfo; 1131 mutex_spin_exit(&timecounter_lock); 1132 break; 1133 } 1134 1135 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1136 /* 1137 * Some GPS clocks models use the falling rather than 1138 * rising edge as the on-the-second signal. 1139 * The old API has no way to specify PPS polarity. 1140 */ 1141 mutex_spin_enter(&timecounter_lock); 1142 sc->sc_ppsmask = PL01X_MSR_DCD; 1143 #ifndef PPS_TRAILING_EDGE 1144 sc->sc_ppsassert = PL01X_MSR_DCD; 1145 sc->sc_ppsclear = -1; 1146 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1147 &sc->ppsinfo.assert_timestamp); 1148 #else 1149 sc->sc_ppsassert = -1 1150 sc->sc_ppsclear = 0; 1151 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1152 &sc->ppsinfo.clear_timestamp); 1153 #endif 1154 mutex_spin_exit(&timecounter_lock); 1155 break; 1156 1157 default: 1158 error = EPASSTHROUGH; 1159 break; 1160 } 1161 1162 mutex_spin_exit(&sc->sc_lock); 1163 1164 #ifdef PLCOM_DEBUG 1165 if (plcom_debug) 1166 plcomstatus(sc, "plcomioctl "); 1167 #endif 1168 1169 return error; 1170 } 1171 1172 integrate void 1173 plcom_schedrx(struct plcom_softc *sc) 1174 { 1175 1176 sc->sc_rx_ready = 1; 1177 1178 /* Wake up the poller. */ 1179 softint_schedule(sc->sc_si); 1180 } 1181 1182 void 1183 plcom_break(struct plcom_softc *sc, int onoff) 1184 { 1185 1186 if (onoff) 1187 SET(sc->sc_lcr, PL01X_LCR_BRK); 1188 else 1189 CLR(sc->sc_lcr, PL01X_LCR_BRK); 1190 1191 if (!sc->sc_heldchange) { 1192 if (sc->sc_tx_busy) { 1193 sc->sc_heldtbc = sc->sc_tbc; 1194 sc->sc_tbc = 0; 1195 sc->sc_heldchange = 1; 1196 } else 1197 plcom_loadchannelregs(sc); 1198 } 1199 } 1200 1201 void 1202 plcom_modem(struct plcom_softc *sc, int onoff) 1203 { 1204 1205 if (sc->sc_mcr_dtr == 0) 1206 return; 1207 1208 if (onoff) 1209 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1210 else 1211 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1212 1213 if (!sc->sc_heldchange) { 1214 if (sc->sc_tx_busy) { 1215 sc->sc_heldtbc = sc->sc_tbc; 1216 sc->sc_tbc = 0; 1217 sc->sc_heldchange = 1; 1218 } else 1219 plcom_loadchannelregs(sc); 1220 } 1221 } 1222 1223 void 1224 tiocm_to_plcom(struct plcom_softc *sc, u_long how, int ttybits) 1225 { 1226 u_char plcombits; 1227 1228 plcombits = 0; 1229 if (ISSET(ttybits, TIOCM_DTR)) 1230 SET(plcombits, PL01X_MCR_DTR); 1231 if (ISSET(ttybits, TIOCM_RTS)) 1232 SET(plcombits, PL01X_MCR_RTS); 1233 1234 switch (how) { 1235 case TIOCMBIC: 1236 CLR(sc->sc_mcr, plcombits); 1237 break; 1238 1239 case TIOCMBIS: 1240 SET(sc->sc_mcr, plcombits); 1241 break; 1242 1243 case TIOCMSET: 1244 CLR(sc->sc_mcr, PL01X_MCR_DTR | PL01X_MCR_RTS); 1245 SET(sc->sc_mcr, plcombits); 1246 break; 1247 } 1248 1249 if (!sc->sc_heldchange) { 1250 if (sc->sc_tx_busy) { 1251 sc->sc_heldtbc = sc->sc_tbc; 1252 sc->sc_tbc = 0; 1253 sc->sc_heldchange = 1; 1254 } else 1255 plcom_loadchannelregs(sc); 1256 } 1257 } 1258 1259 int 1260 plcom_to_tiocm(struct plcom_softc *sc) 1261 { 1262 u_char plcombits; 1263 int ttybits = 0; 1264 1265 plcombits = sc->sc_mcr; 1266 if (ISSET(plcombits, PL01X_MCR_DTR)) 1267 SET(ttybits, TIOCM_DTR); 1268 if (ISSET(plcombits, PL01X_MCR_RTS)) 1269 SET(ttybits, TIOCM_RTS); 1270 1271 plcombits = sc->sc_msr; 1272 if (ISSET(plcombits, PL01X_MSR_DCD)) 1273 SET(ttybits, TIOCM_CD); 1274 if (ISSET(plcombits, PL01X_MSR_CTS)) 1275 SET(ttybits, TIOCM_CTS); 1276 if (ISSET(plcombits, PL01X_MSR_DSR)) 1277 SET(ttybits, TIOCM_DSR); 1278 if (ISSET(plcombits, PL011_MSR_RI)) 1279 SET(ttybits, TIOCM_RI); 1280 1281 if (sc->sc_cr != 0) 1282 SET(ttybits, TIOCM_LE); 1283 1284 return ttybits; 1285 } 1286 1287 static u_char 1288 cflag2lcr(tcflag_t cflag) 1289 { 1290 u_char lcr = 0; 1291 1292 switch (ISSET(cflag, CSIZE)) { 1293 case CS5: 1294 SET(lcr, PL01X_LCR_5BITS); 1295 break; 1296 case CS6: 1297 SET(lcr, PL01X_LCR_6BITS); 1298 break; 1299 case CS7: 1300 SET(lcr, PL01X_LCR_7BITS); 1301 break; 1302 case CS8: 1303 SET(lcr, PL01X_LCR_8BITS); 1304 break; 1305 } 1306 if (ISSET(cflag, PARENB)) { 1307 SET(lcr, PL01X_LCR_PEN); 1308 if (!ISSET(cflag, PARODD)) 1309 SET(lcr, PL01X_LCR_EPS); 1310 } 1311 if (ISSET(cflag, CSTOPB)) 1312 SET(lcr, PL01X_LCR_STP2); 1313 1314 return lcr; 1315 } 1316 1317 int 1318 plcomparam(struct tty *tp, struct termios *t) 1319 { 1320 struct plcom_softc *sc = 1321 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1322 struct plcom_instance *pi = &sc->sc_pi; 1323 int ospeed = -1; 1324 u_char lcr; 1325 1326 if (PLCOM_ISALIVE(sc) == 0) 1327 return EIO; 1328 1329 switch (pi->pi_type) { 1330 case PLCOM_TYPE_PL010: 1331 ospeed = pl010comspeed(t->c_ospeed, sc->sc_frequency); 1332 break; 1333 case PLCOM_TYPE_PL011: 1334 ospeed = pl011comspeed(t->c_ospeed, sc->sc_frequency); 1335 break; 1336 } 1337 1338 /* Check requested parameters. */ 1339 if (ospeed < 0) 1340 return EINVAL; 1341 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1342 return EINVAL; 1343 1344 /* 1345 * For the console, always force CLOCAL and !HUPCL, so that the port 1346 * is always active. 1347 */ 1348 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1349 ISSET(sc->sc_hwflags, PLCOM_HW_CONSOLE)) { 1350 SET(t->c_cflag, CLOCAL); 1351 CLR(t->c_cflag, HUPCL); 1352 } 1353 1354 /* 1355 * If there were no changes, don't do anything. This avoids dropping 1356 * input and improves performance when all we did was frob things like 1357 * VMIN and VTIME. 1358 */ 1359 if (tp->t_ospeed == t->c_ospeed && 1360 tp->t_cflag == t->c_cflag) 1361 return 0; 1362 1363 lcr = ISSET(sc->sc_lcr, PL01X_LCR_BRK) | cflag2lcr(t->c_cflag); 1364 1365 mutex_spin_enter(&sc->sc_lock); 1366 1367 sc->sc_lcr = lcr; 1368 1369 /* 1370 * PL010 has a fixed-length FIFO trigger point. 1371 */ 1372 if (ISSET(sc->sc_hwflags, PLCOM_HW_FIFO)) 1373 sc->sc_fifo = 1; 1374 else 1375 sc->sc_fifo = 0; 1376 1377 if (sc->sc_fifo) 1378 SET(sc->sc_lcr, PL01X_LCR_FEN); 1379 1380 /* 1381 * If we're not in a mode that assumes a connection is present, then 1382 * ignore carrier changes. 1383 */ 1384 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1385 sc->sc_msr_dcd = 0; 1386 else 1387 sc->sc_msr_dcd = PL01X_MSR_DCD; 1388 /* 1389 * Set the flow control pins depending on the current flow control 1390 * mode. 1391 */ 1392 if (ISSET(t->c_cflag, CRTSCTS)) { 1393 sc->sc_mcr_dtr = PL01X_MCR_DTR; 1394 sc->sc_mcr_rts = PL01X_MCR_RTS; 1395 sc->sc_msr_cts = PL01X_MSR_CTS; 1396 } else if (ISSET(t->c_cflag, MDMBUF)) { 1397 /* 1398 * For DTR/DCD flow control, make sure we don't toggle DTR for 1399 * carrier detection. 1400 */ 1401 sc->sc_mcr_dtr = 0; 1402 sc->sc_mcr_rts = PL01X_MCR_DTR; 1403 sc->sc_msr_cts = PL01X_MSR_DCD; 1404 } else { 1405 /* 1406 * If no flow control, then always set RTS. This will make 1407 * the other side happy if it mistakenly thinks we're doing 1408 * RTS/CTS flow control. 1409 */ 1410 sc->sc_mcr_dtr = PL01X_MCR_DTR | PL01X_MCR_RTS; 1411 sc->sc_mcr_rts = 0; 1412 sc->sc_msr_cts = 0; 1413 if (ISSET(sc->sc_mcr, PL01X_MCR_DTR)) 1414 SET(sc->sc_mcr, PL01X_MCR_RTS); 1415 else 1416 CLR(sc->sc_mcr, PL01X_MCR_RTS); 1417 } 1418 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1419 1420 #if 0 1421 if (ospeed == 0) 1422 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1423 else 1424 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1425 #endif 1426 1427 switch (pi->pi_type) { 1428 case PLCOM_TYPE_PL010: 1429 sc->sc_ratel = ospeed & 0xff; 1430 sc->sc_rateh = (ospeed >> 8) & 0xff; 1431 break; 1432 case PLCOM_TYPE_PL011: 1433 sc->sc_ratel = ospeed & ((1 << 6) - 1); 1434 sc->sc_rateh = ospeed >> 6; 1435 break; 1436 } 1437 1438 /* And copy to tty. */ 1439 tp->t_ispeed = t->c_ospeed; 1440 tp->t_ospeed = t->c_ospeed; 1441 tp->t_cflag = t->c_cflag; 1442 1443 if (!sc->sc_heldchange) { 1444 if (sc->sc_tx_busy) { 1445 sc->sc_heldtbc = sc->sc_tbc; 1446 sc->sc_tbc = 0; 1447 sc->sc_heldchange = 1; 1448 } else 1449 plcom_loadchannelregs(sc); 1450 } 1451 1452 if (!ISSET(t->c_cflag, CHWFLOW)) { 1453 /* Disable the high water mark. */ 1454 sc->sc_r_hiwat = 0; 1455 sc->sc_r_lowat = 0; 1456 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1457 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1458 plcom_schedrx(sc); 1459 } 1460 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1461 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1462 plcom_hwiflow(sc); 1463 } 1464 } else { 1465 sc->sc_r_hiwat = plcom_rbuf_hiwat; 1466 sc->sc_r_lowat = plcom_rbuf_lowat; 1467 } 1468 1469 mutex_spin_exit(&sc->sc_lock); 1470 1471 /* 1472 * Update the tty layer's idea of the carrier bit, in case we changed 1473 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1474 * explicit request. 1475 */ 1476 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, PL01X_MSR_DCD)); 1477 1478 #ifdef PLCOM_DEBUG 1479 if (plcom_debug) 1480 plcomstatus(sc, "plcomparam "); 1481 #endif 1482 1483 if (!ISSET(t->c_cflag, CHWFLOW)) { 1484 if (sc->sc_tx_stopped) { 1485 sc->sc_tx_stopped = 0; 1486 plcomstart(tp); 1487 } 1488 } 1489 1490 return 0; 1491 } 1492 1493 void 1494 plcom_iflush(struct plcom_softc *sc) 1495 { 1496 struct plcom_instance *pi = &sc->sc_pi; 1497 #ifdef DIAGNOSTIC 1498 int reg; 1499 #endif 1500 int timo; 1501 1502 #ifdef DIAGNOSTIC 1503 reg = 0xffff; 1504 #endif 1505 timo = 50000; 1506 /* flush any pending I/O */ 1507 while (! ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE) 1508 && --timo) 1509 #ifdef DIAGNOSTIC 1510 reg = 1511 #else 1512 (void) 1513 #endif 1514 PREAD1(pi, PL01XCOM_DR); 1515 #ifdef DIAGNOSTIC 1516 if (!timo) 1517 aprint_error_dev(sc->sc_dev, ": %s timeout %02x\n", __func__, 1518 reg); 1519 #endif 1520 } 1521 1522 void 1523 plcom_loadchannelregs(struct plcom_softc *sc) 1524 { 1525 struct plcom_instance *pi = &sc->sc_pi; 1526 1527 /* XXXXX necessary? */ 1528 plcom_iflush(sc); 1529 1530 switch (pi->pi_type) { 1531 case PLCOM_TYPE_PL010: 1532 PWRITE1(pi, PL010COM_CR, 0); 1533 if (sc->sc_frequency != 0) { 1534 PWRITE1(pi, PL010COM_DLBL, sc->sc_ratel); 1535 PWRITE1(pi, PL010COM_DLBH, sc->sc_rateh); 1536 } 1537 PWRITE1(pi, PL010COM_LCR, sc->sc_lcr); 1538 1539 /* XXX device_unit() abuse */ 1540 if (sc->sc_set_mcr) 1541 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1542 device_unit(sc->sc_dev), 1543 sc->sc_mcr_active = sc->sc_mcr); 1544 1545 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1546 break; 1547 1548 case PLCOM_TYPE_PL011: 1549 PWRITE4(pi, PL011COM_CR, 0); 1550 if (sc->sc_frequency != 0) { 1551 PWRITE1(pi, PL011COM_FBRD, sc->sc_ratel); 1552 PWRITE4(pi, PL011COM_IBRD, sc->sc_rateh); 1553 } 1554 PWRITE1(pi, PL011COM_LCRH, sc->sc_lcr); 1555 sc->sc_mcr_active = sc->sc_mcr; 1556 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1557 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1558 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1559 break; 1560 } 1561 } 1562 1563 int 1564 plcomhwiflow(struct tty *tp, int block) 1565 { 1566 struct plcom_softc *sc = 1567 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1568 1569 if (PLCOM_ISALIVE(sc) == 0) 1570 return 0; 1571 1572 if (sc->sc_mcr_rts == 0) 1573 return 0; 1574 1575 mutex_spin_enter(&sc->sc_lock); 1576 1577 if (block) { 1578 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1579 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1580 plcom_hwiflow(sc); 1581 } 1582 } else { 1583 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1584 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1585 plcom_schedrx(sc); 1586 } 1587 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1588 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1589 plcom_hwiflow(sc); 1590 } 1591 } 1592 1593 mutex_spin_exit(&sc->sc_lock); 1594 return 1; 1595 } 1596 1597 /* 1598 * (un)block input via hw flowcontrol 1599 */ 1600 void 1601 plcom_hwiflow(struct plcom_softc *sc) 1602 { 1603 struct plcom_instance *pi = &sc->sc_pi; 1604 1605 if (sc->sc_mcr_rts == 0) 1606 return; 1607 1608 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1609 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1610 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1611 } else { 1612 SET(sc->sc_mcr, sc->sc_mcr_rts); 1613 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1614 } 1615 switch (pi->pi_type) { 1616 case PLCOM_TYPE_PL010: 1617 if (sc->sc_set_mcr) 1618 /* XXX device_unit() abuse */ 1619 sc->sc_set_mcr(sc->sc_set_mcr_arg, 1620 device_unit(sc->sc_dev), sc->sc_mcr_active); 1621 break; 1622 case PLCOM_TYPE_PL011: 1623 CLR(sc->sc_cr, PL011_MCR(PL01X_MCR_RTS | PL01X_MCR_DTR)); 1624 SET(sc->sc_cr, PL011_MCR(sc->sc_mcr_active)); 1625 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 1626 break; 1627 } 1628 } 1629 1630 1631 void 1632 plcomstart(struct tty *tp) 1633 { 1634 struct plcom_softc *sc = 1635 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1636 struct plcom_instance *pi = &sc->sc_pi; 1637 int s; 1638 1639 if (PLCOM_ISALIVE(sc) == 0) 1640 return; 1641 1642 s = spltty(); 1643 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1644 goto out; 1645 if (sc->sc_tx_stopped) 1646 goto out; 1647 1648 if (!ttypull(tp)) 1649 goto out; 1650 1651 /* Grab the first contiguous region of buffer space. */ 1652 { 1653 u_char *tba; 1654 int tbc; 1655 1656 tba = tp->t_outq.c_cf; 1657 tbc = ndqb(&tp->t_outq, 0); 1658 1659 mutex_spin_enter(&sc->sc_lock); 1660 1661 sc->sc_tba = tba; 1662 sc->sc_tbc = tbc; 1663 } 1664 1665 SET(tp->t_state, TS_BUSY); 1666 sc->sc_tx_busy = 1; 1667 1668 /* Enable transmit completion interrupts if necessary. */ 1669 switch (pi->pi_type) { 1670 case PLCOM_TYPE_PL010: 1671 if (!ISSET(sc->sc_cr, PL010_CR_TIE)) { 1672 SET(sc->sc_cr, PL010_CR_TIE); 1673 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1674 } 1675 break; 1676 case PLCOM_TYPE_PL011: 1677 if (!ISSET(sc->sc_imsc, PL011_INT_TX)) { 1678 SET(sc->sc_imsc, PL011_INT_TX); 1679 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1680 } 1681 break; 1682 } 1683 1684 /* Output the first chunk of the contiguous buffer. */ 1685 { 1686 int n; 1687 1688 n = sc->sc_tbc; 1689 if (n > sc->sc_fifolen) 1690 n = sc->sc_fifolen; 1691 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 1692 sc->sc_tbc -= n; 1693 sc->sc_tba += n; 1694 } 1695 mutex_spin_exit(&sc->sc_lock); 1696 out: 1697 splx(s); 1698 return; 1699 } 1700 1701 /* 1702 * Stop output on a line. 1703 */ 1704 void 1705 plcomstop(struct tty *tp, int flag) 1706 { 1707 struct plcom_softc *sc = 1708 device_lookup_private(&plcom_cd, PLCOMUNIT(tp->t_dev)); 1709 1710 mutex_spin_enter(&sc->sc_lock); 1711 if (ISSET(tp->t_state, TS_BUSY)) { 1712 /* Stop transmitting at the next chunk. */ 1713 sc->sc_tbc = 0; 1714 sc->sc_heldtbc = 0; 1715 if (!ISSET(tp->t_state, TS_TTSTOP)) 1716 SET(tp->t_state, TS_FLUSH); 1717 } 1718 mutex_spin_exit(&sc->sc_lock); 1719 } 1720 1721 void 1722 plcomdiag(void *arg) 1723 { 1724 struct plcom_softc *sc = arg; 1725 int overflows, floods; 1726 1727 mutex_spin_enter(&sc->sc_lock); 1728 overflows = sc->sc_overflows; 1729 sc->sc_overflows = 0; 1730 floods = sc->sc_floods; 1731 sc->sc_floods = 0; 1732 sc->sc_errors = 0; 1733 mutex_spin_exit(&sc->sc_lock); 1734 1735 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1736 device_xname(sc->sc_dev), 1737 overflows, overflows == 1 ? "" : "s", 1738 floods, floods == 1 ? "" : "s"); 1739 } 1740 1741 integrate void 1742 plcom_rxsoft(struct plcom_softc *sc, struct tty *tp) 1743 { 1744 int (*rint) (int, struct tty *) = tp->t_linesw->l_rint; 1745 struct plcom_instance *pi = &sc->sc_pi; 1746 u_char *get, *end; 1747 u_int cc, scc; 1748 u_char rsr; 1749 int code; 1750 1751 end = sc->sc_ebuf; 1752 get = sc->sc_rbget; 1753 scc = cc = plcom_rbuf_size - sc->sc_rbavail; 1754 1755 if (cc == plcom_rbuf_size) { 1756 sc->sc_floods++; 1757 if (sc->sc_errors++ == 0) 1758 callout_reset(&sc->sc_diag_callout, 60 * hz, 1759 plcomdiag, sc); 1760 } 1761 1762 while (cc) { 1763 code = get[0]; 1764 rsr = get[1]; 1765 if (ISSET(rsr, PL01X_RSR_ERROR)) { 1766 if (ISSET(rsr, PL01X_RSR_OE)) { 1767 sc->sc_overflows++; 1768 if (sc->sc_errors++ == 0) 1769 callout_reset(&sc->sc_diag_callout, 1770 60 * hz, plcomdiag, sc); 1771 } 1772 if (ISSET(rsr, PL01X_RSR_BE | PL01X_RSR_FE)) 1773 SET(code, TTY_FE); 1774 if (ISSET(rsr, PL01X_RSR_PE)) 1775 SET(code, TTY_PE); 1776 } 1777 if ((*rint)(code, tp) == -1) { 1778 /* 1779 * The line discipline's buffer is out of space. 1780 */ 1781 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1782 /* 1783 * We're either not using flow control, or the 1784 * line discipline didn't tell us to block for 1785 * some reason. Either way, we have no way to 1786 * know when there's more space available, so 1787 * just drop the rest of the data. 1788 */ 1789 get += cc << 1; 1790 if (get >= end) 1791 get -= plcom_rbuf_size << 1; 1792 cc = 0; 1793 } else { 1794 /* 1795 * Don't schedule any more receive processing 1796 * until the line discipline tells us there's 1797 * space available (through plcomhwiflow()). 1798 * Leave the rest of the data in the input 1799 * buffer. 1800 */ 1801 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1802 } 1803 break; 1804 } 1805 get += 2; 1806 if (get >= end) 1807 get = sc->sc_rbuf; 1808 cc--; 1809 } 1810 1811 if (cc != scc) { 1812 sc->sc_rbget = get; 1813 mutex_spin_enter(&sc->sc_lock); 1814 1815 cc = sc->sc_rbavail += scc - cc; 1816 /* Buffers should be ok again, release possible block. */ 1817 if (cc >= sc->sc_r_lowat) { 1818 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1819 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1820 switch (pi->pi_type) { 1821 case PLCOM_TYPE_PL010: 1822 SET(sc->sc_cr, 1823 PL010_CR_RIE | PL010_CR_RTIE); 1824 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 1825 break; 1826 case PLCOM_TYPE_PL011: 1827 SET(sc->sc_imsc, 1828 PL011_INT_RX | PL011_INT_RT); 1829 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 1830 break; 1831 } 1832 } 1833 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1834 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1835 plcom_hwiflow(sc); 1836 } 1837 } 1838 mutex_spin_exit(&sc->sc_lock); 1839 } 1840 } 1841 1842 integrate void 1843 plcom_txsoft(struct plcom_softc *sc, struct tty *tp) 1844 { 1845 1846 CLR(tp->t_state, TS_BUSY); 1847 if (ISSET(tp->t_state, TS_FLUSH)) 1848 CLR(tp->t_state, TS_FLUSH); 1849 else 1850 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1851 (*tp->t_linesw->l_start)(tp); 1852 } 1853 1854 integrate void 1855 plcom_stsoft(struct plcom_softc *sc, struct tty *tp) 1856 { 1857 u_char msr, delta; 1858 1859 mutex_spin_enter(&sc->sc_lock); 1860 msr = sc->sc_msr; 1861 delta = sc->sc_msr_delta; 1862 sc->sc_msr_delta = 0; 1863 mutex_spin_exit(&sc->sc_lock); 1864 1865 if (ISSET(delta, sc->sc_msr_dcd)) { 1866 /* 1867 * Inform the tty layer that carrier detect changed. 1868 */ 1869 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, PL01X_MSR_DCD)); 1870 } 1871 1872 if (ISSET(delta, sc->sc_msr_cts)) { 1873 /* Block or unblock output according to flow control. */ 1874 if (ISSET(msr, sc->sc_msr_cts)) { 1875 sc->sc_tx_stopped = 0; 1876 (*tp->t_linesw->l_start)(tp); 1877 } else { 1878 sc->sc_tx_stopped = 1; 1879 } 1880 } 1881 1882 #ifdef PLCOM_DEBUG 1883 if (plcom_debug) 1884 plcomstatus(sc, "plcom_stsoft"); 1885 #endif 1886 } 1887 1888 void 1889 plcomsoft(void *arg) 1890 { 1891 struct plcom_softc *sc = arg; 1892 struct tty *tp; 1893 1894 if (PLCOM_ISALIVE(sc) == 0) 1895 return; 1896 1897 tp = sc->sc_tty; 1898 1899 if (sc->sc_rx_ready) { 1900 sc->sc_rx_ready = 0; 1901 plcom_rxsoft(sc, tp); 1902 } 1903 1904 if (sc->sc_st_check) { 1905 sc->sc_st_check = 0; 1906 plcom_stsoft(sc, tp); 1907 } 1908 1909 if (sc->sc_tx_done) { 1910 sc->sc_tx_done = 0; 1911 plcom_txsoft(sc, tp); 1912 } 1913 } 1914 1915 bool 1916 plcom_intstatus(struct plcom_instance *pi, u_int *istatus) 1917 { 1918 bool ret = false; 1919 u_int stat = 0; 1920 1921 switch (pi->pi_type) { 1922 case PLCOM_TYPE_PL010: 1923 stat = PREAD1(pi, PL010COM_IIR); 1924 ret = ISSET(stat, PL010_IIR_IMASK); 1925 break; 1926 case PLCOM_TYPE_PL011: 1927 stat = PREAD4(pi, PL011COM_MIS); 1928 ret = ISSET(stat, PL011_INT_ALLMASK); 1929 break; 1930 } 1931 *istatus = stat; 1932 1933 return ret; 1934 } 1935 1936 int 1937 plcomintr(void *arg) 1938 { 1939 struct plcom_softc *sc = arg; 1940 struct plcom_instance *pi = &sc->sc_pi; 1941 u_char *put, *end; 1942 u_int cc; 1943 u_int istatus = 0; 1944 u_char rsr; 1945 bool intr = false; 1946 1947 PLCOM_BARRIER(pi, BR | BW); 1948 1949 if (PLCOM_ISALIVE(sc) == 0) 1950 return 0; 1951 1952 mutex_spin_enter(&sc->sc_lock); 1953 intr = plcom_intstatus(pi, &istatus); 1954 if (!intr) { 1955 mutex_spin_exit(&sc->sc_lock); 1956 return 0; 1957 } 1958 1959 end = sc->sc_ebuf; 1960 put = sc->sc_rbput; 1961 cc = sc->sc_rbavail; 1962 1963 do { 1964 u_int msr = 0, delta, fr; 1965 bool rxintr = false, txintr = false, msintr; 1966 1967 /* don't need RI here*/ 1968 fr = PREAD1(pi, PL01XCOM_FR); 1969 1970 if (!ISSET(fr, PL01X_FR_RXFE) && 1971 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1972 while (cc > 0) { 1973 int cn_trapped = 0; 1974 put[0] = PREAD1(pi, PL01XCOM_DR); 1975 rsr = PREAD1(pi, PL01XCOM_RSR); 1976 /* Clear any error status. */ 1977 if (ISSET(rsr, PL01X_RSR_ERROR)) 1978 PWRITE1(pi, PL01XCOM_ECR, 0); 1979 if (ISSET(rsr, PL01X_RSR_BE)) { 1980 cn_trapped = 0; 1981 cn_check_magic(sc->sc_tty->t_dev, 1982 CNC_BREAK, plcom_cnm_state); 1983 if (cn_trapped) 1984 continue; 1985 #if defined(KGDB) 1986 if (ISSET(sc->sc_hwflags, 1987 PLCOM_HW_KGDB)) { 1988 kgdb_connect(1); 1989 continue; 1990 } 1991 #endif 1992 } 1993 1994 put[1] = rsr; 1995 cn_trapped = 0; 1996 cn_check_magic(sc->sc_tty->t_dev, put[0], 1997 plcom_cnm_state); 1998 if (cn_trapped) { 1999 fr = PREAD1(pi, PL01XCOM_FR); 2000 if (ISSET(fr, PL01X_FR_RXFE)) 2001 break; 2002 2003 continue; 2004 } 2005 put += 2; 2006 if (put >= end) 2007 put = sc->sc_rbuf; 2008 cc--; 2009 2010 /* don't need RI here*/ 2011 fr = PREAD1(pi, PL01XCOM_FR); 2012 if (ISSET(fr, PL01X_FR_RXFE)) 2013 break; 2014 } 2015 2016 /* 2017 * Current string of incoming characters ended because 2018 * no more data was available or we ran out of space. 2019 * Schedule a receive event if any data was received. 2020 * If we're out of space, turn off receive interrupts. 2021 */ 2022 sc->sc_rbput = put; 2023 sc->sc_rbavail = cc; 2024 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2025 sc->sc_rx_ready = 1; 2026 2027 /* 2028 * See if we are in danger of overflowing a buffer. If 2029 * so, use hardware flow control to ease the pressure. 2030 */ 2031 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2032 cc < sc->sc_r_hiwat) { 2033 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2034 plcom_hwiflow(sc); 2035 } 2036 2037 /* 2038 * If we're out of space, disable receive interrupts 2039 * until the queue has drained a bit. 2040 */ 2041 if (!cc) { 2042 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2043 switch (pi->pi_type) { 2044 case PLCOM_TYPE_PL010: 2045 CLR(sc->sc_cr, 2046 PL010_CR_RIE | PL010_CR_RTIE); 2047 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2048 break; 2049 case PLCOM_TYPE_PL011: 2050 CLR(sc->sc_imsc, 2051 PL011_INT_RT | PL011_INT_RX); 2052 PWRITE4(pi, PL011COM_IMSC, sc->sc_imsc); 2053 break; 2054 } 2055 } 2056 } else { 2057 switch (pi->pi_type) { 2058 case PLCOM_TYPE_PL010: 2059 rxintr = ISSET(istatus, PL010_IIR_RIS); 2060 if (rxintr) { 2061 PWRITE1(pi, PL010COM_CR, 0); 2062 delay(10); 2063 PWRITE1(pi, PL010COM_CR, sc->sc_cr); 2064 continue; 2065 } 2066 break; 2067 case PLCOM_TYPE_PL011: 2068 rxintr = ISSET(istatus, PL011_INT_RX); 2069 if (rxintr) { 2070 PWRITE4(pi, PL011COM_CR, 0); 2071 delay(10); 2072 PWRITE4(pi, PL011COM_CR, sc->sc_cr); 2073 continue; 2074 } 2075 break; 2076 } 2077 } 2078 2079 switch (pi->pi_type) { 2080 case PLCOM_TYPE_PL010: 2081 msr = PREAD1(pi, PL01XCOM_FR); 2082 break; 2083 case PLCOM_TYPE_PL011: 2084 msr = PREAD4(pi, PL01XCOM_FR); 2085 break; 2086 } 2087 delta = msr ^ sc->sc_msr; 2088 sc->sc_msr = msr; 2089 2090 /* Clear any pending modem status interrupt. */ 2091 switch (pi->pi_type) { 2092 case PLCOM_TYPE_PL010: 2093 msintr = ISSET(istatus, PL010_IIR_MIS); 2094 if (msintr) { 2095 PWRITE1(pi, PL010COM_ICR, 0); 2096 } 2097 break; 2098 case PLCOM_TYPE_PL011: 2099 msintr = ISSET(istatus, PL011_INT_MSMASK); 2100 if (msintr) { 2101 PWRITE4(pi, PL011COM_ICR, PL011_INT_MSMASK); 2102 } 2103 break; 2104 } 2105 /* 2106 * Pulse-per-second (PSS) signals on edge of DCD? 2107 * Process these even if line discipline is ignoring DCD. 2108 */ 2109 if (delta & sc->sc_ppsmask) { 2110 struct timeval tv; 2111 mutex_spin_enter(&timecounter_lock); 2112 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2113 /* XXX nanotime() */ 2114 microtime(&tv); 2115 TIMEVAL_TO_TIMESPEC(&tv, 2116 &sc->ppsinfo.assert_timestamp); 2117 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2118 timespecadd(&sc->ppsinfo.assert_timestamp, 2119 &sc->ppsparam.assert_offset, 2120 &sc->ppsinfo.assert_timestamp); 2121 } 2122 2123 #ifdef PPS_SYNC 2124 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2125 hardpps(&tv, tv.tv_usec); 2126 #endif 2127 sc->ppsinfo.assert_sequence++; 2128 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2129 2130 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2131 /* XXX nanotime() */ 2132 microtime(&tv); 2133 TIMEVAL_TO_TIMESPEC(&tv, 2134 &sc->ppsinfo.clear_timestamp); 2135 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2136 timespecadd(&sc->ppsinfo.clear_timestamp, 2137 &sc->ppsparam.clear_offset, 2138 &sc->ppsinfo.clear_timestamp); 2139 } 2140 2141 #ifdef PPS_SYNC 2142 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2143 hardpps(&tv, tv.tv_usec); 2144 #endif 2145 sc->ppsinfo.clear_sequence++; 2146 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2147 } 2148 mutex_spin_exit(&timecounter_lock); 2149 } 2150 2151 /* 2152 * Process normal status changes 2153 */ 2154 if (ISSET(delta, sc->sc_msr_mask)) { 2155 SET(sc->sc_msr_delta, delta); 2156 2157 /* 2158 * Stop output immediately if we lose the output 2159 * flow control signal or carrier detect. 2160 */ 2161 if (ISSET(~msr, sc->sc_msr_mask)) { 2162 sc->sc_tbc = 0; 2163 sc->sc_heldtbc = 0; 2164 #ifdef PLCOM_DEBUG 2165 if (plcom_debug) 2166 plcomstatus(sc, "plcomintr "); 2167 #endif 2168 } 2169 2170 sc->sc_st_check = 1; 2171 } 2172 2173 /* 2174 * Done handling any receive interrupts. See if data 2175 * can be transmitted as well. Schedule tx done 2176 * event if no data left and tty was marked busy. 2177 */ 2178 2179 switch (pi->pi_type) { 2180 case PLCOM_TYPE_PL010: 2181 txintr = ISSET(istatus, PL010_IIR_TIS); 2182 break; 2183 case PLCOM_TYPE_PL011: 2184 txintr = ISSET(istatus, PL011_INT_TX); 2185 break; 2186 } 2187 if (txintr) { 2188 /* 2189 * If we've delayed a parameter change, do it 2190 * now, and restart * output. 2191 */ 2192 // PWRITE4(pi, PL011COM_ICR, PL011_INT_TX); 2193 if (sc->sc_heldchange) { 2194 plcom_loadchannelregs(sc); 2195 sc->sc_heldchange = 0; 2196 sc->sc_tbc = sc->sc_heldtbc; 2197 sc->sc_heldtbc = 0; 2198 } 2199 2200 /* 2201 * Output the next chunk of the contiguous 2202 * buffer, if any. 2203 */ 2204 if (sc->sc_tbc > 0) { 2205 int n; 2206 2207 n = sc->sc_tbc; 2208 if (n > sc->sc_fifolen) 2209 n = sc->sc_fifolen; 2210 PWRITEM1(pi, PL01XCOM_DR, sc->sc_tba, n); 2211 sc->sc_tbc -= n; 2212 sc->sc_tba += n; 2213 } else { 2214 /* 2215 * Disable transmit completion 2216 * interrupts if necessary. 2217 */ 2218 switch (pi->pi_type) { 2219 case PLCOM_TYPE_PL010: 2220 if (ISSET(sc->sc_cr, PL010_CR_TIE)) { 2221 CLR(sc->sc_cr, PL010_CR_TIE); 2222 PWRITE1(pi, PL010COM_CR, 2223 sc->sc_cr); 2224 } 2225 break; 2226 case PLCOM_TYPE_PL011: 2227 if (ISSET(sc->sc_imsc, PL011_INT_TX)) { 2228 CLR(sc->sc_imsc, PL011_INT_TX); 2229 PWRITE4(pi, PL011COM_IMSC, 2230 sc->sc_imsc); 2231 } 2232 break; 2233 } 2234 if (sc->sc_tx_busy) { 2235 sc->sc_tx_busy = 0; 2236 sc->sc_tx_done = 1; 2237 } 2238 } 2239 } 2240 2241 } while (plcom_intstatus(pi, &istatus)); 2242 2243 mutex_spin_exit(&sc->sc_lock); 2244 2245 /* Wake up the poller. */ 2246 softint_schedule(sc->sc_si); 2247 2248 #ifdef RND_COM 2249 rnd_add_uint32(&sc->rnd_source, istatus | rsr); 2250 #endif 2251 2252 PLCOM_BARRIER(pi, BR | BW); 2253 2254 return 1; 2255 } 2256 2257 /* 2258 * The following functions are polled getc and putc routines, shared 2259 * by the console and kgdb glue. 2260 * 2261 * The read-ahead code is so that you can detect pending in-band 2262 * cn_magic in polled mode while doing output rather than having to 2263 * wait until the kernel decides it needs input. 2264 */ 2265 2266 #define MAX_READAHEAD 20 2267 static int plcom_readahead[MAX_READAHEAD]; 2268 static int plcom_readaheadcount = 0; 2269 2270 int 2271 plcom_common_getc(dev_t dev, struct plcom_instance *pi) 2272 { 2273 int s = splserial(); 2274 u_char c; 2275 2276 /* got a character from reading things earlier */ 2277 if (plcom_readaheadcount > 0) { 2278 int i; 2279 2280 c = plcom_readahead[0]; 2281 for (i = 1; i < plcom_readaheadcount; i++) { 2282 plcom_readahead[i-1] = plcom_readahead[i]; 2283 } 2284 plcom_readaheadcount--; 2285 splx(s); 2286 return c; 2287 } 2288 2289 if (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2290 splx(s); 2291 return -1; 2292 } 2293 2294 c = PREAD1(pi, PL01XCOM_DR); 2295 { 2296 int cn_trapped __unused = 0; 2297 #ifdef DDB 2298 extern int db_active; 2299 if (!db_active) 2300 #endif 2301 cn_check_magic(dev, c, plcom_cnm_state); 2302 } 2303 splx(s); 2304 return c; 2305 } 2306 2307 void 2308 plcom_common_putc(dev_t dev, struct plcom_instance *pi, int c) 2309 { 2310 int s = splserial(); 2311 int timo; 2312 2313 int cin, stat; 2314 if (plcom_readaheadcount < MAX_READAHEAD 2315 && !ISSET(stat = PREAD1(pi, PL01XCOM_FR), PL01X_FR_RXFE)) { 2316 int cn_trapped __unused = 0; 2317 cin = PREAD1(pi, PL01XCOM_DR); 2318 cn_check_magic(dev, cin, plcom_cnm_state); 2319 plcom_readahead[plcom_readaheadcount++] = cin; 2320 } 2321 2322 /* wait for any pending transmission to finish */ 2323 timo = 150000; 2324 while (ISSET(PREAD1(pi, PL01XCOM_FR), PL01X_FR_TXFF) && --timo) 2325 continue; 2326 2327 PWRITE1(pi, PL01XCOM_DR, c); 2328 PLCOM_BARRIER(pi, BR | BW); 2329 2330 splx(s); 2331 } 2332 2333 /* 2334 * Initialize UART for use as console or KGDB line. 2335 */ 2336 int 2337 plcominit(struct plcom_instance *pi, int rate, int frequency, tcflag_t cflag) 2338 { 2339 u_char lcr; 2340 2341 switch (pi->pi_type) { 2342 case PLCOM_TYPE_PL010: 2343 if (pi->pi_size == 0) 2344 pi->pi_size = PL010COM_UART_SIZE; 2345 break; 2346 case PLCOM_TYPE_PL011: 2347 if (pi->pi_size == 0) 2348 pi->pi_size = PL011COM_UART_SIZE; 2349 break; 2350 default: 2351 panic("Unknown plcom type"); 2352 } 2353 2354 if (bus_space_map(pi->pi_iot, pi->pi_iobase, pi->pi_size, 0, 2355 &pi->pi_ioh)) 2356 return ENOMEM; /* ??? */ 2357 2358 lcr = cflag2lcr(cflag) | PL01X_LCR_FEN; 2359 switch (pi->pi_type) { 2360 case PLCOM_TYPE_PL010: 2361 PWRITE1(pi, PL010COM_CR, 0); 2362 2363 if (rate && frequency) { 2364 rate = pl010comspeed(rate, frequency); 2365 PWRITE1(pi, PL010COM_DLBL, (rate & 0xff)); 2366 PWRITE1(pi, PL010COM_DLBH, ((rate >> 8) & 0xff)); 2367 } 2368 PWRITE1(pi, PL010COM_LCR, lcr); 2369 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2370 break; 2371 case PLCOM_TYPE_PL011: 2372 PWRITE4(pi, PL011COM_CR, 0); 2373 2374 if (rate && frequency) { 2375 rate = pl011comspeed(rate, frequency); 2376 PWRITE1(pi, PL011COM_FBRD, rate & ((1 << 6) - 1)); 2377 PWRITE4(pi, PL011COM_IBRD, rate >> 6); 2378 } 2379 PWRITE1(pi, PL011COM_LCRH, lcr); 2380 PWRITE4(pi, PL011COM_CR, 2381 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2382 break; 2383 } 2384 2385 #if 0 2386 /* Ought to do something like this, but we have no sc to 2387 dereference. */ 2388 /* XXX device_unit() abuse */ 2389 sc->sc_set_mcr(sc->sc_set_mcr_arg, device_unit(sc->sc_dev), 2390 PL01X_MCR_DTR | PL01X_MCR_RTS); 2391 #endif 2392 2393 return 0; 2394 } 2395 2396 /* 2397 * Following are all routines needed for PLCOM to act as console 2398 */ 2399 struct consdev plcomcons = { 2400 NULL, NULL, plcomcngetc, plcomcnputc, plcomcnpollc, NULL, 2401 plcomcnhalt, NULL, NODEV, CN_NORMAL 2402 }; 2403 2404 int 2405 plcomcnattach(struct plcom_instance *pi, int rate, int frequency, 2406 tcflag_t cflag, int unit) 2407 { 2408 int res; 2409 2410 plcomcons_info = *pi; 2411 2412 res = plcominit(&plcomcons_info, rate, frequency, cflag); 2413 if (res) 2414 return res; 2415 2416 cn_tab = &plcomcons; 2417 cn_init_magic(&plcom_cnm_state); 2418 cn_set_magic("\047\001"); /* default magic is BREAK */ 2419 2420 plcomconsunit = unit; 2421 plcomconsrate = rate; 2422 plcomconscflag = cflag; 2423 2424 return 0; 2425 } 2426 2427 void 2428 plcomcndetach(void) 2429 { 2430 2431 bus_space_unmap(plcomcons_info.pi_iot, plcomcons_info.pi_ioh, 2432 plcomcons_info.pi_size); 2433 plcomcons_info.pi_iot = NULL; 2434 2435 cn_tab = NULL; 2436 } 2437 2438 int 2439 plcomcngetc(dev_t dev) 2440 { 2441 return plcom_common_getc(dev, &plcomcons_info); 2442 } 2443 2444 /* 2445 * Console kernel output character routine. 2446 */ 2447 void 2448 plcomcnputc(dev_t dev, int c) 2449 { 2450 plcom_common_putc(dev, &plcomcons_info, c); 2451 } 2452 2453 void 2454 plcomcnpollc(dev_t dev, int on) 2455 { 2456 2457 plcom_readaheadcount = 0; 2458 } 2459 2460 void 2461 plcomcnhalt(dev_t dev) 2462 { 2463 struct plcom_instance *pi = &plcomcons_info; 2464 2465 switch (pi->pi_type) { 2466 case PLCOM_TYPE_PL010: 2467 PWRITE1(pi, PL010COM_CR, PL01X_CR_UARTEN); 2468 break; 2469 case PLCOM_TYPE_PL011: 2470 PWRITE4(pi, PL011COM_CR, 2471 PL01X_CR_UARTEN | PL011_CR_RXE | PL011_CR_TXE); 2472 PWRITE4(pi, PL011COM_IMSC, 0); 2473 break; 2474 } 2475 } 2476 2477 #ifdef KGDB 2478 int 2479 plcom_kgdb_attach(struct plcom_instance *pi, int rate, int frequency, 2480 tcflag_t cflag, int unit) 2481 { 2482 int res; 2483 2484 if (pi->pi_iot == plcomcons_info.pi_iot && 2485 pi->pi_iobase == plcomcons_info.pi_iobase) 2486 return EBUSY; /* cannot share with console */ 2487 2488 res = plcominit(pi, rate, frequency, cflag); 2489 if (res) 2490 return res; 2491 2492 kgdb_attach(plcom_kgdb_getc, plcom_kgdb_putc, NULL); 2493 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2494 2495 plcomkgdb_info.pi_iot = pi->pi_iot; 2496 plcomkgdb_info.pi_ioh = pi->pi_ioh; 2497 plcomkgdb_info.pi_iobase = pi->pi_iobase; 2498 2499 return 0; 2500 } 2501 2502 /* ARGSUSED */ 2503 int 2504 plcom_kgdb_getc(void *arg) 2505 { 2506 return plcom_common_getc(NODEV, &plcomkgdb_info); 2507 } 2508 2509 /* ARGSUSED */ 2510 void 2511 plcom_kgdb_putc(void *arg, int c) 2512 { 2513 plcom_common_putc(NODEV, &plcomkgdb_info, c); 2514 } 2515 #endif /* KGDB */ 2516 2517 /* helper function to identify the plcom ports used by 2518 console or KGDB (and not yet autoconf attached) */ 2519 int 2520 plcom_is_console(bus_space_tag_t iot, bus_addr_t iobase, 2521 bus_space_handle_t *ioh) 2522 { 2523 bus_space_handle_t help; 2524 2525 if (!plcomconsattached && 2526 bus_space_is_equal(iot, plcomcons_info.pi_iot) && 2527 iobase == plcomcons_info.pi_iobase) 2528 help = plcomcons_info.pi_ioh; 2529 #ifdef KGDB 2530 else if (!plcom_kgdb_attached && 2531 bus_space_is_equal(iot, plcomkgdb_info.pi_iot) && 2532 iobase == plcomkgdb_info.pi_iobase) 2533 help = plcomkgdb_info.pi_ioh; 2534 #endif 2535 else 2536 return 0; 2537 2538 if (ioh) 2539 *ioh = help; 2540 return 1; 2541 } 2542