1 /* $NetBSD: pvr.c,v 1.30 2010/10/24 13:34:27 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 Marcus Comstedt. 5 * Copyright (c) 2001 Jason R. Thorpe. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Marcus Comstedt. 19 * 4. Neither the name of The NetBSD Foundation nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 37 38 __KERNEL_RCSID(0, "$NetBSD: pvr.c,v 1.30 2010/10/24 13:34:27 tsutsui Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/device.h> 44 #include <sys/malloc.h> 45 #include <sys/buf.h> 46 #include <sys/ioctl.h> 47 48 #include <machine/vmparam.h> 49 #include <machine/cpu.h> 50 #include <machine/bus.h> 51 52 #include <dev/cons.h> 53 54 #include <dev/wscons/wsconsio.h> 55 #include <dev/wscons/wsdisplayvar.h> 56 57 #include <dev/wscons/wscons_callbacks.h> 58 59 #include <dev/rasops/rasops.h> 60 #include <dev/wsfont/wsfont.h> 61 62 #include <dreamcast/dev/pvrvar.h> 63 #include <dreamcast/dev/maple/mkbdvar.h> 64 65 #include "mkbd.h" 66 67 #define PVRREG_FBSTART 0x05000000 68 #define PVRREG_REGSTART 0x005f8000 69 70 #define PVRREG_BRDCOLR 0x40 71 #define BRDCOLR_BLUE(x) ((x) << 0) 72 #define BRDCOLR_GREEN(x) ((x) << 8) 73 #define BRDCOLR_RED(x) ((x) << 16) 74 75 #define PVRREG_DIWMODE 0x44 76 #define DIWMODE_DE (1U << 0) /* display enable */ 77 #define DIWMODE_SD (1U << 1) /* scan double enable */ 78 #define DIWMODE_COL(x) ((x) << 2) 79 #define DIWMODE_COL_RGB555 DIWMODE_COL(0) /* RGB555, 16-bit */ 80 #define DIWMODE_COL_RGB565 DIWMODE_COL(1) /* RGB565, 16-bit */ 81 #define DIWMODE_COL_RGB888 DIWMODE_COL(2) /* RGB888, 24-bit */ 82 #define DIWMODE_COL_ARGB888 DIWMODE_COL(3) /* RGB888, 32-bit */ 83 #define DIWMODE_C (1U << 23) /* 2x clock enable (VGA) */ 84 85 #define PVRREG_DIWADDRL 0x50 86 87 #define PVRREG_DIWADDRS 0x54 88 89 #define PVRREG_DIWSIZE 0x5c 90 #define DIWSIZE_DPL(x) ((x) << 0) /* pixel data per line */ 91 #define DIWSIZE_LPF(x) ((x) << 10) /* lines per field */ 92 #define DIWSIZE_MODULO(x) ((x) << 20) /* words to skip + 1 */ 93 94 #define PVRREG_RASEVTPOS 0xcc 95 #define RASEVTPOS_BOTTOM(x) ((x) << 0) 96 #define RASEVTPOS_TOP(x) ((x) << 16) 97 98 #define PVRREG_SYNCCONF 0xd0 99 #define SYNCCONF_VP (1U << 0) /* V-sync polarity */ 100 #define SYNCCONF_HP (1U << 1) /* H-sync polarity */ 101 #define SYNCCONF_I (1U << 4) /* interlace */ 102 #define SYNCCONF_BC(x) (1U << 6) /* broadcast standard */ 103 #define SYNCCONF_VO (1U << 8) /* video output enable */ 104 105 #define PVRREG_BRDHORZ 0xd4 106 #define BRDHORZ_STOP(x) ((x) << 0) 107 #define BRDHORZ_START(x) ((x) << 16) 108 109 #define PVRREG_SYNCSIZE 0xd8 110 #define SYNCSIZE_H(x) ((x) << 0) 111 #define SYNCSIZE_V(x) ((x) << 16) 112 113 #define PVRREG_BRDVERT 0xdc 114 #define BRDVERT_STOP(x) ((x) << 0) 115 #define BRDVERT_START(x) ((x) << 16) 116 117 #define PVRREG_DIWCONF 0xe8 118 #define DIWCONF_LR (1U << 8) /* low-res */ 119 #define DIWCONF_MAGIC (22 << 16) 120 121 #define PVRREG_DIWHSTRT 0xec 122 123 #define PVRREG_DIWVSTRT 0xf0 124 #define DIWVSTRT_V1(x) ((x) << 0) 125 #define DIWVSTRT_V2(x) ((x) << 16) 126 127 #define PVR_REG_READ(dc, reg) \ 128 ((volatile uint32_t *)(dc)->dc_regvaddr)[(reg) >> 2] 129 #define PVR_REG_WRITE(dc, reg, val) \ 130 ((volatile uint32_t *)(dc)->dc_regvaddr)[(reg) >> 2] = (val) 131 132 struct fb_devconfig { 133 vaddr_t dc_vaddr; /* framebuffer virtual address */ 134 vaddr_t dc_paddr; /* framebuffer physical address */ 135 vaddr_t dc_regvaddr; /* registers virtual address */ 136 vaddr_t dc_regpaddr; /* registers physical address */ 137 int dc_wid; /* width of frame buffer */ 138 int dc_ht; /* height of frame buffer */ 139 int dc_depth; /* depth, bits per pixel */ 140 int dc_rowbytes; /* bytes in a FB scan line */ 141 vaddr_t dc_videobase; /* base of flat frame buffer */ 142 int dc_blanked; /* currently has video disabled */ 143 int dc_dispflags; /* display flags */ 144 int dc_tvsystem; /* TV broadcast system */ 145 146 struct rasops_info rinfo; 147 }; 148 149 #define PVR_RGBMODE 0x01 /* RGB or composite */ 150 #define PVR_VGAMODE 0x02 /* VGA */ 151 152 struct pvr_softc { 153 device_t sc_dev; 154 struct fb_devconfig *sc_dc; /* device configuration */ 155 int nscreens; 156 }; 157 158 static int pvr_match(device_t, cfdata_t, void *); 159 static void pvr_attach(device_t, device_t, void *); 160 161 CFATTACH_DECL_NEW(pvr, sizeof(struct pvr_softc), 162 pvr_match, pvr_attach, NULL, NULL); 163 164 static void pvr_getdevconfig(struct fb_devconfig *); 165 166 static struct fb_devconfig pvr_console_dc; 167 168 static char pvr_stdscreen_textgeom[32] = { "std" }; /* XXX yuck */ 169 170 static struct wsscreen_descr pvr_stdscreen = { 171 pvr_stdscreen_textgeom, 0, 0, 172 0, /* textops */ 173 0, 0, 174 WSSCREEN_WSCOLORS, 175 }; 176 177 static const struct wsscreen_descr *_pvr_scrlist[] = { 178 &pvr_stdscreen, 179 }; 180 181 static const struct wsscreen_list pvr_screenlist = { 182 sizeof(_pvr_scrlist) / sizeof(struct wsscreen_descr *), _pvr_scrlist 183 }; 184 185 static int pvrioctl(void *, void *, u_long, void *, int, struct lwp *); 186 static paddr_t pvrmmap(void *, void *, off_t, int); 187 188 static int pvr_alloc_screen(void *, const struct wsscreen_descr *, 189 void **, int *, int *, long *); 190 static void pvr_free_screen(void *, void *); 191 static int pvr_show_screen(void *, void *, int, 192 void (*)(void *, int, int), void *); 193 194 static const struct wsdisplay_accessops pvr_accessops = { 195 pvrioctl, 196 pvrmmap, 197 pvr_alloc_screen, 198 pvr_free_screen, 199 pvr_show_screen, 200 NULL, /* load_font */ 201 }; 202 203 static void pvrinit(struct fb_devconfig *); 204 205 int pvr_is_console; 206 207 int 208 pvr_match(device_t parent, cfdata_t cf, void *aux) 209 { 210 211 return 1; 212 } 213 214 void 215 pvr_getdevconfig(struct fb_devconfig *dc) 216 { 217 int i, cookie; 218 219 dc->dc_paddr = PVRREG_FBSTART; 220 dc->dc_vaddr = SH3_PHYS_TO_P2SEG(dc->dc_paddr); 221 222 dc->dc_regpaddr = PVRREG_REGSTART; 223 dc->dc_regvaddr = SH3_PHYS_TO_P2SEG(dc->dc_regpaddr); 224 225 dc->dc_wid = 640; 226 dc->dc_ht = 480; 227 dc->dc_depth = 16; 228 dc->dc_rowbytes = dc->dc_wid * (dc->dc_depth / 8); 229 dc->dc_videobase = dc->dc_vaddr; 230 dc->dc_blanked = 0; 231 dc->dc_dispflags = 0; 232 233 /* Clear the screen. */ 234 for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(uint32_t)) 235 *(uint32_t *)(dc->dc_videobase + i) = 0x0; 236 237 /* Initialize the device. */ 238 pvrinit(dc); 239 240 dc->rinfo.ri_flg = 0; 241 if (dc == &pvr_console_dc) 242 dc->rinfo.ri_flg |= RI_NO_AUTO; 243 dc->rinfo.ri_depth = dc->dc_depth; 244 dc->rinfo.ri_bits = (void *) dc->dc_videobase; 245 dc->rinfo.ri_width = dc->dc_wid; 246 dc->rinfo.ri_height = dc->dc_ht; 247 dc->rinfo.ri_stride = dc->dc_rowbytes; 248 249 wsfont_init(); 250 /* prefer 8 pixel wide font */ 251 cookie = wsfont_find(NULL, 8, 0, 0, WSDISPLAY_FONTORDER_L2R, 252 WSDISPLAY_FONTORDER_L2R); 253 if (cookie <= 0) 254 cookie = wsfont_find(NULL, 0, 0, 0, WSDISPLAY_FONTORDER_L2R, 255 WSDISPLAY_FONTORDER_L2R); 256 if (cookie <= 0) { 257 printf("pvr: font table is empty\n"); 258 return; 259 } 260 261 if (wsfont_lock(cookie, &dc->rinfo.ri_font)) { 262 printf("pvr: unable to lock font\n"); 263 return; 264 } 265 dc->rinfo.ri_wsfcookie = cookie; 266 267 rasops_init(&dc->rinfo, 500, 500); 268 269 /* XXX shouldn't be global */ 270 pvr_stdscreen.nrows = dc->rinfo.ri_rows; 271 pvr_stdscreen.ncols = dc->rinfo.ri_cols; 272 pvr_stdscreen.textops = &dc->rinfo.ri_ops; 273 pvr_stdscreen.capabilities = dc->rinfo.ri_caps; 274 275 /* XXX yuck */ 276 sprintf(pvr_stdscreen_textgeom, "%dx%d", pvr_stdscreen.ncols, 277 pvr_stdscreen.nrows); 278 } 279 280 void 281 pvr_attach(device_t parent, device_t self, void *aux) 282 { 283 struct pvr_softc *sc = device_private(self); 284 struct wsemuldisplaydev_attach_args waa; 285 int console; 286 static const char *tvsystem_name[4] = 287 { "NTSC", "PAL", "PAL-M", "PAL-N" }; 288 289 sc->sc_dev = self; 290 console = pvr_is_console; 291 if (console) { 292 sc->sc_dc = &pvr_console_dc; 293 sc->sc_dc->rinfo.ri_flg &= ~RI_NO_AUTO; 294 sc->nscreens = 1; 295 } else { 296 sc->sc_dc = malloc(sizeof(struct fb_devconfig), M_DEVBUF, 297 M_WAITOK); 298 pvr_getdevconfig(sc->sc_dc); 299 } 300 printf(": %d x %d, %dbpp, %s, %s\n", sc->sc_dc->dc_wid, 301 sc->sc_dc->dc_ht, sc->sc_dc->dc_depth, 302 (sc->sc_dc->dc_dispflags & PVR_VGAMODE) ? "VGA" : 303 tvsystem_name[sc->sc_dc->dc_tvsystem], 304 (sc->sc_dc->dc_dispflags & PVR_RGBMODE) ? "RGB" : "composite"); 305 306 /* XXX Colormap initialization? */ 307 308 waa.console = console; 309 waa.scrdata = &pvr_screenlist; 310 waa.accessops = &pvr_accessops; 311 waa.accesscookie = sc; 312 313 (void) config_found(self, &waa, wsemuldisplaydevprint); 314 } 315 316 int 317 pvrioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 318 { 319 struct pvr_softc *sc = v; 320 struct fb_devconfig *dc = sc->sc_dc; 321 322 switch (cmd) { 323 case WSDISPLAYIO_GTYPE: 324 *(u_int *)data = WSDISPLAY_TYPE_DCPVR; 325 return 0; 326 327 case WSDISPLAYIO_GINFO: 328 #define wsd_fbip ((struct wsdisplay_fbinfo *)data) 329 wsd_fbip->height = sc->sc_dc->dc_ht; 330 wsd_fbip->width = sc->sc_dc->dc_wid; 331 wsd_fbip->depth = sc->sc_dc->dc_depth; 332 wsd_fbip->cmsize = 0; /* XXX Colormap */ 333 #undef wsd_fbip 334 return 0; 335 336 case WSDISPLAYIO_LINEBYTES: 337 *(u_int *)data = sc->sc_dc->rinfo.ri_stride; 338 return 0; 339 340 case WSDISPLAYIO_GETCMAP: 341 case WSDISPLAYIO_PUTCMAP: 342 return EPASSTHROUGH; /* XXX Colormap */ 343 344 case WSDISPLAYIO_SVIDEO: 345 switch (*(u_int *)data) { 346 case WSDISPLAYIO_VIDEO_OFF: 347 if (!dc->dc_blanked) { 348 dc->dc_blanked = 1; 349 PVR_REG_WRITE(dc, PVRREG_DIWMODE, 350 PVR_REG_READ(dc, PVRREG_DIWMODE) & 351 ~DIWMODE_DE); 352 } 353 break; 354 case WSDISPLAYIO_VIDEO_ON: 355 if (dc->dc_blanked) { 356 dc->dc_blanked = 0; 357 PVR_REG_WRITE(dc, PVRREG_DIWMODE, 358 PVR_REG_READ(dc, PVRREG_DIWMODE) | 359 DIWMODE_DE); 360 } 361 break; 362 default: 363 return EPASSTHROUGH; /* XXX */ 364 } 365 return 0; 366 367 case WSDISPLAYIO_GVIDEO: 368 *(u_int *)data = dc->dc_blanked ? 369 WSDISPLAYIO_VIDEO_OFF : WSDISPLAYIO_VIDEO_ON; 370 return 0; 371 372 case WSDISPLAYIO_GCURPOS: 373 case WSDISPLAYIO_SCURPOS: 374 case WSDISPLAYIO_GCURMAX: 375 case WSDISPLAYIO_GCURSOR: 376 case WSDISPLAYIO_SCURSOR: 377 return EPASSTHROUGH; /* XXX */ 378 } 379 380 return EPASSTHROUGH; 381 } 382 383 paddr_t 384 pvrmmap(void *v, void *vs, off_t offset, int prot) 385 { 386 387 /* 388 * XXX This should be easy to support -- just need to define 389 * XXX offsets for the contol regs, etc. 390 */ 391 392 struct pvr_softc *sc = v; 393 struct fb_devconfig *dc = sc->sc_dc; 394 paddr_t addr; 395 396 if (offset >= 0 && 397 offset < sh3_round_page(dc->dc_rowbytes * dc->dc_ht)) 398 addr = sh3_btop(dc->dc_paddr + offset); 399 else 400 addr = (-1); /* XXX bogus */ 401 402 return addr; 403 } 404 405 int 406 pvr_alloc_screen(void *v, const struct wsscreen_descr *type, 407 void **cookiep, int *curxp, int *curyp, long *attrp) 408 { 409 struct pvr_softc *sc = v; 410 long defattr; 411 412 if (sc->nscreens > 0) 413 return ENOMEM; 414 415 *cookiep = &sc->sc_dc->rinfo; /* one and only for now */ 416 *curxp = 0; 417 *curyp = 0; 418 (*sc->sc_dc->rinfo.ri_ops.allocattr)(&sc->sc_dc->rinfo, 0, 0, 0, 419 &defattr); 420 *attrp = defattr; 421 sc->nscreens++; 422 return 0; 423 } 424 425 void 426 pvr_free_screen(void *v, void *cookie) 427 { 428 struct pvr_softc *sc = v; 429 430 if (sc->sc_dc == &pvr_console_dc) 431 panic("pvr_free_screen: console"); 432 433 sc->nscreens--; 434 } 435 436 int 437 pvr_show_screen(void *v, void *cookie, int waitok, 438 void (*cb)(void *, int, int), void *cbarg) 439 { 440 441 return 0; 442 } 443 444 static void 445 pvr_check_cable(struct fb_devconfig *dc) 446 { 447 volatile uint32_t *porta = 448 (volatile uint32_t *)0xff80002c; 449 uint16_t v; 450 451 /* PORT8 and PORT9 is input */ 452 *porta = (*porta & ~0xf0000) | 0xa0000; 453 454 /* Read PORT8 and PORT9 */ 455 v = ((*(volatile uint16_t *)(porta + 1)) >> 8) & 3; 456 457 if ((v & 2) == 0) 458 dc->dc_dispflags |= PVR_VGAMODE|PVR_RGBMODE; 459 else if ((v & 1) == 0) 460 dc->dc_dispflags |= PVR_RGBMODE; 461 } 462 463 static void 464 pvr_check_tvsys(struct fb_devconfig *dc) 465 { 466 467 /* XXX should use flashmem device when one exists */ 468 dc->dc_tvsystem = (*(volatile uint8_t *)0xa021a004) & 3; 469 } 470 471 void 472 pvrinit(struct fb_devconfig *dc) 473 { 474 int display_lines_per_field; 475 int v_absolute_size; 476 int h_absolute_size; 477 int vborder_start, vborder_stop; 478 int hborder_start, hborder_stop; 479 int modulo = 1, voffset, hoffset; 480 481 pvr_check_cable(dc); 482 pvr_check_tvsys(dc); 483 484 PVR_REG_WRITE(dc, 8, 0); /* reset */ 485 PVR_REG_WRITE(dc, PVRREG_BRDCOLR, 0); /* black border */ 486 487 if (dc->dc_dispflags & PVR_VGAMODE) { 488 v_absolute_size = 524; 489 h_absolute_size = 857; 490 491 display_lines_per_field = 480; 492 hoffset = 164; 493 voffset = 36; 494 495 hborder_start = 126; 496 hborder_stop = 837; 497 498 vborder_start = 40; 499 vborder_stop = 444; /* XXX */ 500 501 /* 31kHz, RGB565 */ 502 PVR_REG_WRITE(dc, PVRREG_DIWMODE, 503 DIWMODE_C | DIWMODE_COL_RGB565); 504 505 /* video output */ 506 PVR_REG_WRITE(dc, PVRREG_SYNCCONF, SYNCCONF_VO); 507 } else { 508 if (dc->dc_tvsystem & 1) { 509 /* 50 Hz PAL */ 510 v_absolute_size = 624; 511 h_absolute_size = 863; 512 513 display_lines_per_field = 240; 514 hoffset = 174; 515 voffset = 18; 516 517 hborder_start = 116; 518 hborder_stop = 843; 519 520 vborder_start = 44; 521 vborder_stop = 536; /* XXX */ 522 } else { 523 /* 60 Hz NTSC */ 524 v_absolute_size = 524; 525 h_absolute_size = 857; 526 527 display_lines_per_field = 240; 528 hoffset = 170; 529 voffset = 28; 530 531 hborder_start = 126; 532 hborder_stop = 837; 533 534 vborder_start = 18; 535 vborder_stop = 506; /* XXX */ 536 } 537 538 modulo += 640 * 2 / 4; /* interlace -> skip every other line */ 539 540 /* 15kHz, RGB565 */ 541 PVR_REG_WRITE(dc, PVRREG_DIWMODE, 542 DIWMODE_COL_RGB565); 543 544 /* video output, PAL/NTSC, interlace */ 545 PVR_REG_WRITE(dc, PVRREG_SYNCCONF, 546 SYNCCONF_VO | SYNCCONF_I | SYNCCONF_BC(dc->dc_tvsystem)); 547 } 548 549 /* video base address, long field */ 550 PVR_REG_WRITE(dc, PVRREG_DIWADDRL, 0); 551 552 /* video base address, short field */ 553 PVR_REG_WRITE(dc, PVRREG_DIWADDRS, 640 * 2); 554 555 /* video size */ 556 PVR_REG_WRITE(dc, PVRREG_DIWSIZE, DIWSIZE_MODULO(modulo) | 557 DIWSIZE_LPF(display_lines_per_field - 1) | 558 DIWSIZE_DPL(640 * 2 / 4 - 1)); 559 560 PVR_REG_WRITE(dc, PVRREG_DIWVSTRT, /* V start */ 561 DIWVSTRT_V1(voffset) | DIWVSTRT_V2(voffset)); 562 PVR_REG_WRITE(dc, PVRREG_BRDVERT, /* V border */ 563 BRDVERT_START(vborder_start) | BRDVERT_STOP(vborder_stop)); 564 PVR_REG_WRITE(dc, PVRREG_DIWHSTRT, hoffset); /* H start */ 565 PVR_REG_WRITE(dc, PVRREG_SYNCSIZE, /* HV counter */ 566 SYNCSIZE_V(v_absolute_size) | SYNCSIZE_H(h_absolute_size)); 567 PVR_REG_WRITE(dc, PVRREG_BRDHORZ, /* H border */ 568 BRDHORZ_START(hborder_start) | BRDHORZ_STOP(hborder_stop)); 569 PVR_REG_WRITE(dc, PVRREG_DIWCONF, DIWCONF_MAGIC); 570 571 /* RGB / composite */ 572 *(volatile uint32_t *) 573 SH3_PHYS_TO_P2SEG(0x00702c00) = 574 ((dc->dc_dispflags & PVR_RGBMODE) ? 0 : 3) << 8; 575 576 /* display on */ 577 PVR_REG_WRITE(dc, PVRREG_DIWMODE, 578 PVR_REG_READ(dc, PVRREG_DIWMODE) | DIWMODE_DE); 579 } 580 581 /* Console support. */ 582 583 void 584 pvrcninit(struct consdev *cndev) 585 { 586 struct fb_devconfig *dcp = &pvr_console_dc; 587 long defattr; 588 589 pvr_getdevconfig(dcp); 590 (*dcp->rinfo.ri_ops.allocattr)(&dcp->rinfo, 0, 0, 0, &defattr); 591 wsdisplay_cnattach(&pvr_stdscreen, &dcp->rinfo, 0, 0, defattr); 592 593 pvr_is_console = 1; 594 595 cn_tab->cn_pri = CN_INTERNAL; 596 597 #if NMKBD > 0 598 mkbd_cnattach(); /* connect keyboard and screen together */ 599 #endif 600 } 601 602 void 603 pvrcnprobe(struct consdev *cndev) 604 { 605 #if NWSDISPLAY > 0 606 int maj, unit; 607 extern const struct cdevsw wsdisplay_cdevsw; 608 #endif 609 cndev->cn_dev = NODEV; 610 cndev->cn_pri = CN_NORMAL; 611 612 #if NWSDISPLAY > 0 613 unit = 0; 614 maj = cdevsw_lookup_major(&wsdisplay_cdevsw); 615 if (maj != -1) { 616 cndev->cn_pri = CN_INTERNAL; 617 cndev->cn_dev = makedev(maj, unit); 618 } 619 #endif 620 } 621