xref: /netbsd-src/sys/arch/dreamcast/dev/pvr.c (revision c7fb772b85b2b5d4cfb282f868f454b4701534fd)
1*c7fb772bSthorpej /*	$NetBSD: pvr.c,v 1.39 2021/08/07 16:18:47 thorpej Exp $	*/
2839caf10Smarcus 
328f7e6ddSmarcus /*-
4fbfc0872Sthorpej  * Copyright (c) 2001 Marcus Comstedt.
5fbfc0872Sthorpej  * Copyright (c) 2001 Jason R. Thorpe.
6839caf10Smarcus  * All rights reserved.
7839caf10Smarcus  *
8839caf10Smarcus  * Redistribution and use in source and binary forms, with or without
9839caf10Smarcus  * modification, are permitted provided that the following conditions
10839caf10Smarcus  * are met:
11839caf10Smarcus  * 1. Redistributions of source code must retain the above copyright
12839caf10Smarcus  *    notice, this list of conditions and the following disclaimer.
13839caf10Smarcus  * 2. Redistributions in binary form must reproduce the above copyright
14839caf10Smarcus  *    notice, this list of conditions and the following disclaimer in the
15839caf10Smarcus  *    documentation and/or other materials provided with the distribution.
16839caf10Smarcus  * 3. All advertising materials mentioning features or use of this software
17839caf10Smarcus  *    must display the following acknowledgement:
1828f7e6ddSmarcus  *	This product includes software developed by Marcus Comstedt.
1928f7e6ddSmarcus  * 4. Neither the name of The NetBSD Foundation nor the names of its
2028f7e6ddSmarcus  *    contributors may be used to endorse or promote products derived
2128f7e6ddSmarcus  *    from this software without specific prior written permission.
22839caf10Smarcus  *
2328f7e6ddSmarcus  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
2428f7e6ddSmarcus  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
2528f7e6ddSmarcus  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
2628f7e6ddSmarcus  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
2728f7e6ddSmarcus  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2828f7e6ddSmarcus  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2928f7e6ddSmarcus  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
3028f7e6ddSmarcus  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
3128f7e6ddSmarcus  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
3228f7e6ddSmarcus  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
3328f7e6ddSmarcus  * POSSIBILITY OF SUCH DAMAGE.
34839caf10Smarcus  */
35839caf10Smarcus 
36839caf10Smarcus #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
37839caf10Smarcus 
38*c7fb772bSthorpej __KERNEL_RCSID(0, "$NetBSD: pvr.c,v 1.39 2021/08/07 16:18:47 thorpej Exp $");
39fbfc0872Sthorpej 
40839caf10Smarcus #include <sys/param.h>
41839caf10Smarcus #include <sys/systm.h>
42839caf10Smarcus #include <sys/kernel.h>
43839caf10Smarcus #include <sys/device.h>
44839caf10Smarcus #include <sys/malloc.h>
45fbfc0872Sthorpej #include <sys/buf.h>
46fbfc0872Sthorpej #include <sys/ioctl.h>
4786b5be6eSdyoung #include <sys/bus.h>
48839caf10Smarcus 
49b8e4c037Sthorpej #include <machine/vmparam.h>
50839caf10Smarcus #include <machine/cpu.h>
51839caf10Smarcus 
52839caf10Smarcus #include <dev/cons.h>
53839caf10Smarcus 
54fbfc0872Sthorpej #include <dev/wscons/wsconsio.h>
55fbfc0872Sthorpej #include <dev/wscons/wsdisplayvar.h>
56fbfc0872Sthorpej 
57fbfc0872Sthorpej #include <dev/wscons/wscons_callbacks.h>
58fbfc0872Sthorpej 
59fbfc0872Sthorpej #include <dev/rasops/rasops.h>
60fbfc0872Sthorpej #include <dev/wsfont/wsfont.h>
61fbfc0872Sthorpej 
62839caf10Smarcus #include <dreamcast/dev/pvrvar.h>
63839caf10Smarcus #include <dreamcast/dev/maple/mkbdvar.h>
64839caf10Smarcus 
65839caf10Smarcus #include "mkbd.h"
66839caf10Smarcus 
67b8e4c037Sthorpej #define	PVRREG_FBSTART		0x05000000
68b8e4c037Sthorpej #define	PVRREG_REGSTART		0x005f8000
69b8e4c037Sthorpej 
70b8e4c037Sthorpej #define	PVRREG_BRDCOLR		0x40
71b8e4c037Sthorpej #define	BRDCOLR_BLUE(x)		((x) << 0)
72b8e4c037Sthorpej #define	BRDCOLR_GREEN(x)	((x) << 8)
73b8e4c037Sthorpej #define	BRDCOLR_RED(x)		((x) << 16)
74b8e4c037Sthorpej 
75b8e4c037Sthorpej #define	PVRREG_DIWMODE		0x44
76b8e4c037Sthorpej #define	DIWMODE_DE		(1U << 0)	/* display enable */
77b8e4c037Sthorpej #define	DIWMODE_SD		(1U << 1)	/* scan double enable */
78b8e4c037Sthorpej #define	DIWMODE_COL(x)		((x) << 2)
79b8e4c037Sthorpej #define	DIWMODE_COL_RGB555	DIWMODE_COL(0)	/* RGB555, 16-bit */
80b8e4c037Sthorpej #define	DIWMODE_COL_RGB565	DIWMODE_COL(1)	/* RGB565, 16-bit */
81b8e4c037Sthorpej #define	DIWMODE_COL_RGB888	DIWMODE_COL(2)	/* RGB888, 24-bit */
82b8e4c037Sthorpej #define	DIWMODE_COL_ARGB888	DIWMODE_COL(3)	/* RGB888, 32-bit */
83b8e4c037Sthorpej #define	DIWMODE_C		(1U << 23)	/* 2x clock enable (VGA) */
84b8e4c037Sthorpej 
85b8e4c037Sthorpej #define	PVRREG_DIWADDRL		0x50
86b8e4c037Sthorpej 
87b8e4c037Sthorpej #define	PVRREG_DIWADDRS		0x54
88b8e4c037Sthorpej 
89b8e4c037Sthorpej #define	PVRREG_DIWSIZE		0x5c
90b8e4c037Sthorpej #define	DIWSIZE_DPL(x)		((x) << 0)	/* pixel data per line */
91b8e4c037Sthorpej #define	DIWSIZE_LPF(x)		((x) << 10)	/* lines per field */
92b8e4c037Sthorpej #define	DIWSIZE_MODULO(x)	((x) << 20)	/* words to skip + 1 */
93b8e4c037Sthorpej 
94b8e4c037Sthorpej #define	PVRREG_RASEVTPOS	0xcc
95b8e4c037Sthorpej #define	RASEVTPOS_BOTTOM(x)	((x) << 0)
96b8e4c037Sthorpej #define	RASEVTPOS_TOP(x)	((x) << 16)
97b8e4c037Sthorpej 
98b8e4c037Sthorpej #define	PVRREG_SYNCCONF		0xd0
99b8e4c037Sthorpej #define	SYNCCONF_VP		(1U << 0)	/* V-sync polarity */
100b8e4c037Sthorpej #define	SYNCCONF_HP		(1U << 1)	/* H-sync polarity */
101b8e4c037Sthorpej #define	SYNCCONF_I		(1U << 4)	/* interlace */
102b8e4c037Sthorpej #define	SYNCCONF_BC(x)		(1U << 6)	/* broadcast standard */
103b8e4c037Sthorpej #define	SYNCCONF_VO		(1U << 8)	/* video output enable */
104b8e4c037Sthorpej 
105b8e4c037Sthorpej #define	PVRREG_BRDHORZ		0xd4
106b8e4c037Sthorpej #define	BRDHORZ_STOP(x)		((x) << 0)
107b8e4c037Sthorpej #define	BRDHORZ_START(x)	((x) << 16)
108b8e4c037Sthorpej 
109b8e4c037Sthorpej #define	PVRREG_SYNCSIZE		0xd8
110b8e4c037Sthorpej #define	SYNCSIZE_H(x)		((x) << 0)
111b8e4c037Sthorpej #define	SYNCSIZE_V(x)		((x) << 16)
112b8e4c037Sthorpej 
113b8e4c037Sthorpej #define	PVRREG_BRDVERT		0xdc
114b8e4c037Sthorpej #define	BRDVERT_STOP(x)		((x) << 0)
115b8e4c037Sthorpej #define	BRDVERT_START(x)	((x) << 16)
116b8e4c037Sthorpej 
117b8e4c037Sthorpej #define	PVRREG_DIWCONF		0xe8
118b8e4c037Sthorpej #define	DIWCONF_LR		(1U << 8)	/* low-res */
119b8e4c037Sthorpej #define	DIWCONF_MAGIC		(22 << 16)
120b8e4c037Sthorpej 
121b8e4c037Sthorpej #define	PVRREG_DIWHSTRT		0xec
122b8e4c037Sthorpej 
123b8e4c037Sthorpej #define	PVRREG_DIWVSTRT		0xf0
124b8e4c037Sthorpej #define	DIWVSTRT_V1(x)		((x) << 0)
125b8e4c037Sthorpej #define	DIWVSTRT_V2(x)		((x) << 16)
126b8e4c037Sthorpej 
127b8e4c037Sthorpej #define	PVR_REG_READ(dc, reg)						\
1285f1c88d7Sperry 	((volatile uint32_t *)(dc)->dc_regvaddr)[(reg) >> 2]
129b8e4c037Sthorpej #define	PVR_REG_WRITE(dc, reg, val)					\
1305f1c88d7Sperry 	((volatile uint32_t *)(dc)->dc_regvaddr)[(reg) >> 2] = (val)
131b8e4c037Sthorpej 
132fbfc0872Sthorpej struct fb_devconfig {
133fbfc0872Sthorpej 	vaddr_t dc_vaddr;		/* framebuffer virtual address */
134fbfc0872Sthorpej 	vaddr_t dc_paddr;		/* framebuffer physical address */
135b8e4c037Sthorpej 	vaddr_t dc_regvaddr;		/* registers virtual address */
136b8e4c037Sthorpej 	vaddr_t dc_regpaddr;		/* registers physical address */
137fbfc0872Sthorpej 	int	dc_wid;			/* width of frame buffer */
138fbfc0872Sthorpej 	int	dc_ht;			/* height of frame buffer */
139fbfc0872Sthorpej 	int	dc_depth;		/* depth, bits per pixel */
140fbfc0872Sthorpej 	int	dc_rowbytes;		/* bytes in a FB scan line */
141fbfc0872Sthorpej 	vaddr_t	dc_videobase;		/* base of flat frame buffer */
142fbfc0872Sthorpej 	int	dc_blanked;		/* currently has video disabled */
1432ae9f715Sthorpej 	int	dc_dispflags;		/* display flags */
14403748479Smarcus 	int	dc_tvsystem;		/* TV broadcast system */
145839caf10Smarcus 
14608814574Stsutsui 	struct rasops_info dc_rinfo;
1478db5928aStsutsui 
1488db5928aStsutsui 	char dc_wsscrname[32];
1498db5928aStsutsui 	struct wsscreen_descr dc_wsscrdescr;
150fbfc0872Sthorpej };
151fbfc0872Sthorpej 
1522ae9f715Sthorpej #define	PVR_RGBMODE	0x01		/* RGB or composite */
1532ae9f715Sthorpej #define	PVR_VGAMODE	0x02		/* VGA */
1542ae9f715Sthorpej 
155fbfc0872Sthorpej struct pvr_softc {
15680b1067aStsutsui 	device_t sc_dev;
157fbfc0872Sthorpej 	struct fb_devconfig *sc_dc;	/* device configuration */
15808814574Stsutsui 	int sc_nscreens;
1598db5928aStsutsui 	const struct wsscreen_descr *sc_scrdescs[1];
1608db5928aStsutsui 	struct wsscreen_list sc_scrlist;
161fbfc0872Sthorpej };
162fbfc0872Sthorpej 
16368cd53d2Stsutsui static int	pvr_match(device_t, cfdata_t, void *);
16468cd53d2Stsutsui static void	pvr_attach(device_t, device_t, void *);
165839caf10Smarcus 
16680b1067aStsutsui CFATTACH_DECL_NEW(pvr, sizeof(struct pvr_softc),
167c5e91d44Sthorpej     pvr_match, pvr_attach, NULL, NULL);
168839caf10Smarcus 
16968cd53d2Stsutsui static void	pvr_getdevconfig(struct fb_devconfig *);
170839caf10Smarcus 
17168cd53d2Stsutsui static struct fb_devconfig pvr_console_dc;
172839caf10Smarcus 
17368cd53d2Stsutsui static int	pvrioctl(void *, void *, u_long, void *, int, struct lwp *);
17468cd53d2Stsutsui static paddr_t	pvrmmap(void *, void *, off_t, int);
175839caf10Smarcus 
17668cd53d2Stsutsui static int	pvr_alloc_screen(void *, const struct wsscreen_descr *,
177fbfc0872Sthorpej 		    void **, int *, int *, long *);
17868cd53d2Stsutsui static void	pvr_free_screen(void *, void *);
17968cd53d2Stsutsui static int	pvr_show_screen(void *, void *, int,
180fbfc0872Sthorpej 		    void (*)(void *, int, int), void *);
181839caf10Smarcus 
18268cd53d2Stsutsui static const struct wsdisplay_accessops pvr_accessops = {
183fbfc0872Sthorpej 	pvrioctl,
184fbfc0872Sthorpej 	pvrmmap,
185839caf10Smarcus 	pvr_alloc_screen,
186839caf10Smarcus 	pvr_free_screen,
187839caf10Smarcus 	pvr_show_screen,
188fbfc0872Sthorpej 	NULL, /* load_font */
189839caf10Smarcus };
190839caf10Smarcus 
19168cd53d2Stsutsui static void	pvrinit(struct fb_devconfig *);
192fbfc0872Sthorpej 
193fbfc0872Sthorpej int	pvr_is_console;
194fbfc0872Sthorpej 
195fbfc0872Sthorpej int
pvr_match(device_t parent,cfdata_t cf,void * aux)19680b1067aStsutsui pvr_match(device_t parent, cfdata_t cf, void *aux)
197fbfc0872Sthorpej {
198fbfc0872Sthorpej 
199cb6453dbStsutsui 	return 1;
200fbfc0872Sthorpej }
201fbfc0872Sthorpej 
202fbfc0872Sthorpej void
pvr_getdevconfig(struct fb_devconfig * dc)203fbfc0872Sthorpej pvr_getdevconfig(struct fb_devconfig *dc)
204fbfc0872Sthorpej {
205fbfc0872Sthorpej 	int i, cookie;
206fbfc0872Sthorpej 
207b8e4c037Sthorpej 	dc->dc_paddr = PVRREG_FBSTART;
208fbfc0872Sthorpej 	dc->dc_vaddr = SH3_PHYS_TO_P2SEG(dc->dc_paddr);
209fbfc0872Sthorpej 
210b8e4c037Sthorpej 	dc->dc_regpaddr = PVRREG_REGSTART;
211b8e4c037Sthorpej 	dc->dc_regvaddr = SH3_PHYS_TO_P2SEG(dc->dc_regpaddr);
212b8e4c037Sthorpej 
213fbfc0872Sthorpej 	dc->dc_wid = 640;
214fbfc0872Sthorpej 	dc->dc_ht = 480;
215fbfc0872Sthorpej 	dc->dc_depth = 16;
216fbfc0872Sthorpej 	dc->dc_rowbytes = dc->dc_wid * (dc->dc_depth / 8);
217fbfc0872Sthorpej 	dc->dc_videobase = dc->dc_vaddr;
218fbfc0872Sthorpej 	dc->dc_blanked = 0;
2192ae9f715Sthorpej 	dc->dc_dispflags = 0;
220fbfc0872Sthorpej 
221fbfc0872Sthorpej 	/* Clear the screen. */
222cb6453dbStsutsui 	for (i = 0; i < dc->dc_ht * dc->dc_rowbytes; i += sizeof(uint32_t))
223cb6453dbStsutsui 		*(uint32_t *)(dc->dc_videobase + i) = 0x0;
224fbfc0872Sthorpej 
225fbfc0872Sthorpej 	/* Initialize the device. */
226fbfc0872Sthorpej 	pvrinit(dc);
227fbfc0872Sthorpej 
22808814574Stsutsui 	dc->dc_rinfo.ri_flg = 0;
2292e8243baStsutsui 	if (dc == &pvr_console_dc)
23008814574Stsutsui 		dc->dc_rinfo.ri_flg |= RI_NO_AUTO;
23108814574Stsutsui 	dc->dc_rinfo.ri_depth = dc->dc_depth;
23208814574Stsutsui 	dc->dc_rinfo.ri_bits = (void *) dc->dc_videobase;
23308814574Stsutsui 	dc->dc_rinfo.ri_width = dc->dc_wid;
23408814574Stsutsui 	dc->dc_rinfo.ri_height = dc->dc_ht;
23508814574Stsutsui 	dc->dc_rinfo.ri_stride = dc->dc_rowbytes;
236fbfc0872Sthorpej 
237fbfc0872Sthorpej 	wsfont_init();
238fbfc0872Sthorpej 	/* prefer 8 pixel wide font */
239b89e39b9Sad 	cookie = wsfont_find(NULL, 8, 0, 0, WSDISPLAY_FONTORDER_L2R,
240ec24591fSmacallan 	    WSDISPLAY_FONTORDER_L2R, WSFONT_FIND_BITMAP);
241b89e39b9Sad 	if (cookie <= 0)
242b89e39b9Sad 		cookie = wsfont_find(NULL, 0, 0, 0, WSDISPLAY_FONTORDER_L2R,
243ec24591fSmacallan 		    WSDISPLAY_FONTORDER_L2R, WSFONT_FIND_BITMAP);
244fbfc0872Sthorpej 	if (cookie <= 0) {
245fbfc0872Sthorpej 		printf("pvr: font table is empty\n");
246fbfc0872Sthorpej 		return;
247fbfc0872Sthorpej 	}
248fbfc0872Sthorpej 
24908814574Stsutsui 	if (wsfont_lock(cookie, &dc->dc_rinfo.ri_font)) {
250fbfc0872Sthorpej 		printf("pvr: unable to lock font\n");
251fbfc0872Sthorpej 		return;
252fbfc0872Sthorpej 	}
25308814574Stsutsui 	dc->dc_rinfo.ri_wsfcookie = cookie;
254fbfc0872Sthorpej 
25508814574Stsutsui 	rasops_init(&dc->dc_rinfo, 500, 500);
256fbfc0872Sthorpej 
2578db5928aStsutsui 	dc->dc_wsscrdescr.name = dc->dc_wsscrname;
2588db5928aStsutsui 	dc->dc_wsscrdescr.ncols = dc->dc_rinfo.ri_cols;
2598db5928aStsutsui 	dc->dc_wsscrdescr.nrows = dc->dc_rinfo.ri_rows;
2608db5928aStsutsui 	dc->dc_wsscrdescr.textops = &dc->dc_rinfo.ri_ops;
2618db5928aStsutsui 	dc->dc_wsscrdescr.capabilities = dc->dc_rinfo.ri_caps;
262fbfc0872Sthorpej 
26398335431Schristos 	snprintf(dc->dc_wsscrname, sizeof(dc->dc_wsscrname), "%dx%d",
2648db5928aStsutsui 	    dc->dc_wsscrdescr.ncols, dc->dc_wsscrdescr.nrows);
265fbfc0872Sthorpej }
266fbfc0872Sthorpej 
267fbfc0872Sthorpej void
pvr_attach(device_t parent,device_t self,void * aux)26880b1067aStsutsui pvr_attach(device_t parent, device_t self, void *aux)
269fbfc0872Sthorpej {
27080b1067aStsutsui 	struct pvr_softc *sc = device_private(self);
271fbfc0872Sthorpej 	struct wsemuldisplaydev_attach_args waa;
272fbfc0872Sthorpej 	int console;
27303748479Smarcus 	static const char *tvsystem_name[4] =
27403748479Smarcus 		{ "NTSC", "PAL", "PAL-M", "PAL-N" };
275fbfc0872Sthorpej 
27680b1067aStsutsui 	sc->sc_dev = self;
277fbfc0872Sthorpej 	console = pvr_is_console;
278fbfc0872Sthorpej 	if (console) {
279fbfc0872Sthorpej 		sc->sc_dc = &pvr_console_dc;
28008814574Stsutsui 		sc->sc_dc->dc_rinfo.ri_flg &= ~RI_NO_AUTO;
28108814574Stsutsui 		sc->sc_nscreens = 1;
282fbfc0872Sthorpej 	} else {
283fbfc0872Sthorpej 		sc->sc_dc = malloc(sizeof(struct fb_devconfig), M_DEVBUF,
28456c764b6Stsutsui 		    M_WAITOK | M_ZERO);
285fbfc0872Sthorpej 		pvr_getdevconfig(sc->sc_dc);
286fbfc0872Sthorpej 	}
2872ae9f715Sthorpej 	printf(": %d x %d, %dbpp, %s, %s\n", sc->sc_dc->dc_wid,
2882ae9f715Sthorpej 	    sc->sc_dc->dc_ht, sc->sc_dc->dc_depth,
28903748479Smarcus 	    (sc->sc_dc->dc_dispflags & PVR_VGAMODE) ? "VGA" :
29003748479Smarcus 	       tvsystem_name[sc->sc_dc->dc_tvsystem],
2912ae9f715Sthorpej 	    (sc->sc_dc->dc_dispflags & PVR_RGBMODE) ? "RGB" : "composite");
292fbfc0872Sthorpej 
293fbfc0872Sthorpej 	/* XXX Colormap initialization? */
294fbfc0872Sthorpej 
2958db5928aStsutsui 	sc->sc_scrdescs[0] = &sc->sc_dc->dc_wsscrdescr;
2968db5928aStsutsui 	sc->sc_scrlist.nscreens = 1;
2978db5928aStsutsui 	sc->sc_scrlist.screens = sc->sc_scrdescs;
2988db5928aStsutsui 
299fbfc0872Sthorpej 	waa.console = console;
3008db5928aStsutsui 	waa.scrdata = &sc->sc_scrlist;
301fbfc0872Sthorpej 	waa.accessops = &pvr_accessops;
302fbfc0872Sthorpej 	waa.accesscookie = sc;
303fbfc0872Sthorpej 
304*c7fb772bSthorpej 	(void) config_found(self, &waa, wsemuldisplaydevprint, CFARGS_NONE);
305fbfc0872Sthorpej }
306fbfc0872Sthorpej 
307fbfc0872Sthorpej int
pvrioctl(void * v,void * vs,u_long cmd,void * data,int flag,struct lwp * l)30853524e44Schristos pvrioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l)
309fbfc0872Sthorpej {
310fbfc0872Sthorpej 	struct pvr_softc *sc = v;
311fbfc0872Sthorpej 	struct fb_devconfig *dc = sc->sc_dc;
312fbfc0872Sthorpej 
313fbfc0872Sthorpej 	switch (cmd) {
314fbfc0872Sthorpej 	case WSDISPLAYIO_GTYPE:
315fbfc0872Sthorpej 		*(u_int *)data = WSDISPLAY_TYPE_DCPVR;
316cb6453dbStsutsui 		return 0;
317fbfc0872Sthorpej 
318fbfc0872Sthorpej 	case WSDISPLAYIO_GINFO:
319fbfc0872Sthorpej #define	wsd_fbip ((struct wsdisplay_fbinfo *)data)
320fbfc0872Sthorpej 		wsd_fbip->height = sc->sc_dc->dc_ht;
321fbfc0872Sthorpej 		wsd_fbip->width = sc->sc_dc->dc_wid;
322fbfc0872Sthorpej 		wsd_fbip->depth = sc->sc_dc->dc_depth;
323fbfc0872Sthorpej 		wsd_fbip->cmsize = 0;	/* XXX Colormap */
324fbfc0872Sthorpej #undef wsd_fbip
325cb6453dbStsutsui 		return 0;
326fbfc0872Sthorpej 
327244ae535Stsutsui 	case WSDISPLAYIO_LINEBYTES:
32808814574Stsutsui 		*(u_int *)data = sc->sc_dc->dc_rinfo.ri_stride;
329244ae535Stsutsui 		return 0;
330244ae535Stsutsui 
331fbfc0872Sthorpej 	case WSDISPLAYIO_GETCMAP:
332fbfc0872Sthorpej 	case WSDISPLAYIO_PUTCMAP:
333cb6453dbStsutsui 		return EPASSTHROUGH;	/* XXX Colormap */
334fbfc0872Sthorpej 
335fbfc0872Sthorpej 	case WSDISPLAYIO_SVIDEO:
3364949a9aeStsutsui 		switch (*(u_int *)data) {
3374949a9aeStsutsui 		case WSDISPLAYIO_VIDEO_OFF:
3384949a9aeStsutsui 			if (!dc->dc_blanked) {
3394949a9aeStsutsui 				dc->dc_blanked = 1;
3404949a9aeStsutsui 				PVR_REG_WRITE(dc, PVRREG_DIWMODE,
3414949a9aeStsutsui 				    PVR_REG_READ(dc, PVRREG_DIWMODE) &
3424949a9aeStsutsui 				    ~DIWMODE_DE);
3434949a9aeStsutsui 			}
3444949a9aeStsutsui 			break;
3454949a9aeStsutsui 		case WSDISPLAYIO_VIDEO_ON:
3464949a9aeStsutsui 			if (dc->dc_blanked) {
3474949a9aeStsutsui 				dc->dc_blanked = 0;
3484949a9aeStsutsui 				PVR_REG_WRITE(dc, PVRREG_DIWMODE,
3494949a9aeStsutsui 				    PVR_REG_READ(dc, PVRREG_DIWMODE) |
3504949a9aeStsutsui 				    DIWMODE_DE);
3514949a9aeStsutsui 			}
3524949a9aeStsutsui 			break;
3534949a9aeStsutsui 		default:
354cb6453dbStsutsui 			return EPASSTHROUGH;	/* XXX */
3554949a9aeStsutsui 		}
356cb6453dbStsutsui 		return 0;
357fbfc0872Sthorpej 
358fbfc0872Sthorpej 	case WSDISPLAYIO_GVIDEO:
359fbfc0872Sthorpej 		*(u_int *)data = dc->dc_blanked ?
360fbfc0872Sthorpej 		    WSDISPLAYIO_VIDEO_OFF : WSDISPLAYIO_VIDEO_ON;
361cb6453dbStsutsui 		return 0;
362fbfc0872Sthorpej 
363fbfc0872Sthorpej 	case WSDISPLAYIO_GCURPOS:
364fbfc0872Sthorpej 	case WSDISPLAYIO_SCURPOS:
365fbfc0872Sthorpej 	case WSDISPLAYIO_GCURMAX:
366fbfc0872Sthorpej 	case WSDISPLAYIO_GCURSOR:
367fbfc0872Sthorpej 	case WSDISPLAYIO_SCURSOR:
368cb6453dbStsutsui 		return EPASSTHROUGH;	/* XXX */
369fbfc0872Sthorpej 	}
370fbfc0872Sthorpej 
371cb6453dbStsutsui 	return EPASSTHROUGH;
372fbfc0872Sthorpej }
373fbfc0872Sthorpej 
374fbfc0872Sthorpej paddr_t
pvrmmap(void * v,void * vs,off_t offset,int prot)3757a51d4ddSjmmv pvrmmap(void *v, void *vs, off_t offset, int prot)
376fbfc0872Sthorpej {
377fbfc0872Sthorpej 
378fbfc0872Sthorpej 	/*
379fbfc0872Sthorpej 	 * XXX This should be easy to support -- just need to define
38031f72197Sandvar 	 * XXX offsets for the control regs, etc.
381fbfc0872Sthorpej 	 */
382a6ecc2d5Smarcus 
383a6ecc2d5Smarcus 	struct pvr_softc *sc = v;
384a6ecc2d5Smarcus 	struct fb_devconfig *dc = sc->sc_dc;
385a6ecc2d5Smarcus 	paddr_t addr;
386a6ecc2d5Smarcus 
387a6ecc2d5Smarcus 	if (offset >= 0 &&
388a6ecc2d5Smarcus 	    offset < sh3_round_page(dc->dc_rowbytes * dc->dc_ht))
389a6ecc2d5Smarcus 		addr = sh3_btop(dc->dc_paddr + offset);
390a6ecc2d5Smarcus 	else
391a6ecc2d5Smarcus 		addr = (-1);	/* XXX bogus */
392a6ecc2d5Smarcus 
393a6ecc2d5Smarcus 	return addr;
394fbfc0872Sthorpej }
395fbfc0872Sthorpej 
396fbfc0872Sthorpej int
pvr_alloc_screen(void * v,const struct wsscreen_descr * type,void ** cookiep,int * curxp,int * curyp,long * attrp)397fbfc0872Sthorpej pvr_alloc_screen(void *v, const struct wsscreen_descr *type,
398fbfc0872Sthorpej     void **cookiep, int *curxp, int *curyp, long *attrp)
399fbfc0872Sthorpej {
400fbfc0872Sthorpej 	struct pvr_softc *sc = v;
401fbfc0872Sthorpej 	long defattr;
402fbfc0872Sthorpej 
40308814574Stsutsui 	if (sc->sc_nscreens > 0)
404cb6453dbStsutsui 		return ENOMEM;
405fbfc0872Sthorpej 
40608814574Stsutsui 	*cookiep = &sc->sc_dc->dc_rinfo; /* one and only for now */
407fbfc0872Sthorpej 	*curxp = 0;
408fbfc0872Sthorpej 	*curyp = 0;
40908814574Stsutsui 	(*sc->sc_dc->dc_rinfo.ri_ops.allocattr)(&sc->sc_dc->dc_rinfo, 0, 0, 0,
410fbfc0872Sthorpej 	    &defattr);
411fbfc0872Sthorpej 	*attrp = defattr;
41208814574Stsutsui 	sc->sc_nscreens++;
413cb6453dbStsutsui 	return 0;
414fbfc0872Sthorpej }
415fbfc0872Sthorpej 
416fbfc0872Sthorpej void
pvr_free_screen(void * v,void * cookie)417fbfc0872Sthorpej pvr_free_screen(void *v, void *cookie)
418fbfc0872Sthorpej {
419fbfc0872Sthorpej 	struct pvr_softc *sc = v;
420fbfc0872Sthorpej 
421fbfc0872Sthorpej 	if (sc->sc_dc == &pvr_console_dc)
422fbfc0872Sthorpej 		panic("pvr_free_screen: console");
423fbfc0872Sthorpej 
42408814574Stsutsui 	sc->sc_nscreens--;
425fbfc0872Sthorpej }
426fbfc0872Sthorpej 
427fbfc0872Sthorpej int
pvr_show_screen(void * v,void * cookie,int waitok,void (* cb)(void *,int,int),void * cbarg)428fbfc0872Sthorpej pvr_show_screen(void *v, void *cookie, int waitok,
429fbfc0872Sthorpej     void (*cb)(void *, int, int), void *cbarg)
430fbfc0872Sthorpej {
431fbfc0872Sthorpej 
432cb6453dbStsutsui 	return 0;
433fbfc0872Sthorpej }
434839caf10Smarcus 
435839caf10Smarcus static void
pvr_check_cable(struct fb_devconfig * dc)4362ae9f715Sthorpej pvr_check_cable(struct fb_devconfig *dc)
437839caf10Smarcus {
4385f1c88d7Sperry 	volatile uint32_t *porta =
4395f1c88d7Sperry 	    (volatile uint32_t *)0xff80002c;
440cb6453dbStsutsui 	uint16_t v;
441839caf10Smarcus 
442839caf10Smarcus 	/* PORT8 and PORT9 is input */
443839caf10Smarcus 	*porta = (*porta & ~0xf0000) | 0xa0000;
444839caf10Smarcus 
445839caf10Smarcus 	/* Read PORT8 and PORT9 */
4465f1c88d7Sperry 	v = ((*(volatile uint16_t *)(porta + 1)) >> 8) & 3;
447839caf10Smarcus 
448fbfc0872Sthorpej 	if ((v & 2) == 0)
4492ae9f715Sthorpej 		dc->dc_dispflags |= PVR_VGAMODE|PVR_RGBMODE;
4502ae9f715Sthorpej 	else if ((v & 1) == 0)
4512ae9f715Sthorpej 		dc->dc_dispflags |= PVR_RGBMODE;
452839caf10Smarcus }
453839caf10Smarcus 
45403748479Smarcus static void
pvr_check_tvsys(struct fb_devconfig * dc)45503748479Smarcus pvr_check_tvsys(struct fb_devconfig *dc)
45603748479Smarcus {
457b8e4c037Sthorpej 
45803748479Smarcus 	/* XXX should use flashmem device when one exists */
4595f1c88d7Sperry 	dc->dc_tvsystem = (*(volatile uint8_t *)0xa021a004) & 3;
46003748479Smarcus }
46103748479Smarcus 
462fbfc0872Sthorpej void
pvrinit(struct fb_devconfig * dc)463fbfc0872Sthorpej pvrinit(struct fb_devconfig *dc)
464839caf10Smarcus {
465b8e4c037Sthorpej 	int display_lines_per_field;
466b8e4c037Sthorpej 	int v_absolute_size;
467b8e4c037Sthorpej 	int h_absolute_size;
468b8e4c037Sthorpej 	int vborder_start, vborder_stop;
469b8e4c037Sthorpej 	int hborder_start, hborder_stop;
470b8e4c037Sthorpej 	int modulo = 1, voffset, hoffset;
471839caf10Smarcus 
4722ae9f715Sthorpej 	pvr_check_cable(dc);
47303748479Smarcus 	pvr_check_tvsys(dc);
474839caf10Smarcus 
475b8e4c037Sthorpej 	PVR_REG_WRITE(dc, 8, 0);		/* reset */
476b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_BRDCOLR, 0);	/* black border */
477839caf10Smarcus 
4782ae9f715Sthorpej 	if (dc->dc_dispflags & PVR_VGAMODE) {
479b8e4c037Sthorpej 		v_absolute_size = 524;
480b8e4c037Sthorpej 		h_absolute_size = 857;
481b8e4c037Sthorpej 
482839caf10Smarcus 		display_lines_per_field = 480;
483b8e4c037Sthorpej 		hoffset = 164;
484839caf10Smarcus 		voffset = 36;
485b8e4c037Sthorpej 
486b8e4c037Sthorpej 		hborder_start = 126;
487b8e4c037Sthorpej 		hborder_stop = 837;
488b8e4c037Sthorpej 
489b8e4c037Sthorpej 		vborder_start = 40;
490b8e4c037Sthorpej 		vborder_stop = 444;		/* XXX */
491b8e4c037Sthorpej 
492b8e4c037Sthorpej 		/* 31kHz, RGB565 */
493b8e4c037Sthorpej 		PVR_REG_WRITE(dc, PVRREG_DIWMODE,
494b8e4c037Sthorpej 		    DIWMODE_C | DIWMODE_COL_RGB565);
495b8e4c037Sthorpej 
496b8e4c037Sthorpej 		/* video output */
497b8e4c037Sthorpej 		PVR_REG_WRITE(dc, PVRREG_SYNCCONF, SYNCCONF_VO);
498839caf10Smarcus 	} else {
49903748479Smarcus 		if (dc->dc_tvsystem & 1) {
500b8e4c037Sthorpej 			/* 50 Hz PAL */
501b8e4c037Sthorpej 			v_absolute_size = 624;
50203748479Smarcus 			h_absolute_size = 863;
503b8e4c037Sthorpej 
504b8e4c037Sthorpej 			display_lines_per_field = 240;
50503748479Smarcus 			hoffset = 174;
506839caf10Smarcus 			voffset = 18;
507b8e4c037Sthorpej 
508b8e4c037Sthorpej 			hborder_start = 116;
509b8e4c037Sthorpej 			hborder_stop = 843;
510b8e4c037Sthorpej 
511b8e4c037Sthorpej 			vborder_start = 44;
512b8e4c037Sthorpej 			vborder_stop = 536;	/* XXX */
513b8e4c037Sthorpej 		} else {
514b8e4c037Sthorpej 			/* 60 Hz NTSC */
515b8e4c037Sthorpej 			v_absolute_size = 524;
516b8e4c037Sthorpej 			h_absolute_size = 857;
517b8e4c037Sthorpej 
518b8e4c037Sthorpej 			display_lines_per_field = 240;
519b8e4c037Sthorpej 			hoffset = 170;
520b8e4c037Sthorpej 			voffset = 28;
521b8e4c037Sthorpej 
522b8e4c037Sthorpej 			hborder_start = 126;
523b8e4c037Sthorpej 			hborder_stop = 837;
524b8e4c037Sthorpej 
525b8e4c037Sthorpej 			vborder_start = 18;
526b8e4c037Sthorpej 			vborder_stop = 506;	/* XXX */
527839caf10Smarcus 		}
528839caf10Smarcus 
529b8e4c037Sthorpej 		modulo += 640 * 2 / 4;	/* interlace -> skip every other line */
530839caf10Smarcus 
531b8e4c037Sthorpej 		/* 15kHz, RGB565 */
532b8e4c037Sthorpej 		PVR_REG_WRITE(dc, PVRREG_DIWMODE,
533b8e4c037Sthorpej 		    DIWMODE_COL_RGB565);
534839caf10Smarcus 
535b8e4c037Sthorpej 		/* video output, PAL/NTSC, interlace */
536b8e4c037Sthorpej 		PVR_REG_WRITE(dc, PVRREG_SYNCCONF,
537b8e4c037Sthorpej 		    SYNCCONF_VO | SYNCCONF_I | SYNCCONF_BC(dc->dc_tvsystem));
538b8e4c037Sthorpej 	}
539839caf10Smarcus 
540b8e4c037Sthorpej 	/* video base address, long field */
541b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_DIWADDRL, 0);
542b8e4c037Sthorpej 
543b8e4c037Sthorpej 	/* video base address, short field */
544b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_DIWADDRS, 640 * 2);
545b8e4c037Sthorpej 
546b8e4c037Sthorpej 	/* video size */
547b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_DIWSIZE, DIWSIZE_MODULO(modulo) |
548b8e4c037Sthorpej 	    DIWSIZE_LPF(display_lines_per_field - 1) |
549b8e4c037Sthorpej 	    DIWSIZE_DPL(640 * 2 / 4 - 1));
550b8e4c037Sthorpej 
551b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_DIWVSTRT,		/* V start */
552b8e4c037Sthorpej 	    DIWVSTRT_V1(voffset) | DIWVSTRT_V2(voffset));
553b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_BRDVERT,		/* V border */
554b8e4c037Sthorpej 	    BRDVERT_START(vborder_start) | BRDVERT_STOP(vborder_stop));
555b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_DIWHSTRT, hoffset);	/* H start */
556b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_SYNCSIZE,		/* HV counter */
557b8e4c037Sthorpej 	    SYNCSIZE_V(v_absolute_size) | SYNCSIZE_H(h_absolute_size));
558b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_BRDHORZ,		/* H border */
559b8e4c037Sthorpej 	    BRDHORZ_START(hborder_start) | BRDHORZ_STOP(hborder_stop));
560b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_DIWCONF, DIWCONF_MAGIC);
561839caf10Smarcus 
562839caf10Smarcus 	/* RGB / composite */
5635f1c88d7Sperry 	*(volatile uint32_t *)
5642ae9f715Sthorpej 	    SH3_PHYS_TO_P2SEG(0x00702c00) =
5652ae9f715Sthorpej 	    ((dc->dc_dispflags & PVR_RGBMODE) ? 0 : 3) << 8;
566839caf10Smarcus 
567b8e4c037Sthorpej 	/* display on */
568b8e4c037Sthorpej 	PVR_REG_WRITE(dc, PVRREG_DIWMODE,
569b8e4c037Sthorpej 	    PVR_REG_READ(dc, PVRREG_DIWMODE) | DIWMODE_DE);
570839caf10Smarcus }
571839caf10Smarcus 
572fbfc0872Sthorpej /* Console support. */
573839caf10Smarcus 
574839caf10Smarcus void
pvrcninit(struct consdev * cndev)575fbfc0872Sthorpej pvrcninit(struct consdev *cndev)
576839caf10Smarcus {
577fbfc0872Sthorpej 	struct fb_devconfig *dcp = &pvr_console_dc;
578fbfc0872Sthorpej 	long defattr;
579839caf10Smarcus 
580fbfc0872Sthorpej 	pvr_getdevconfig(dcp);
58108814574Stsutsui 	(*dcp->dc_rinfo.ri_ops.allocattr)(&dcp->dc_rinfo, 0, 0, 0, &defattr);
5828db5928aStsutsui 	wsdisplay_cnattach(&dcp->dc_wsscrdescr, &dcp->dc_rinfo, 0, 0, defattr);
583839caf10Smarcus 
584fbfc0872Sthorpej 	pvr_is_console = 1;
585839caf10Smarcus 
586839caf10Smarcus 	cn_tab->cn_pri = CN_INTERNAL;
587839caf10Smarcus 
588839caf10Smarcus #if NMKBD > 0
589fbfc0872Sthorpej 	mkbd_cnattach();	/* connect keyboard and screen together */
590839caf10Smarcus #endif
591839caf10Smarcus }
592839caf10Smarcus 
593839caf10Smarcus void
pvrcnprobe(struct consdev * cndev)594fbfc0872Sthorpej pvrcnprobe(struct consdev *cndev)
595839caf10Smarcus {
596839caf10Smarcus #if NWSDISPLAY > 0
597839caf10Smarcus 	int maj, unit;
59877a6b82bSgehenna 	extern const struct cdevsw wsdisplay_cdevsw;
599839caf10Smarcus #endif
600839caf10Smarcus 	cndev->cn_dev = NODEV;
601839caf10Smarcus 	cndev->cn_pri = CN_NORMAL;
602839caf10Smarcus 
603839caf10Smarcus #if NWSDISPLAY > 0
604839caf10Smarcus 	unit = 0;
60577a6b82bSgehenna 	maj = cdevsw_lookup_major(&wsdisplay_cdevsw);
60677a6b82bSgehenna 	if (maj != -1) {
607839caf10Smarcus 		cndev->cn_pri = CN_INTERNAL;
608839caf10Smarcus 		cndev->cn_dev = makedev(maj, unit);
609839caf10Smarcus 	}
610839caf10Smarcus #endif
611839caf10Smarcus }
612