xref: /netbsd-src/sys/arch/cobalt/stand/boot/cache.c (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: cache.c,v 1.2 2007/10/30 16:38:54 tsutsui Exp $	*/
2 
3 /*
4  * Copyright 2001 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #include <lib/libsa/stand.h>
39 #include <lib/libkern/libkern.h>
40 
41 #include <mips/cpuregs.h>
42 #include <mips/cache_r4k.h>
43 
44 #include "boot.h"
45 
46 #define round_line(x)	(((x) + (CACHELINESIZE - 1)) & ~(CACHELINESIZE - 1))
47 #define trunc_line(x)	((x) & ~(CACHELINESIZE - 1))
48 
49 __asm(".set mips3");
50 
51 void
52 pdcache_inv(uint32_t va, u_int size)
53 {
54 	uint32_t eva;
55 
56 	eva = round_line(va + size);
57 	va  = trunc_line(va);
58 
59 	while (va < eva) {
60 		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_INV);
61 		va += CACHELINESIZE;
62 	}
63 }
64 
65 void
66 pdcache_wb(uint32_t va, u_int size)
67 {
68 	uint32_t eva;
69 
70 	eva = round_line(va + size);
71 	va  = trunc_line(va);
72 
73 	while (va < eva) {
74 		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB);
75 		va += CACHELINESIZE;
76 	}
77 }
78 
79 void
80 pdcache_wbinv(uint32_t va, u_int size)
81 {
82 	uint32_t eva;
83 
84 	eva = round_line(va + size);
85 	va  = trunc_line(va);
86 
87 	while (va < eva) {
88 		cache_op_r4k_line(va, CACHE_R4K_D|CACHEOP_R4K_HIT_WB_INV);
89 		va += CACHELINESIZE;
90 	}
91 }
92