1 /* $NetBSD: pci_machdep.c,v 1.22 2006/04/18 12:26:45 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Soren S. Jorvang. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.22 2006/04/18 12:26:45 tsutsui Exp $"); 30 31 #include <sys/types.h> 32 #include <sys/param.h> 33 #include <sys/time.h> 34 #include <sys/systm.h> 35 #include <sys/errno.h> 36 #include <sys/device.h> 37 #include <sys/extent.h> 38 39 #define _COBALT_BUS_DMA_PRIVATE 40 #include <machine/bus.h> 41 #include <machine/intr.h> 42 43 #include <dev/pci/pcivar.h> 44 #include <dev/pci/pcireg.h> 45 #include <dev/pci/pcidevs.h> 46 #include <dev/pci/pciconf.h> 47 48 #include <cobalt/dev/gtreg.h> 49 50 /* 51 * PCI doesn't have any special needs; just use 52 * the generic versions of these functions. 53 */ 54 struct cobalt_bus_dma_tag pci_bus_dma_tag = { 55 _bus_dmamap_create, 56 _bus_dmamap_destroy, 57 _bus_dmamap_load, 58 _bus_dmamap_load_mbuf, 59 _bus_dmamap_load_uio, 60 _bus_dmamap_load_raw, 61 _bus_dmamap_unload, 62 _bus_dmamap_sync, 63 _bus_dmamem_alloc, 64 _bus_dmamem_free, 65 _bus_dmamem_map, 66 _bus_dmamem_unmap, 67 _bus_dmamem_mmap, 68 }; 69 70 void 71 pci_attach_hook(struct device *parent, struct device *self, 72 struct pcibus_attach_args *pba) 73 { 74 /* XXX */ 75 76 return; 77 } 78 79 int 80 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 81 { 82 83 return 32; 84 } 85 86 pcitag_t 87 pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function) 88 { 89 90 return (bus << 16) | (device << 11) | (function << 8); 91 } 92 93 void 94 pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp) 95 { 96 97 if (bp != NULL) 98 *bp = (tag >> 16) & 0xff; 99 if (dp != NULL) 100 *dp = (tag >> 11) & 0x1f; 101 if (fp != NULL) 102 *fp = (tag >> 8) & 0x07; 103 } 104 105 pcireg_t 106 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 107 { 108 pcireg_t data; 109 int bus, dev, func; 110 111 pci_decompose_tag(pc, tag, &bus, &dev, &func); 112 113 /* 114 * 2700 hardware wedges on accesses to device 6. 115 */ 116 if (bus == 0 && dev == 6) 117 return 0; 118 /* 119 * 2800 hardware wedges on accesses to device 31. 120 */ 121 if (bus == 0 && dev == 31) 122 return 0; 123 124 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_ADDR, 125 PCICFG_ENABLE | tag | reg); 126 data = bus_space_read_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_DATA); 127 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_ADDR, 0); 128 129 return data; 130 } 131 132 void 133 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 134 { 135 136 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_ADDR, 137 PCICFG_ENABLE | tag | reg); 138 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_DATA, data); 139 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_ADDR, 0); 140 } 141 142 int 143 pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 144 { 145 pci_chipset_tag_t pc = pa->pa_pc; 146 pcitag_t intrtag = pa->pa_intrtag; 147 int pin = pa->pa_intrpin; 148 int line = pa->pa_intrline; 149 int bus, dev, func; 150 151 pci_decompose_tag(pc, intrtag, &bus, &dev, &func); 152 153 /* 154 * The interrupt lines of the two Tulips are connected 155 * directly to the CPU. 156 */ 157 158 if (bus == 0 && dev == 7 && pin == PCI_INTERRUPT_PIN_A) 159 *ihp = 16 + 1; 160 else if (bus == 0 && dev == 12 && pin == PCI_INTERRUPT_PIN_A) 161 *ihp = 16 + 2; 162 else 163 *ihp = line; 164 165 return 0; 166 } 167 168 const char * 169 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 170 { 171 static char irqstr[8]; 172 173 if (ih >= 16) 174 sprintf(irqstr, "level %d", ih - 16); 175 else 176 sprintf(irqstr, "irq %d", ih); 177 178 return irqstr; 179 } 180 181 const struct evcnt * 182 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih) 183 { 184 185 /* XXX for now, no evcnt parent reported */ 186 return NULL; 187 } 188 189 void * 190 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 191 int (*func)(void *), void *arg) 192 { 193 194 if (ih >= 16) 195 return cpu_intr_establish(ih - 16, level, func, arg); 196 else 197 return icu_intr_establish(ih, IST_LEVEL, level, func, arg); 198 } 199 200 void 201 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 202 { 203 204 /* Try both, only the valid one will disestablish. */ 205 cpu_intr_disestablish(cookie); 206 icu_intr_disestablish(cookie); 207 } 208 209 void 210 pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin, int swiz, 211 int *iline) 212 { 213 214 /* not yet... */ 215 } 216 217 int 218 pci_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func, pcireg_t id) 219 { 220 221 /* ignore bogus IDs */ 222 if (PCI_VENDOR(id) == 0) 223 return 0; 224 225 /* 2700 hardware wedges on accesses to device 6. */ 226 if (bus == 0 && dev == 6) 227 return 0; 228 229 /* 2800 hardware wedges on accesses to device 31. */ 230 if (bus == 0 && dev == 31) 231 return 0; 232 233 /* Don't configure the bridge and PCI probe. */ 234 if (PCI_VENDOR(id) == PCI_VENDOR_GALILEO && 235 PCI_PRODUCT(id) == PCI_PRODUCT_GALILEO_GT64011) 236 return 0; 237 238 /* Don't configure on-board VIA VT82C586 (pcib, viaide, uhci) */ 239 if (bus == 0 && dev == 9) 240 return 0; 241 242 return PCI_CONF_DEFAULT & ~(PCI_COMMAND_SERR_ENABLE | 243 PCI_COMMAND_PARITY_ENABLE); 244 } 245