1 /* $NetBSD: pci_machdep.c,v 1.18 2005/12/11 12:17:06 christos Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Soren S. Jorvang. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.18 2005/12/11 12:17:06 christos Exp $"); 30 31 #include <sys/types.h> 32 #include <sys/param.h> 33 #include <sys/time.h> 34 #include <sys/systm.h> 35 #include <sys/errno.h> 36 #include <sys/device.h> 37 #include <sys/extent.h> 38 39 #define _COBALT_BUS_DMA_PRIVATE 40 #include <machine/bus.h> 41 #include <machine/intr.h> 42 43 #include <dev/pci/pcivar.h> 44 #include <dev/pci/pcireg.h> 45 #include <dev/pci/pcidevs.h> 46 #include <dev/pci/pciconf.h> 47 48 #include <cobalt/dev/gtreg.h> 49 50 /* 51 * PCI doesn't have any special needs; just use 52 * the generic versions of these functions. 53 */ 54 struct cobalt_bus_dma_tag pci_bus_dma_tag = { 55 _bus_dmamap_create, 56 _bus_dmamap_destroy, 57 _bus_dmamap_load, 58 _bus_dmamap_load_mbuf, 59 _bus_dmamap_load_uio, 60 _bus_dmamap_load_raw, 61 _bus_dmamap_unload, 62 _bus_dmamap_sync, 63 _bus_dmamem_alloc, 64 _bus_dmamem_free, 65 _bus_dmamem_map, 66 _bus_dmamem_unmap, 67 _bus_dmamem_mmap, 68 }; 69 70 void 71 pci_attach_hook(parent, self, pba) 72 struct device *parent, *self; 73 struct pcibus_attach_args *pba; 74 { 75 /* XXX */ 76 77 return; 78 } 79 80 int 81 pci_bus_maxdevs(pc, busno) 82 pci_chipset_tag_t pc; 83 int busno; 84 { 85 return 32; 86 } 87 88 pcitag_t 89 pci_make_tag(pc, bus, device, function) 90 pci_chipset_tag_t pc; 91 int bus, device, function; 92 { 93 return (bus << 16) | (device << 11) | (function << 8); 94 } 95 96 void 97 pci_decompose_tag(pc, tag, bp, dp, fp) 98 pci_chipset_tag_t pc; 99 pcitag_t tag; 100 int *bp, *dp, *fp; 101 { 102 if (bp != NULL) 103 *bp = (tag >> 16) & 0xff; 104 if (dp != NULL) 105 *dp = (tag >> 11) & 0x1f; 106 if (fp != NULL) 107 *fp = (tag >> 8) & 0x07; 108 } 109 110 pcireg_t 111 pci_conf_read(pc, tag, reg) 112 pci_chipset_tag_t pc; 113 pcitag_t tag; 114 int reg; 115 { 116 pcireg_t data; 117 int bus, dev, func; 118 119 pci_decompose_tag(pc, tag, &bus, &dev, &func); 120 121 /* 122 * 2700 hardware wedges on accesses to device 6. 123 */ 124 if (bus == 0 && dev == 6) 125 return 0; 126 /* 127 * 2800 hardware wedges on accesses to device 31. 128 */ 129 if (bus == 0 && dev == 31) 130 return 0; 131 132 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_ADDR, 133 0x80000000 | tag | reg); 134 data = bus_space_read_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_DATA); 135 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_ADDR, 0); 136 137 return data; 138 } 139 140 void 141 pci_conf_write(pc, tag, reg, data) 142 pci_chipset_tag_t pc; 143 pcitag_t tag; 144 int reg; 145 pcireg_t data; 146 { 147 148 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_ADDR, 149 0x80000000 | tag | reg); 150 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_DATA, data); 151 bus_space_write_4(pc->pc_bst, pc->pc_bsh, GT_PCICFG_ADDR, 0); 152 } 153 154 int 155 pci_intr_map(pa, ihp) 156 struct pci_attach_args *pa; 157 pci_intr_handle_t *ihp; 158 { 159 pci_chipset_tag_t pc = pa->pa_pc; 160 pcitag_t intrtag = pa->pa_intrtag; 161 int pin = pa->pa_intrpin; 162 int line = pa->pa_intrline; 163 int bus, dev, func; 164 165 pci_decompose_tag(pc, intrtag, &bus, &dev, &func); 166 167 /* 168 * The interrupt lines of the two Tulips are connected 169 * directly to the CPU. 170 */ 171 172 if (bus == 0 && dev == 7 && pin == PCI_INTERRUPT_PIN_A) 173 *ihp = 16 + 1; 174 else if (bus == 0 && dev == 12 && pin == PCI_INTERRUPT_PIN_A) 175 *ihp = 16 + 2; 176 else 177 *ihp = line; 178 179 return 0; 180 } 181 182 const char * 183 pci_intr_string(pc, ih) 184 pci_chipset_tag_t pc; 185 pci_intr_handle_t ih; 186 { 187 static char irqstr[8]; 188 189 if (ih >= 16) 190 sprintf(irqstr, "level %d", ih - 16); 191 else 192 sprintf(irqstr, "irq %d", ih); 193 194 return irqstr; 195 } 196 197 const struct evcnt * 198 pci_intr_evcnt(pc, ih) 199 pci_chipset_tag_t pc; 200 pci_intr_handle_t ih; 201 { 202 203 /* XXX for now, no evcnt parent reported */ 204 return NULL; 205 } 206 207 void * 208 pci_intr_establish(pc, ih, level, func, arg) 209 pci_chipset_tag_t pc; 210 pci_intr_handle_t ih; 211 int level, (*func)(void *); 212 void *arg; 213 { 214 if (ih >= 16) 215 return cpu_intr_establish(ih - 16, level, func, arg); 216 else 217 return icu_intr_establish(ih, IST_LEVEL, level, func, arg); 218 } 219 220 void 221 pci_intr_disestablish(pc, cookie) 222 pci_chipset_tag_t pc; 223 void *cookie; 224 { 225 /* Try both, only the valid one will disestablish. */ 226 cpu_intr_disestablish(cookie); 227 icu_intr_disestablish(cookie); 228 } 229 230 void 231 pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin, int swiz, 232 int *iline) 233 { 234 235 /* not yet... */ 236 } 237 238 int 239 pci_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func, pcireg_t id) 240 { 241 242 /* Don't configure the bridge and PCI probe. */ 243 if (PCI_VENDOR(id) == PCI_VENDOR_GALILEO && 244 PCI_PRODUCT(id) == PCI_PRODUCT_GALILEO_GT64011) 245 return 0; 246 247 /* Don't configure device 9 */ 248 if (dev == 9) 249 return 0; 250 251 return PCI_CONF_ALL & ~(PCI_CONF_MAP_ROM | 252 PCI_COMMAND_SERR_ENABLE | PCI_COMMAND_PARITY_ENABLE); 253 } 254