xref: /netbsd-src/sys/arch/cobalt/pci/pci_machdep.c (revision 4b896b232495b7a9b8b94a1cf1e21873296d53b8)
1 /*	$NetBSD: pci_machdep.c,v 1.15 2003/09/12 17:55:52 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions, and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.15 2003/09/12 17:55:52 tsutsui Exp $");
30 
31 #include <sys/types.h>
32 #include <sys/param.h>
33 #include <sys/time.h>
34 #include <sys/systm.h>
35 #include <sys/errno.h>
36 #include <sys/device.h>
37 
38 #define _COBALT_BUS_DMA_PRIVATE
39 #include <machine/bus.h>
40 #include <machine/intr.h>
41 
42 #include <dev/pci/pcivar.h>
43 #include <dev/pci/pcireg.h>
44 #include <dev/pci/pcidevs.h>
45 
46 /*
47  * PCI doesn't have any special needs; just use
48  * the generic versions of these functions.
49  */
50 struct cobalt_bus_dma_tag pci_bus_dma_tag = {
51 	_bus_dmamap_create,
52 	_bus_dmamap_destroy,
53 	_bus_dmamap_load,
54 	_bus_dmamap_load_mbuf,
55 	_bus_dmamap_load_uio,
56 	_bus_dmamap_load_raw,
57 	_bus_dmamap_unload,
58 	_bus_dmamap_sync,
59 	_bus_dmamem_alloc,
60 	_bus_dmamem_free,
61 	_bus_dmamem_map,
62 	_bus_dmamem_unmap,
63 	_bus_dmamem_mmap,
64 };
65 
66 void
67 pci_attach_hook(parent, self, pba)
68 	struct device *parent, *self;
69 	struct pcibus_attach_args *pba;
70 {
71 	/* XXX */
72 
73 	return;
74 }
75 
76 int
77 pci_bus_maxdevs(pc, busno)
78 	pci_chipset_tag_t pc;
79 	int busno;
80 {
81 	return 32;
82 }
83 
84 pcitag_t
85 pci_make_tag(pc, bus, device, function)
86 	pci_chipset_tag_t pc;
87 	int bus, device, function;
88 {
89 	return (bus << 16) | (device << 11) | (function << 8);
90 }
91 
92 void
93 pci_decompose_tag(pc, tag, bp, dp, fp)
94 	pci_chipset_tag_t pc;
95 	pcitag_t tag;
96 	int *bp, *dp, *fp;
97 {
98 	if (bp != NULL)
99 		*bp = (tag >> 16) & 0xff;
100 	if (dp != NULL)
101 		*dp = (tag >> 11) & 0x1f;
102 	if (fp != NULL)
103 		*fp = (tag >> 8) & 0x07;
104 }
105 
106 #define PCI_CFG_ADDR	((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cf8))
107 #define PCI_CFG_DATA	((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cfc))
108 
109 pcireg_t
110 pci_conf_read(pc, tag, reg)
111 	pci_chipset_tag_t pc;
112 	pcitag_t tag;
113 	int reg;
114 {
115 	pcireg_t data;
116 	int bus, dev, func;
117 
118 	pci_decompose_tag(pc, tag, &bus, &dev, &func);
119 
120 	/*
121 	 * 2700 hardware wedges on accesses to device 6.
122 	 */
123 	if (bus == 0 && dev == 6)
124 		return 0;
125 	/*
126 	 * 2800 hardware wedges on accesses to device 31.
127 	 */
128 	if (bus == 0 && dev == 31)
129 		return 0;
130 
131 	*PCI_CFG_ADDR = 0x80000000 | tag | reg;
132 	data = *PCI_CFG_DATA;
133 	*PCI_CFG_ADDR = 0;
134 
135 	return data;
136 }
137 
138 void
139 pci_conf_write(pc, tag, reg, data)
140 	pci_chipset_tag_t pc;
141 	pcitag_t tag;
142 	int reg;
143 	pcireg_t data;
144 {
145 	*PCI_CFG_ADDR = 0x80000000 | tag | reg;
146 	*PCI_CFG_DATA = data;
147 	*PCI_CFG_ADDR = 0;
148 
149 	return;
150 }
151 
152 int
153 pci_intr_map(pa, ihp)
154 	struct pci_attach_args *pa;
155 	pci_intr_handle_t *ihp;
156 {
157 	pci_chipset_tag_t pc = pa->pa_pc;
158 	pcitag_t intrtag = pa->pa_intrtag;
159 	int pin = pa->pa_intrpin;
160 	int line = pa->pa_intrline;
161 	int bus, dev, func;
162 
163 	pci_decompose_tag(pc, intrtag, &bus, &dev, &func);
164 
165 	/*
166 	 * The interrupt lines of the two Tulips are connected
167 	 * directly to the CPU.
168 	 */
169 
170 	if (bus == 0 && dev == 7 && pin == PCI_INTERRUPT_PIN_A)
171 		*ihp = 16 + 1;
172 	else if (bus == 0 && dev == 12 && pin == PCI_INTERRUPT_PIN_A)
173 		*ihp = 16 + 2;
174 	else
175 		*ihp = line;
176 
177 	return 0;
178 }
179 
180 const char *
181 pci_intr_string(pc, ih)
182 	pci_chipset_tag_t pc;
183 	pci_intr_handle_t ih;
184 {
185 	static char irqstr[8];
186 
187 	if (ih >= 16)
188 		sprintf(irqstr, "level %d", ih - 16);
189 	else
190 		sprintf(irqstr, "irq %d", ih);
191 
192 	return irqstr;
193 }
194 
195 const struct evcnt *
196 pci_intr_evcnt(pc, ih)
197 	pci_chipset_tag_t pc;
198 	pci_intr_handle_t ih;
199 {
200 
201 	/* XXX for now, no evcnt parent reported */
202 	return NULL;
203 }
204 
205 void *
206 pci_intr_establish(pc, ih, level, func, arg)
207 	pci_chipset_tag_t pc;
208 	pci_intr_handle_t ih;
209 	int level, (*func)(void *);
210 	void *arg;
211 {
212 	if (ih >= 16)
213 		return cpu_intr_establish(ih - 16, level, func, arg);
214 	else
215 		return icu_intr_establish(ih, IST_LEVEL, level, func, arg);
216 }
217 
218 void
219 pci_intr_disestablish(pc, cookie)
220 	pci_chipset_tag_t pc;
221 	void *cookie;
222 {
223 	/* Try both, only the valid one will disestablish. */
224 	cpu_intr_disestablish(cookie);
225 	icu_intr_disestablish(cookie);
226 }
227