1 /* $NetBSD: pci_machdep.c,v 1.7 2000/06/04 19:14:41 cgd Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Soren S. Jorvang. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/types.h> 29 #include <sys/param.h> 30 #include <sys/time.h> 31 #include <sys/systm.h> 32 #include <sys/errno.h> 33 #include <sys/device.h> 34 35 #include <vm/vm.h> 36 #include <vm/vm_kern.h> 37 38 #define _COBALT_BUS_DMA_PRIVATE 39 #include <machine/bus.h> 40 #include <machine/intr.h> 41 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/pcireg.h> 44 #include <dev/pci/pcidevs.h> 45 46 /* 47 * PCI doesn't have any special needs; just use 48 * the generic versions of these functions. 49 */ 50 struct cobalt_bus_dma_tag pci_bus_dma_tag = { 51 _bus_dmamap_create, 52 _bus_dmamap_destroy, 53 _bus_dmamap_load, 54 _bus_dmamap_load_mbuf, 55 _bus_dmamap_load_uio, 56 _bus_dmamap_load_raw, 57 _bus_dmamap_unload, 58 _bus_dmamap_sync, 59 _bus_dmamem_alloc, 60 _bus_dmamem_free, 61 _bus_dmamem_map, 62 _bus_dmamem_unmap, 63 _bus_dmamem_mmap, 64 }; 65 66 void 67 pci_attach_hook(parent, self, pba) 68 struct device *parent, *self; 69 struct pcibus_attach_args *pba; 70 { 71 /* XXX */ 72 73 return; 74 } 75 76 int 77 pci_bus_maxdevs(pc, busno) 78 pci_chipset_tag_t pc; 79 int busno; 80 { 81 return 32; 82 } 83 84 pcitag_t 85 pci_make_tag(pc, bus, device, function) 86 pci_chipset_tag_t pc; 87 int bus, device, function; 88 { 89 return (bus << 16) | (device << 11) | (function << 8); 90 } 91 92 void 93 pci_decompose_tag(pc, tag, bp, dp, fp) 94 pci_chipset_tag_t pc; 95 pcitag_t tag; 96 int *bp, *dp, *fp; 97 { 98 if (bp != NULL) 99 *bp = (tag >> 16) & 0xff; 100 if (dp != NULL) 101 *dp = (tag >> 11) & 0x1f; 102 if (fp != NULL) 103 *fp = (tag >> 8) & 0x07; 104 } 105 106 #define PCI_CFG_ADDR ((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cf8)) 107 #define PCI_CFG_DATA ((volatile u_int32_t *)MIPS_PHYS_TO_KSEG1(0x14000cfc)) 108 109 pcireg_t 110 pci_conf_read(pc, tag, reg) 111 pci_chipset_tag_t pc; 112 pcitag_t tag; 113 int reg; 114 { 115 pcireg_t data; 116 int bus, dev, func; 117 118 pci_decompose_tag(pc, tag, &bus, &dev, &func); 119 120 /* 121 * 2700 hardware wedges on accesses to device 6. 122 */ 123 if (bus == 0 && dev == 6) 124 return 0; 125 /* 126 * 2800 hardware wedges on accesses to device 31. 127 */ 128 if (bus == 0 && dev == 31) 129 return 0; 130 131 *PCI_CFG_ADDR = 0x80000000 | tag | reg; 132 data = *PCI_CFG_DATA; 133 *PCI_CFG_ADDR = 0; 134 135 return data; 136 } 137 138 void 139 pci_conf_write(pc, tag, reg, data) 140 pci_chipset_tag_t pc; 141 pcitag_t tag; 142 int reg; 143 pcireg_t data; 144 { 145 *PCI_CFG_ADDR = 0x80000000 | tag | reg; 146 *PCI_CFG_DATA = data; 147 *PCI_CFG_ADDR = 0; 148 149 return; 150 } 151 152 int 153 pci_intr_map(pc, intrtag, pin, line, ihp) 154 pci_chipset_tag_t pc; 155 pcitag_t intrtag; 156 int pin, line; 157 pci_intr_handle_t *ihp; 158 { 159 int bus, dev, func; 160 161 pci_decompose_tag(pc, intrtag, &bus, &dev, &func); 162 163 /* 164 * The interrupt lines of the two Tulips are connected 165 * directly to the CPU. 166 */ 167 168 if (bus == 0 && dev == 7 && pin == PCI_INTERRUPT_PIN_A) 169 *ihp = 16 + 1; 170 else if (bus == 0 && dev == 12 && pin == PCI_INTERRUPT_PIN_A) 171 *ihp = 16 + 2; 172 else 173 *ihp = line; 174 175 return 0; 176 } 177 178 const char * 179 pci_intr_string(pc, ih) 180 pci_chipset_tag_t pc; 181 pci_intr_handle_t ih; 182 { 183 static char irqstr[8]; 184 185 if (ih >= 16) 186 sprintf(irqstr, "level %d", ih - 16); 187 else 188 sprintf(irqstr, "irq %d", ih); 189 190 return irqstr; 191 } 192 193 const struct evcnt * 194 pci_intr_evcnt(pc, ih) 195 pci_chipset_tag_t pc; 196 pci_intr_handle_t ih; 197 { 198 199 /* XXX for now, no evcnt parent reported */ 200 return NULL; 201 } 202 203 void * 204 pci_intr_establish(pc, ih, level, func, arg) 205 pci_chipset_tag_t pc; 206 pci_intr_handle_t ih; 207 int level, (*func)(void *); 208 void *arg; 209 { 210 if (ih >= 16) 211 return cpu_intr_establish(ih - 16, level, func, arg); 212 else 213 return icu_intr_establish(ih, IST_LEVEL, level, func, arg); 214 } 215 216 void 217 pci_intr_disestablish(pc, cookie) 218 pci_chipset_tag_t pc; 219 void *cookie; 220 { 221 panic("pci_intr_disestablish: not implemented"); 222 223 return; 224 } 225