1 /* $NetBSD: intr.h,v 1.21 2006/05/31 12:59:39 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Soren S. Jorvang. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #ifndef _COBALT_INTR_H_ 29 #define _COBALT_INTR_H_ 30 31 #define IPL_NONE 0 /* Disable only this interrupt. */ 32 #define IPL_BIO 1 /* Disable block I/O interrupts. */ 33 #define IPL_NET 2 /* Disable network interrupts. */ 34 #define IPL_TTY 3 /* Disable terminal interrupts. */ 35 #define IPL_SERIAL 3 /* Disable serial hardware interrupts. */ 36 #define IPL_VM 4 /* Memory allocation */ 37 #define IPL_CLOCK 5 /* Disable clock interrupts. */ 38 #define IPL_STATCLOCK 6 /* Disable profiling interrupts. */ 39 #define IPL_HIGH 7 /* Disable all interrupts. */ 40 #define NIPL 8 41 42 /* Interrupt sharing types. */ 43 #define IST_NONE 0 /* none */ 44 #define IST_PULSE 1 /* pulsed */ 45 #define IST_EDGE 2 /* edge-triggered */ 46 #define IST_LEVEL 3 /* level-triggered */ 47 48 /* Soft interrupt numbers. */ 49 #define IPL_SOFT 0 /* generic software interrupts */ 50 #define IPL_SOFTSERIAL 1 /* serial software interrupts */ 51 #define IPL_SOFTNET 2 /* network software interrupts */ 52 #define IPL_SOFTCLOCK 3 /* clock software interrupts */ 53 #define _IPL_NSOFT 4 54 55 #define IPL_SOFTNAMES { \ 56 "misc", \ 57 "serial", \ 58 "net", \ 59 "clock", \ 60 } 61 62 #ifdef _KERNEL 63 #ifndef _LOCORE 64 65 #include <sys/device.h> 66 #include <mips/cpuregs.h> 67 68 int _splraise(int); 69 int _spllower(int); 70 int _splset(int); 71 int _splget(void); 72 void _splnone(void); 73 void _setsoftintr(int); 74 void _clrsoftintr(int); 75 76 #define splhigh() _splraise(MIPS_INT_MASK) 77 #define spl0() (void)_spllower(0) 78 #define splx(s) (void)_splset(s) 79 #define SPLSOFT (MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1) 80 #define SPLBIO (SPLSOFT | MIPS_INT_MASK_4) 81 #define SPLNET (SPLBIO | MIPS_INT_MASK_1 | MIPS_INT_MASK_2) 82 #define SPLTTY (SPLNET | MIPS_INT_MASK_3) 83 #define SPLCLOCK (SPLTTY | MIPS_INT_MASK_0 | MIPS_INT_MASK_5) 84 #define splbio() _splraise(SPLBIO) 85 #define splnet() _splraise(SPLNET) 86 #define spltty() _splraise(SPLTTY) 87 #define spllpt() spltty() 88 #define splserial() _splraise(SPLTTY) 89 #define splclock() _splraise(SPLCLOCK) 90 #define splvm() splclock() 91 #define splstatclock() splclock() 92 #define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0) 93 94 #define splsched() splhigh() 95 #define spllock() splhigh() 96 97 #define splsoft() _splraise(MIPS_SOFT_INT_MASK_0) 98 #define splsoftclock() _splraise(MIPS_SOFT_INT_MASK_0) 99 #define splsoftnet() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 100 #define splsoftserial() _splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1) 101 102 struct cobalt_intrhand { 103 LIST_ENTRY(cobalt_intrhand) ih_q; 104 int (*ih_func)(void *); 105 void *ih_arg; 106 int ih_type; 107 int ih_cookie_type; 108 #define COBALT_COOKIE_TYPE_CPU 0x1 109 #define COBALT_COOKIE_TYPE_ICU 0x2 110 111 struct evcnt ih_evcnt; 112 char ih_evname[32]; 113 }; 114 115 #include <mips/softintr.h> 116 117 void *cpu_intr_establish(int, int, int (*)(void *), void *); 118 void *icu_intr_establish(int, int, int, int (*)(void *), void *); 119 void cpu_intr_disestablish(void *); 120 void icu_intr_disestablish(void *); 121 void icu_init(void); 122 123 #endif /* !_LOCORE */ 124 #endif /* _LOCORE */ 125 126 #endif /* !_COBALT_INTR_H_ */ 127