xref: /netbsd-src/sys/arch/cesfic/dev/zs_pcc.c (revision d710132b4b8ce7f7cccaaf660cb16aa16b4077a0)
1 /*	$NetBSD: zs_pcc.c,v 1.3 2002/10/02 05:06:54 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1997, 1999
5  *	Matthias Drochner.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  *
27  */
28 
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/proc.h>
32 #include <sys/device.h>
33 #include <sys/conf.h>
34 #include <sys/file.h>
35 #include <sys/ioctl.h>
36 #include <sys/tty.h>
37 #include <sys/time.h>
38 #include <sys/kernel.h>
39 #include <sys/syslog.h>
40 
41 #include <dev/cons.h>
42 #include <dev/ic/z8530reg.h>
43 #include <machine/z8530var.h>
44 
45 #include <machine/cpu.h>
46 #include <machine/autoconf.h>
47 
48 #include <cesfic/cesfic/isr.h>
49 
50 #include <cesfic/dev/zsvar.h>
51 
52 extern void sic_enable_int __P((int, int, int, int, int));
53 
54 static int	zsc_pcc_match  __P((struct device *, struct cfdata *, void *));
55 static void	zsc_pcc_attach __P((struct device *, struct device *, void *));
56 
57 static char *zsbase;
58 
59 CFATTACH_DECL(zsc_pcc, sizeof(struct zsc_softc),
60     zsc_pcc_match, zsc_pcc_attach, NULL, NULL);
61 
62 static int
63 zsc_pcc_match(parent, cf, aux)
64 	struct device *parent;
65 	struct cfdata *cf;
66 	void *aux;
67 {
68 	return (1);
69 }
70 
71 static void
72 zsc_pcc_attach(parent, self, aux)
73 	struct device *parent;
74 	struct device *self;
75 	void *aux;
76 {
77 	struct zsc_softc *zsc = (void *) self;
78 	static int didintr;
79 
80 	if (!zsbase)
81 		mainbus_map(0x58000000, 0x10000, 0, (void **)&zsbase);
82 
83 	/* Do common parts of SCC configuration. */
84 	zs_config(zsc, zsbase);
85 
86 	/*
87 	 * Now safe to install interrupt handlers.  Note the arguments
88 	 * to the interrupt handlers aren't used.  Note, we only do this
89 	 * once since both SCCs interrupt at the same level and vector.
90 	 */
91 	if (didintr == 0) {
92 		didintr = 1;
93 		(void) isrlink(zshard, zsc, 4, ISRPRI_TTY);
94 		sic_enable_int(19, 0, 4, 4, 0);
95 	}
96 
97 	zs_write_reg(zsc->zsc_cs[0], 2, 0x18 + ZSHARD_PRI);
98 	zs_write_reg(zsc->zsc_cs[0], 9, ZSWR9_MASTER_IE);
99 }
100 
101 void
102 zs_cnattach(base)
103 	void *base;
104 {
105 	zsbase = base;
106 
107 	zs_cninit(zsbase);
108 }
109