xref: /netbsd-src/sys/arch/cats/include/irqhandler.h (revision 1ca5c1b28139779176bd5c13ad7c5f25c0bcd5f8)
1 /*	$NetBSD: irqhandler.h,v 1.2 2001/12/20 01:20:27 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 1994-1996 Mark Brinicombe.
5  * Copyright (c) 1994 Brini.
6  * All rights reserved.
7  *
8  * This code is derived from software written for Brini by Mark Brinicombe
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *	This product includes software developed by Mark Brinicombe
21  *	for the NetBSD Project.
22  * 4. The name of the company nor the name of the author may be used to
23  *    endorse or promote products derived from this software without specific
24  *    prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
27  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36  * SUCH DAMAGE.
37  *
38  * IRQ related stuff (defines + structures)
39  *
40  * Created      : 30/09/94
41  */
42 
43 #ifndef _ARM32_IRQHANDLER_H_
44 #define _ARM32_IRQHANDLER_H_
45 
46 #if defined(_KERNEL_OPT)
47 #include "opt_cputypes.h"
48 #endif
49 
50 #ifndef _LOCORE
51 #include <sys/types.h>
52 #endif /* _LOCORE */
53 
54 /* Define the IRQ bits */
55 
56 /*
57  * XXX this is really getting rather horrible.
58  * Shortly to be replaced with system specific interrupt tables and handling
59  */
60 
61 #if defined(RISCPC) || defined(CPU_ARM7500)
62 
63 #ifdef CPU_ARM7500
64 
65 /*#define IRQ_PRINTER	0x00*/
66 #define IRQ_RESERVED0	0x01
67 #define IRQ_BUTTON	0x02
68 #define IRQ_FLYBACK	0x03
69 #define IRQ_POR		0x04
70 #define IRQ_TIMER0	0x05
71 #define IRQ_TIMER1 	0x06
72 
73 #define IRQ_DREQ3	0x08
74 /*#define IRQ_HD1	0x09*/
75 /*#define IRQ_HD	IRQ_HD1*/
76 #define IRQ_DREQ2	0x0A
77 /*#define IRQ_FLOPPY	0x0C*/
78 /*#define IRQ_SERIAL	0x0D*/
79 #define IRQ_KBDTX	0x0E
80 #define IRQ_KBDRX	0x0F
81 
82 #define IRQ_IRQ3	0x10
83 #define IRQ_IRQ4	0x11
84 #define IRQ_IRQ5	0x12
85 #define IRQ_IRQ6	0x13
86 #define IRQ_IRQ7	0x14
87 #define IRQ_IRQ9	0x15
88 #define IRQ_IRQ10	0x16
89 #define IRQ_IRQ11	0x17
90 
91 #define IRQ_MSDRX	0x18
92 #define IRQ_MSDTX	0x19
93 #define IRQ_ATOD	0x1A
94 #define IRQ_CLOCK	0x1B
95 #define IRQ_PANIC	0x1C
96 #define IRQ_RESERVED2	0x1D
97 #define IRQ_RESERVED3	0x1E
98 
99 /*
100  * Note that Sound DMA IRQ is on the 31st vector.
101  * It's not part of the IRQD.
102  */
103 #define IRQ_SDMA	0x1F
104 
105 /* Several interrupts are different between the A7000 and RC7500 */
106 #ifdef RC7500
107 
108 #define IRQ_FIQDOWN	0x07
109 #define IRQ_ETHERNET	0x0B
110 #define IRQ_HD2		IRQ_IRQ11
111 
112 #else	/* RC7500 */
113 
114 #define IRQ_RESERVED1	0x07
115 #define IRQ_EXTENDED	0x0B
116 #define IRQ_PODULE	0x0D
117 
118 #define IRQ_EXPCARD0	0x20
119 #define IRQ_EXPCARD1	0x21
120 #define IRQ_EXPCARD2	0x22
121 #define IRQ_EXPCARD3	0x23
122 #define IRQ_EXPCARD4	0x24
123 #define IRQ_EXPCARD5	0x25
124 #define IRQ_EXPCARD6	0x26
125 #define IRQ_EXPCARD7	0x27
126 
127 #endif	/* RC7500 */
128 
129 #else	/* CPU_ARM7500 */
130 
131 #ifdef	RISCPC
132 /*#define IRQ_PRINTER	0x00*/
133 #define IRQ_RESERVED0	0x01
134 /*#define IRQ_FLOPPYIDX	0x02*/
135 #define IRQ_FLYBACK	0x03
136 #define IRQ_POR		0x04
137 #define IRQ_TIMER0	0x05
138 #define IRQ_TIMER1	0x06
139 #define IRQ_RESERVED1	0x07
140 
141 #define IRQ_RESERVED2	0x08
142 /*#define IRQ_HD	0x09*/
143 /*#define IRQ_SERIAL	0x0A*/
144 #define IRQ_EXTENDED	0x0B
145 /*#define IRQ_FLOPPY	0x0C*/
146 #define IRQ_PODULE	0x0D
147 #define IRQ_KBDTX	0x0E
148 #define IRQ_KBDRX	0x0F
149 
150 #define IRQ_DMACH0	0x10
151 #define IRQ_DMACH1	0x11
152 #define IRQ_DMACH2	0x12
153 #define IRQ_DMACH3	0x13
154 #define IRQ_DMASCH0	0x14
155 #define IRQ_DMASCH1	0x15
156 #define IRQ_RESERVED3	0x16
157 #define IRQ_RESERVED4	0x17
158 
159 #define IRQ_EXPCARD0	0x18
160 #define IRQ_EXPCARD1	0x19
161 #define IRQ_EXPCARD2	0x1A
162 #define IRQ_EXPCARD3	0x1B
163 #define IRQ_EXPCARD4	0x1C
164 #define IRQ_EXPCARD5	0x1D
165 #define IRQ_EXPCARD6	0x1E
166 #define IRQ_EXPCARD7	0x1F
167 #endif	/* RISCPC */
168 
169 #endif	/* CPU_ARM7500 */
170 
171 #endif	/* RISPC || CPU_ARM7500 */
172 
173 #ifdef  OFWGENCFG
174 /* These are just made up for now!  -JJK */
175 #define IRQ_TIMER0      0
176 #endif
177 
178 /* XXX why is this in ARM7500? */
179 #ifdef SHARK
180 /*
181  * shark hardware requirements for IRQ's:
182  *	IDE:		14		(hardwired)
183  *	PCI:		5, 9, 10, 11, 15(mapped to UMIPCI inta, intb, intc, intd)
184  *	UMIISA:		10, 11, 12
185  *	SuperIO:	1, 3..12, 14, 15(all may be remapped. defaults as follows.)
186  *	KBC:		1
187  *	USI:		3		(UART with Slow Infrared support)
188  *	UART:		4
189  *	FLOPPY:		6		(not currently used on shark)
190  *	PARALLEL:	7
191  *	RTC:		8		(not used on shark: RTC in sequoia used)
192  *	MOUSE:		12
193  *	Sequoia:	8		(internal RTC hardwired to irq 8)
194  *	Codec:		5, 7, 9, 10, 15	(irqe, connected to 15, has special status.)
195  *	CS8900:		5, 10, 11, 12	(P.14 of datasheet sez only 1 used/time)
196  *	FERR#:		13		(unconnected floating point error)
197  *
198  * total of 15 irqs:
199  * timer, ide, 2 umi = isa/pci, ethernet, 2 codec, kb, usi, uart, floppy,
200  * parallel, rtc, mouse, ferr (irq 13)
201  *
202  * eventually, need to read the OFW dev info tree, and allocate IRQs.
203  * hardcoded for now.
204  */
205 #define IRQ_TIMER0	0x00  /* hardwired to 8254 counter 0 in sequoia */
206 #define IRQ_KEYBOARD    0x01
207 #define IRQ_CASCADE     0x02  /* hardwired IRQ for second 8259 = IRQ_SLAVE */
208 #define IRQ_USI         0x03
209 #define IRQ_UART        0x04
210 #define IRQ_ETHERNET    0x05
211 #define IRQ_FLOPPY      0x06
212 #define IRQ_PARALLEL    0x07
213 
214 #define IRQ_RTC         0x08  /* hardwired to the sequoia RTC */
215 #define IRQ_CODEC1      0x09
216 #define IRQ_UMI1        0x0A  /* isa or pci */
217 #define IRQ_UMI2        0x0B  /* isa or pci */
218 
219 #define IRQ_MOUSE       0x0C
220 #define IRQ_FERR        0x0D  /* FERR# pin on sequoia needs to be connected */
221 #define IRQ_IDE         0x0E  /* hardwired to the IDE connector */
222 #define IRQ_CODEC2      0x0F  /* special interrupt on codec */
223 
224 /* XXX should this go into isa_machdep.h.  Somewhere else? */
225 /* Interrupt sharing types. */
226 #define	IST_NONE	0	/* none */
227 #define	IST_PULSE	1	/* pulsed */
228 #define	IST_EDGE	2	/* edge-triggered */
229 #define	IST_LEVEL	3	/* level-triggered */
230 
231 #endif /* SHARK */
232 
233 #define IRQ_VSYNC	IRQ_FLYBACK	/* Aliased */
234 #define IRQ_NETSLOT	IRQ_EXTENDED
235 
236 #define IRQ_INSTRUCT	-1
237 #define NIRQS		0x20
238 
239 #include <machine/intr.h>
240 
241 #ifndef _LOCORE
242 typedef struct irqhandler {
243 	int (*ih_func) __P((void *arg));/* handler function */
244 	void *ih_arg;			/* Argument to handler */
245 	int ih_level;			/* Interrupt level */
246 	int ih_num;			/* Interrupt number (for accounting) */
247 	const char *ih_name;		/* Name of interrupt (for vmstat -i) */
248 	u_int ih_flags;			/* Interrupt flags */
249 	u_int ih_maskaddr;		/* mask address for expansion cards */
250 	u_int ih_maskbits;		/* interrupt bit for expansion cards */
251 	struct irqhandler *ih_next;	/* next handler */
252 } irqhandler_t;
253 
254 #ifdef _KERNEL
255 extern u_int irqmasks[IPL_LEVELS];
256 extern irqhandler_t *irqhandlers[NIRQS];
257 
258 void irq_init __P((void));
259 int irq_claim __P((int, irqhandler_t *));
260 int irq_release __P((int, irqhandler_t *));
261 void *intr_claim __P((int irq, int level, const char *name, int (*func) __P((void *)), void *arg));
262 int intr_release __P((void *ih));
263 void irq_setmasks __P((void));
264 void disable_irq __P((int));
265 void enable_irq __P((int));
266 #endif	/* _KERNEL */
267 #endif	/* _LOCORE */
268 
269 #define IRQ_FLAG_ACTIVE 0x00000001	/* This is the active handler in list */
270 
271 #endif	/* _ARM32_IRQHANDLER_H_ */
272 
273 /* End of irqhandler.h */
274