1 /* $NetBSD: pci_machdep.c,v 1.14 2005/12/11 12:17:04 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Charles M. Hannum. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Machine-specific functions for PCI autoconfiguration. 35 * 36 * On PCs, there are two methods of generating PCI configuration cycles. 37 * We try to detect the appropriate mechanism for this machine and set 38 * up a few function pointers to access the correct method directly. 39 * 40 * The configuration method can be hard-coded in the config file by 41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode 42 * as defined section 3.6.4.1, `Generating Configuration Cycles'. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.14 2005/12/11 12:17:04 christos Exp $"); 47 48 #include <sys/types.h> 49 #include <sys/param.h> 50 #include <sys/extent.h> 51 #include <sys/time.h> 52 #include <sys/systm.h> 53 #include <sys/errno.h> 54 #include <sys/device.h> 55 56 #include <uvm/uvm_extern.h> 57 58 #define _POWERPC_BUS_DMA_PRIVATE 59 #include <machine/bus.h> 60 #include <machine/pio.h> 61 #include <machine/intr.h> 62 63 #include <dev/isa/isavar.h> 64 #include <dev/pci/pcivar.h> 65 #include <dev/pci/pcireg.h> 66 #include <dev/pci/pciconf.h> 67 68 #include <bebox/isa/icu.h> 69 70 struct powerpc_bus_dma_tag pci_bus_dma_tag = { 71 0, /* _bounce_thresh */ 72 _bus_dmamap_create, 73 _bus_dmamap_destroy, 74 _bus_dmamap_load, 75 _bus_dmamap_load_mbuf, 76 _bus_dmamap_load_uio, 77 _bus_dmamap_load_raw, 78 _bus_dmamap_unload, 79 NULL, /* _dmamap_sync */ 80 _bus_dmamem_alloc, 81 _bus_dmamem_free, 82 _bus_dmamem_map, 83 _bus_dmamem_unmap, 84 _bus_dmamem_mmap, 85 }; 86 87 #define PCI_MODE1_ENABLE 0x80000000UL 88 #define PCI_MODE1_ADDRESS_REG (BEBOX_BUS_SPACE_IO + 0x0cf8) 89 #define PCI_MODE1_DATA_REG (BEBOX_BUS_SPACE_IO + 0x0cfc) 90 91 void 92 pci_attach_hook(parent, self, pba) 93 struct device *parent, *self; 94 struct pcibus_attach_args *pba; 95 { 96 } 97 98 int 99 pci_bus_maxdevs(pc, busno) 100 pci_chipset_tag_t pc; 101 int busno; 102 { 103 104 /* 105 * Bus number is irrelevant. Configuration Mechanism 1 is in 106 * use, can have devices 0-32 (i.e. the `normal' range). 107 */ 108 return (32); 109 } 110 111 pcitag_t 112 pci_make_tag(pc, bus, device, function) 113 pci_chipset_tag_t pc; 114 int bus, device, function; 115 { 116 pcitag_t tag; 117 118 if (bus >= 256 || device >= 32 || function >= 8) 119 panic("pci_make_tag: bad request"); 120 121 tag = PCI_MODE1_ENABLE | 122 (bus << 16) | (device << 11) | (function << 8); 123 return tag; 124 } 125 126 void 127 pci_decompose_tag(pc, tag, bp, dp, fp) 128 pci_chipset_tag_t pc; 129 pcitag_t tag; 130 int *bp, *dp, *fp; 131 { 132 133 if (bp != NULL) 134 *bp = (tag >> 16) & 0xff; 135 if (dp != NULL) 136 *dp = (tag >> 11) & 0x1f; 137 if (fp != NULL) 138 *fp = (tag >> 8) & 0x7; 139 return; 140 } 141 142 pcireg_t 143 pci_conf_read(pc, tag, reg) 144 pci_chipset_tag_t pc; 145 pcitag_t tag; 146 int reg; 147 { 148 pcireg_t data; 149 150 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 151 data = in32rb(PCI_MODE1_DATA_REG); 152 out32rb(PCI_MODE1_ADDRESS_REG, 0); 153 return data; 154 } 155 156 void 157 pci_conf_write(pc, tag, reg, data) 158 pci_chipset_tag_t pc; 159 pcitag_t tag; 160 int reg; 161 pcireg_t data; 162 { 163 164 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 165 out32rb(PCI_MODE1_DATA_REG, data); 166 out32rb(PCI_MODE1_ADDRESS_REG, 0); 167 } 168 169 int 170 pci_intr_map(pa, ihp) 171 struct pci_attach_args *pa; 172 pci_intr_handle_t *ihp; 173 { 174 int pin = pa->pa_intrpin; 175 int line = pa->pa_intrline; 176 177 if (pin == 0) { 178 /* No IRQ used. */ 179 goto bad; 180 } 181 182 if (pin > 4) { 183 printf("pci_intr_map: bad interrupt pin %d\n", pin); 184 goto bad; 185 } 186 187 /* 188 * Section 6.2.4, `Miscellaneous Functions', says that 255 means 189 * `unknown' or `no connection' on a PC. We assume that a device with 190 * `no connection' either doesn't have an interrupt (in which case the 191 * pin number should be 0, and would have been noticed above), or 192 * wasn't configured by the BIOS (in which case we punt, since there's 193 * no real way we can know how the interrupt lines are mapped in the 194 * hardware). 195 * 196 * XXX 197 * Since IRQ 0 is only used by the clock, and we can't actually be sure 198 * that the BIOS did its job, we also recognize that as meaning that 199 * the BIOS has not configured the device. 200 */ 201 if (line == 0 || line == 255) { 202 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin); 203 goto bad; 204 } else { 205 if (line >= ICU_LEN) { 206 printf("pci_intr_map: bad interrupt line %d\n", line); 207 goto bad; 208 } 209 if (line == IRQ_SLAVE) { 210 printf("pci_intr_map: changed line 2 to line 9\n"); 211 line = 9; 212 } 213 } 214 215 *ihp = line; 216 return 0; 217 218 bad: 219 *ihp = -1; 220 return 1; 221 } 222 223 const char * 224 pci_intr_string(pc, ih) 225 pci_chipset_tag_t pc; 226 pci_intr_handle_t ih; 227 { 228 static char irqstr[8]; /* 4 + 2 + NULL + sanity */ 229 230 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 231 panic("pci_intr_string: bogus handle 0x%x", ih); 232 233 sprintf(irqstr, "irq %d", ih); 234 return (irqstr); 235 236 } 237 238 const struct evcnt * 239 pci_intr_evcnt(pc, ih) 240 pci_chipset_tag_t pc; 241 pci_intr_handle_t ih; 242 { 243 244 /* XXX for now, no evcnt parent reported */ 245 return NULL; 246 } 247 248 void * 249 pci_intr_establish(pc, ih, level, func, arg) 250 pci_chipset_tag_t pc; 251 pci_intr_handle_t ih; 252 int level, (*func) __P((void *)); 253 void *arg; 254 { 255 256 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 257 panic("pci_intr_establish: bogus handle 0x%x", ih); 258 259 return (void *)intr_establish(ih, IST_LEVEL, level, func, arg); 260 } 261 262 void 263 pci_intr_disestablish(pc, cookie) 264 pci_chipset_tag_t pc; 265 void *cookie; 266 { 267 268 intr_disestablish(cookie); 269 } 270 271 void 272 pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin, 273 int swiz, int *iline) 274 { 275 if (bus == 0) { 276 switch (dev) { 277 case 12: /* SCSI is bit 10, mapped to IRQ 20 */ 278 case 13: /* PCI slot 1 is bit 11, mapped to IRQ 21 */ 279 case 14: /* PCI slot 2 is bit 12, mapped to IRQ 22 */ 280 case 15: /* PCI slot 3 is bit 13, mapped to IRQ 23 */ 281 *iline = dev + 8; 282 } 283 } else { 284 *iline = 20 + ((swiz + dev + 1) & 3); 285 } 286 } 287