1 /* $NetBSD: pci_machdep.c,v 1.4 1998/08/15 03:02:37 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Charles M. Hannum. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Machine-specific functions for PCI autoconfiguration. 35 * 36 * On PCs, there are two methods of generating PCI configuration cycles. 37 * We try to detect the appropriate mechanism for this machine and set 38 * up a few function pointers to access the correct method directly. 39 * 40 * The configuration method can be hard-coded in the config file by 41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode 42 * as defined section 3.6.4.1, `Generating Configuration Cycles'. 43 */ 44 45 #include <sys/types.h> 46 #include <sys/param.h> 47 #include <sys/time.h> 48 #include <sys/systm.h> 49 #include <sys/errno.h> 50 #include <sys/device.h> 51 52 #include <vm/vm.h> 53 #include <vm/vm_kern.h> 54 55 #include <machine/bus.h> 56 #include <machine/pio.h> 57 #include <machine/intr.h> 58 59 #include <dev/isa/isavar.h> 60 #include <dev/pci/pcivar.h> 61 #include <dev/pci/pcireg.h> 62 63 #include <bebox/isa/icu.h> 64 65 #define PCI_MODE1_ENABLE 0x80000000UL 66 #define PCI_MODE1_ADDRESS_REG (BEBOX_BUS_SPACE_IO + 0x0cf8) 67 #define PCI_MODE1_DATA_REG (BEBOX_BUS_SPACE_IO + 0x0cfc) 68 69 void 70 pci_attach_hook(parent, self, pba) 71 struct device *parent, *self; 72 struct pcibus_attach_args *pba; 73 { 74 } 75 76 int 77 pci_bus_maxdevs(pc, busno) 78 pci_chipset_tag_t pc; 79 int busno; 80 { 81 82 /* 83 * Bus number is irrelevant. Configuration Mechanism 1 is in 84 * use, can have devices 0-32 (i.e. the `normal' range). 85 */ 86 return (32); 87 } 88 89 pcitag_t 90 pci_make_tag(pc, bus, device, function) 91 pci_chipset_tag_t pc; 92 int bus, device, function; 93 { 94 pcitag_t tag; 95 96 if (bus >= 256 || device >= 32 || function >= 8) 97 panic("pci_make_tag: bad request"); 98 99 tag = PCI_MODE1_ENABLE | 100 (bus << 16) | (device << 11) | (function << 8); 101 return tag; 102 } 103 104 void 105 pci_decompose_tag(pc, tag, bp, dp, fp) 106 pci_chipset_tag_t pc; 107 pcitag_t tag; 108 int *bp, *dp, *fp; 109 { 110 111 if (bp != NULL) 112 *bp = (tag >> 16) & 0xff; 113 if (dp != NULL) 114 *dp = (tag >> 11) & 0x1f; 115 if (fp != NULL) 116 *fp = (tag >> 8) & 0x7; 117 return; 118 } 119 120 pcireg_t 121 pci_conf_read(pc, tag, reg) 122 pci_chipset_tag_t pc; 123 pcitag_t tag; 124 int reg; 125 { 126 pcireg_t data; 127 128 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 129 data = in32rb(PCI_MODE1_DATA_REG); 130 out32rb(PCI_MODE1_ADDRESS_REG, 0); 131 return data; 132 } 133 134 void 135 pci_conf_write(pc, tag, reg, data) 136 pci_chipset_tag_t pc; 137 pcitag_t tag; 138 int reg; 139 pcireg_t data; 140 { 141 142 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 143 out32rb(PCI_MODE1_DATA_REG, data); 144 out32rb(PCI_MODE1_ADDRESS_REG, 0); 145 } 146 147 int 148 pci_intr_map(pc, intrtag, pin, line, ihp) 149 pci_chipset_tag_t pc; 150 pcitag_t intrtag; 151 int pin, line; 152 pci_intr_handle_t *ihp; 153 { 154 155 if (pin == 0) { 156 /* No IRQ used. */ 157 goto bad; 158 } 159 160 if (pin > 4) { 161 printf("pci_intr_map: bad interrupt pin %d\n", pin); 162 goto bad; 163 } 164 165 /* 166 * Section 6.2.4, `Miscellaneous Functions', says that 255 means 167 * `unknown' or `no connection' on a PC. We assume that a device with 168 * `no connection' either doesn't have an interrupt (in which case the 169 * pin number should be 0, and would have been noticed above), or 170 * wasn't configured by the BIOS (in which case we punt, since there's 171 * no real way we can know how the interrupt lines are mapped in the 172 * hardware). 173 * 174 * XXX 175 * Since IRQ 0 is only used by the clock, and we can't actually be sure 176 * that the BIOS did its job, we also recognize that as meaning that 177 * the BIOS has not configured the device. 178 */ 179 if (line == 0 || line == 255) { 180 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin); 181 goto bad; 182 } else { 183 if (line >= ICU_LEN) { 184 printf("pci_intr_map: bad interrupt line %d\n", line); 185 goto bad; 186 } 187 if (line == IRQ_SLAVE) { 188 printf("pci_intr_map: changed line 2 to line 9\n"); 189 line = 9; 190 } 191 } 192 193 *ihp = line; 194 return 0; 195 196 bad: 197 *ihp = -1; 198 return 1; 199 } 200 201 const char * 202 pci_intr_string(pc, ih) 203 pci_chipset_tag_t pc; 204 pci_intr_handle_t ih; 205 { 206 static char irqstr[8]; /* 4 + 2 + NULL + sanity */ 207 208 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 209 panic("pci_intr_string: bogus handle 0x%x\n", ih); 210 211 sprintf(irqstr, "irq %d", ih); 212 return (irqstr); 213 214 } 215 216 void * 217 pci_intr_establish(pc, ih, level, func, arg) 218 pci_chipset_tag_t pc; 219 pci_intr_handle_t ih; 220 int level, (*func) __P((void *)); 221 void *arg; 222 { 223 224 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 225 panic("pci_intr_establish: bogus handle 0x%x\n", ih); 226 227 return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg); 228 } 229 230 void 231 pci_intr_disestablish(pc, cookie) 232 pci_chipset_tag_t pc; 233 void *cookie; 234 { 235 236 return isa_intr_disestablish(NULL, cookie); 237 } 238