xref: /netbsd-src/sys/arch/bebox/include/cpu.h (revision dc306354b0b29af51801a7632f1e95265a68cd81)
1 /*	$NetBSD: cpu.h,v 1.3 1997/11/27 10:18:43 sakamoto Exp $	*/
2 
3 /*
4  * Copyright (C) 1995-1997 Wolfgang Solfrank.
5  * Copyright (C) 1995-1997 TooLs GmbH.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by TooLs GmbH.
19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 #ifndef	_MACHINE_CPU_H_
34 #define	_MACHINE_CPU_H_
35 
36 #include <machine/frame.h>
37 #include <machine/psl.h>
38 
39 #define	CLKF_USERMODE(frame)	(((frame)->srr1 & PSL_PR) != 0)
40 #define	CLKF_BASEPRI(frame)	((frame)->pri == 0)
41 #define	CLKF_PC(frame)		((frame)->srr0)
42 #define	CLKF_INTR(frame)	((frame)->depth > 0)
43 
44 #define	cpu_swapout(p)
45 #define cpu_wait(p)
46 
47 extern void delay __P((int));
48 #define	DELAY(n)		delay(n)
49 
50 extern volatile int want_resched;
51 extern volatile int astpending;
52 
53 #define	need_resched()		(want_resched = 1, astpending = 1)
54 #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, astpending = 1)
55 #define	signotify(p)		(astpending = 1)
56 
57 #define	CACHELINESIZE	32			/* For now		XXX */
58 
59 extern __inline void
60 syncicache(from, len)
61 	void *from;
62 	int len;
63 {
64 	int l = len;
65 	void *p = from;
66 
67 	do {
68 		__asm__ __volatile ("dcbst 0,%0" :: "r"(p));
69 		p += CACHELINESIZE;
70 	} while ((l -= CACHELINESIZE) > 0);
71 	__asm__ __volatile ("sync");
72 	do {
73 		__asm__ __volatile ("icbi 0,%0" :: "r"(from));
74 		from += CACHELINESIZE;
75 	} while ((len -= CACHELINESIZE) > 0);
76 	__asm__ __volatile ("isync");
77 }
78 
79 extern char *bootpath;
80 
81 #endif	/* _MACHINE_CPU_H_ */
82