1 /* $NetBSD: et4000.c,v 1.26 2014/07/25 08:10:32 dholland Exp $ */ 2 /*- 3 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Julian Coleman. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 /* 32 * Thanks to: 33 * Leo Weppelman 34 * 'Maximum Entropy' 35 * Thomas Gerner 36 * Juergen Orscheidt 37 * for their help and for code that I could refer to when writing this driver. 38 * 39 * Defining DEBUG_ET4000 will cause the driver to *always* attach. Use for 40 * debugging register settings. 41 */ 42 43 /* 44 #define DEBUG_ET4000 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: et4000.c,v 1.26 2014/07/25 08:10:32 dholland Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/ioctl.h> 52 #include <sys/queue.h> 53 #include <sys/malloc.h> 54 #include <sys/device.h> 55 #include <sys/systm.h> 56 #include <sys/conf.h> 57 #include <sys/event.h> 58 #include <atari/vme/vmevar.h> 59 60 #include <machine/iomap.h> 61 #include <machine/video.h> 62 #include <machine/mfp.h> 63 #include <machine/cpu.h> 64 #include <atari/atari/device.h> 65 #include <atari/dev/grfioctl.h> 66 #include <atari/dev/grf_etreg.h> 67 68 #include "ioconf.h" 69 70 /* 71 * Allow a 8Kb io-region and a 1MB frame buffer to be mapped. This 72 * is more or less required by the XFree server. The X server also 73 * requires that the frame buffer be mapped above 0x3fffff. 74 */ 75 #define REG_MAPPABLE (8 * 1024) /* 0x2000 */ 76 #define FRAME_MAPPABLE (1 * 1024 * 1024) /* 0x100000 */ 77 #define FRAME_BASE (4 * 1024 * 1024) /* 0x400000 */ 78 #define VGA_MAPPABLE (128 * 1024) /* 0x20000 */ 79 #define VGA_BASE 0xa0000 80 81 static int et4k_vme_match(device_t, cfdata_t, void *); 82 static void et4k_vme_attach(device_t, device_t, void *); 83 static int et4k_probe_addresses(struct vme_attach_args *); 84 static void et4k_start(bus_space_tag_t *, bus_space_handle_t *, int *, 85 u_char *); 86 static void et4k_stop(bus_space_tag_t *, bus_space_handle_t *, int *, 87 u_char *); 88 static int et4k_detect(bus_space_tag_t *, bus_space_tag_t *, 89 bus_space_handle_t *, bus_space_handle_t *, u_int); 90 91 int et4kon(dev_t); 92 int et4koff(dev_t); 93 94 /* Register and screen memory addresses for ET4000 based VME cards */ 95 static struct et4k_addresses { 96 u_long io_addr; 97 u_long io_size; 98 u_long mem_addr; 99 u_long mem_size; 100 } et4kstd[] = { 101 { 0xfebf0000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Crazy Dots VME & II */ 102 { 0xfed00000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Spektrum I & HC */ 103 { 0xfed80000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE } /* Spektrum TC */ 104 }; 105 106 #define NET4KSTD (sizeof(et4kstd) / sizeof(et4kstd[0])) 107 108 struct grfabs_et4k_priv { 109 volatile void * regkva; 110 volatile void * memkva; 111 int regsz; 112 int memsz; 113 } et4k_priv; 114 115 struct et4k_softc { 116 device_t sc_dev; 117 bus_space_tag_t sc_iot; 118 bus_space_tag_t sc_memt; 119 bus_space_handle_t sc_ioh; 120 bus_space_handle_t sc_memh; 121 int sc_flags; 122 int sc_iobase; 123 int sc_maddr; 124 int sc_iosize; 125 int sc_msize; 126 }; 127 128 #define ET_SC_FLAGS_INUSE 1 129 130 CFATTACH_DECL_NEW(et4k, sizeof(struct et4k_softc), 131 et4k_vme_match, et4k_vme_attach, NULL, NULL); 132 133 dev_type_open(et4kopen); 134 dev_type_close(et4kclose); 135 dev_type_read(et4kread); 136 dev_type_write(et4kwrite); 137 dev_type_ioctl(et4kioctl); 138 dev_type_mmap(et4kmmap); 139 140 const struct cdevsw et4k_cdevsw = { 141 .d_open = et4kopen, 142 .d_close = et4kclose, 143 .d_read = et4kread, 144 .d_write = et4kwrite, 145 .d_ioctl = et4kioctl, 146 .d_stop = nostop, 147 .d_tty = notty, 148 .d_poll = nopoll, 149 .d_mmap = et4kmmap, 150 .d_kqfilter = nokqfilter, 151 .d_discard = nodiscard, 152 .d_flag = 0 153 }; 154 155 /* 156 * Look for a ET4000 (Crazy Dots) card on the VME bus. We might 157 * match Spektrum cards too (untested). 158 */ 159 int 160 et4k_vme_match(device_t parent, cfdata_t cf, void *aux) 161 { 162 struct vme_attach_args *va = aux; 163 164 return et4k_probe_addresses(va); 165 } 166 167 static int 168 et4k_probe_addresses(struct vme_attach_args *va) 169 { 170 int i, found = 0; 171 bus_space_tag_t iot; 172 bus_space_tag_t memt; 173 bus_space_handle_t ioh; 174 bus_space_handle_t memh; 175 176 iot = va->va_iot; 177 memt = va->va_memt; 178 179 /* Loop around our possible addresses looking for a match */ 180 for (i = 0; i < NET4KSTD; i++) { 181 struct et4k_addresses *et4k_ap = &et4kstd[i]; 182 struct vme_attach_args vat = *va; 183 184 if (vat.va_irq != VMECF_IRQ_DEFAULT) { 185 printf("%s: config error: no irq support\n", __func__); 186 return 0; 187 } 188 if (vat.va_iobase == VMECF_IOPORT_DEFAULT) 189 vat.va_iobase = et4k_ap->io_addr; 190 if (vat.va_maddr == VMECF_MEM_DEFAULT) 191 vat.va_maddr = et4k_ap->mem_addr; 192 if (vat.va_iosize == VMECF_IOSIZE_DEFAULT) 193 vat.va_iosize = et4k_ap->io_size; 194 if (vat.va_msize == VMECF_MEMSIZ_DEFAULT) 195 vat.va_msize = et4k_ap->mem_size; 196 if (bus_space_map(iot, vat.va_iobase, vat.va_iosize, 0, 197 &ioh)) { 198 printf("%s: cannot map io area\n", __func__); 199 return 0; 200 } 201 if (bus_space_map(memt, vat.va_maddr, vat.va_msize, 202 BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_CACHEABLE, 203 &memh)) { 204 bus_space_unmap(iot, ioh, vat.va_iosize); 205 printf("%s: cannot map memory area\n", __func__); 206 return 0; 207 } 208 found = et4k_detect(&iot, &memt, &ioh, &memh, vat.va_msize); 209 bus_space_unmap(iot, ioh, vat.va_iosize); 210 bus_space_unmap(memt, memh, vat.va_msize); 211 if (found) { 212 *va = vat; 213 return 1; 214 } 215 } 216 return 0; 217 } 218 219 static void 220 et4k_start(bus_space_tag_t *iot, bus_space_handle_t *ioh, int *vgabase, u_char *saved) 221 { 222 /* Enable VGA */ 223 bus_space_write_1(*iot, *ioh, GREG_VIDEOSYSENABLE, 0x01); 224 /* Check whether colour (base = 3d0) or mono (base = 3b0) mode */ 225 *vgabase = (bus_space_read_1(*iot, *ioh, GREG_MISC_OUTPUT_R) & 0x01) 226 ? 0x3d0 : 0x3b0; 227 /* Enable 'Tseng Extensions' - writes to CRTC and ATC[16] */ 228 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x03); 229 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0xa0); 230 /* Set up 16 bit I/O, memory, Tseng addressing and linear mapping */ 231 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x36); 232 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, 0xf0); 233 /* Enable writes to CRTC[0..7] */ 234 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 235 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 236 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved & 0x7f); 237 /* Map all memory for video modes */ 238 bus_space_write_1(*iot, *ioh, 0x3ce, 0x06); 239 bus_space_write_1(*iot, *ioh, 0x3cf, 0x01); 240 } 241 242 static void 243 et4k_stop(bus_space_tag_t *iot, bus_space_handle_t *ioh, int *vgabase, u_char *saved) 244 { 245 /* Restore writes to CRTC[0..7] */ 246 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 247 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 248 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved | 0x80); 249 /* Disable 'Tseng Extensions' */ 250 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0x00); 251 bus_space_write_1(*iot, *ioh, GREG_DISPMODECONTROL, 0x29); 252 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x01); 253 } 254 255 static int 256 et4k_detect(bus_space_tag_t *iot, bus_space_tag_t *memt, bus_space_handle_t *ioh, bus_space_handle_t *memh, u_int memsize) 257 { 258 u_char orig, new, saved; 259 int vgabase; 260 261 /* Test accessibility of registers and memory */ 262 if (!bus_space_peek_1(*iot, *ioh, GREG_STATUS1_R)) 263 return 0; 264 if (!bus_space_peek_1(*memt, *memh, 0)) 265 return 0; 266 267 et4k_start(iot, ioh, &vgabase, &saved); 268 269 /* Is the card a Tseng card? Check read/write of ATC[16] */ 270 (void)bus_space_read_1(*iot, *ioh, vgabase + 0x0a); 271 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 272 orig = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 273 bus_space_write_1(*iot, *ioh, ACT_ADDRESS_W, (orig ^ 0x10)); 274 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 275 new = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 276 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, orig); 277 if (new != (orig ^ 0x10)) { 278 #ifdef DEBUG_ET4000 279 printf("et4000: ATC[16] failed (%x != %x)\n", 280 new, (orig ^ 0x10)); 281 #else 282 et4k_stop(iot, ioh, &vgabase, &saved); 283 return 0; 284 #endif 285 } 286 /* Is the card and ET4000? Check read/write of CRTC[33] */ 287 bus_space_write_1(*iot, *ioh, vgabase + 0x04, 0x33); 288 orig = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 289 bus_space_write_1(*iot, *ioh, vgabase + 0x05, (orig ^ 0x0f)); 290 new = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 291 bus_space_write_1(*iot, *ioh, vgabase + 0x05, orig); 292 if (new != (orig ^ 0x0f)) { 293 #ifdef DEBUG_ET4000 294 printf("et4000: CRTC[33] failed (%x != %x)\n", 295 new, (orig ^ 0x0f)); 296 #else 297 et4k_stop(iot, ioh, &vgabase, &saved); 298 return 0; 299 #endif 300 } 301 302 /* Set up video memory so we can read & write it */ 303 bus_space_write_1(*iot, *ioh, 0x3c4, 0x04); 304 bus_space_write_1(*iot, *ioh, 0x3c5, 0x06); 305 bus_space_write_1(*iot, *ioh, 0x3c4, 0x07); 306 bus_space_write_1(*iot, *ioh, 0x3c5, 0xa8); 307 bus_space_write_1(*iot, *ioh, 0x3ce, 0x01); 308 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 309 bus_space_write_1(*iot, *ioh, 0x3ce, 0x03); 310 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 311 bus_space_write_1(*iot, *ioh, 0x3ce, 0x05); 312 bus_space_write_1(*iot, *ioh, 0x3cf, 0x40); 313 314 #define TEST_PATTERN 0xa5a5a5a5 315 316 bus_space_write_4(*memt, *memh, 0x0, TEST_PATTERN); 317 if (bus_space_read_4(*memt, *memh, 0x0) != TEST_PATTERN) 318 { 319 #ifdef DEBUG_ET4000 320 printf("et4000: Video base write/read failed\n"); 321 #else 322 et4k_stop(iot, ioh, &vgabase, &saved); 323 return 0; 324 #endif 325 } 326 bus_space_write_4(*memt, *memh, memsize - 4, TEST_PATTERN); 327 if (bus_space_read_4(*memt, *memh, memsize - 4) != TEST_PATTERN) 328 { 329 #ifdef DEBUG_ET4000 330 printf("et4000: Video top write/read failed\n"); 331 #else 332 et4k_stop(iot, ioh, &vgabase, &saved); 333 return 0; 334 #endif 335 } 336 337 et4k_stop(iot, ioh, &vgabase, &saved); 338 return 1; 339 } 340 341 static void 342 et4k_vme_attach(device_t parent, device_t self, void *aux) 343 { 344 struct et4k_softc *sc = device_private(self); 345 struct vme_attach_args *va = aux; 346 bus_space_handle_t ioh; 347 bus_space_handle_t memh; 348 349 sc->sc_dev = self; 350 351 printf("\n"); 352 353 if (bus_space_map(va->va_iot, va->va_iobase, va->va_iosize, 0, &ioh)) 354 panic("%s: cannot map io area", __func__); 355 if (bus_space_map(va->va_memt, va->va_maddr, va->va_msize, 0, &memh)) 356 panic("%s: cannot map mem area", __func__); 357 358 sc->sc_iot = va->va_iot; 359 sc->sc_ioh = ioh; 360 sc->sc_memt = va->va_memt; 361 sc->sc_memh = memh; 362 sc->sc_flags = 0; 363 sc->sc_iobase = va->va_iobase; 364 sc->sc_maddr = va->va_maddr; 365 sc->sc_iosize = va->va_iosize; 366 sc->sc_msize = va->va_msize; 367 368 et4k_priv.regkva = (volatile void *)ioh; 369 et4k_priv.memkva = (volatile void *)memh; 370 et4k_priv.regsz = va->va_iosize; 371 et4k_priv.memsz = va->va_msize; 372 } 373 374 int 375 et4kopen(dev_t dev, int flags, int devtype, struct lwp *l) 376 { 377 struct et4k_softc *sc; 378 379 sc = device_lookup_private(&et4k_cd, minor(dev)); 380 if (sc == NULL) 381 return ENXIO; 382 if (sc->sc_flags & ET_SC_FLAGS_INUSE) 383 return EBUSY; 384 sc->sc_flags |= ET_SC_FLAGS_INUSE; 385 return 0; 386 } 387 388 int 389 et4kclose(dev_t dev, int flags, int devtype, struct lwp *l) 390 { 391 struct et4k_softc *sc; 392 393 /* 394 * XXX: Should we reset to a default mode? 395 */ 396 sc = device_lookup_private(&et4k_cd, minor(dev)); 397 sc->sc_flags &= ~ET_SC_FLAGS_INUSE; 398 return 0; 399 } 400 401 int 402 et4kread(dev_t dev, struct uio *uio, int flags) 403 { 404 405 return EINVAL; 406 } 407 408 int 409 et4kwrite(dev_t dev, struct uio *uio, int flags) 410 { 411 412 return EINVAL; 413 } 414 415 int 416 et4kioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 417 { 418 struct grfinfo g_display; 419 struct et4k_softc *sc; 420 421 sc = device_lookup_private(&et4k_cd, minor(dev)); 422 switch (cmd) { 423 case GRFIOCON: 424 return 0; 425 break; 426 case GRFIOCOFF: 427 return 0; 428 break; 429 case GRFIOCGINFO: 430 g_display.gd_fbaddr = (void *) (sc->sc_maddr); 431 g_display.gd_fbsize = sc->sc_msize; 432 g_display.gd_linbase = FRAME_BASE; 433 g_display.gd_regaddr = (void *) (sc->sc_iobase); 434 g_display.gd_regsize = sc->sc_iosize; 435 g_display.gd_vgaaddr = (void *) (sc->sc_maddr); 436 g_display.gd_vgasize = VGA_MAPPABLE; 437 g_display.gd_vgabase = VGA_BASE; 438 g_display.gd_colors = 16; 439 g_display.gd_planes = 4; 440 g_display.gd_fbwidth = 640; /* XXX: should be 'unknown' */ 441 g_display.gd_fbheight = 400; /* XXX: should be 'unknown' */ 442 g_display.gd_fbx = 0; 443 g_display.gd_fby = 0; 444 g_display.gd_dwidth = 0; 445 g_display.gd_dheight = 0; 446 g_display.gd_dx = 0; 447 g_display.gd_dy = 0; 448 g_display.gd_bank_size = 0; 449 memcpy(data, (void *)&g_display, sizeof(struct grfinfo)); 450 break; 451 case GRFIOCMAP: 452 return EINVAL; 453 break; 454 case GRFIOCUNMAP: 455 return EINVAL; 456 break; 457 default: 458 return EINVAL; 459 break; 460 } 461 return 0; 462 } 463 464 paddr_t 465 et4kmmap(dev_t dev, off_t offset, int prot) 466 { 467 struct et4k_softc *sc; 468 469 sc = device_lookup_private(&et4k_cd, minor(dev)); 470 471 /* 472 * control registers 473 * mapped from offset 0x0 to REG_MAPPABLE 474 */ 475 if (offset >= 0 && offset <= sc->sc_iosize) 476 return m68k_btop(sc->sc_iobase + offset); 477 478 /* 479 * VGA memory 480 * mapped from offset 0xa0000 to 0xc0000 481 */ 482 if (offset >= VGA_BASE && offset < (VGA_MAPPABLE + VGA_BASE)) 483 return m68k_btop(sc->sc_maddr + offset - VGA_BASE); 484 485 /* 486 * frame buffer 487 * mapped from offset 0x400000 to 0x4fffff 488 */ 489 if (offset >= FRAME_BASE && offset < sc->sc_msize + FRAME_BASE) 490 return m68k_btop(sc->sc_maddr + offset - FRAME_BASE); 491 492 return -1; 493 } 494 495 int 496 et4kon(dev_t dev) 497 { 498 struct et4k_softc *sc; 499 500 if (minor(dev) >= et4k_cd.cd_ndevs) 501 return ENXIO; 502 sc = device_lookup_private(&et4k_cd, minor(dev)); 503 if (sc == NULL) 504 return ENXIO; 505 return 0; 506 } 507 508 int 509 et4koff(dev_t dev) 510 { 511 512 return 0; 513 } 514 515