xref: /netbsd-src/sys/arch/atari/pci/pci_hades.c (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: pci_hades.c,v 1.5 2003/07/15 01:19:54 lukem Exp $	*/
2 
3 /*
4  * Copyright (c) 1996 Leo Weppelman.  All rights reserved.
5  * Copyright (c) 1996, 1997 Christopher G. Demetriou.  All rights reserved.
6  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by Charles M. Hannum.
19  * 4. The name of the author may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: pci_hades.c,v 1.5 2003/07/15 01:19:54 lukem Exp $");
36 
37 #include <sys/types.h>
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41 
42 #include <uvm/uvm_extern.h>
43 
44 #include <machine/bus.h>
45 
46 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcireg.h>
48 
49 #include <machine/cpu.h>
50 #include <machine/iomap.h>
51 #include <machine/mfp.h>
52 #include <machine/bswap.h>
53 
54 #include <atari/atari/device.h>
55 #include <atari/pci/pci_vga.h>
56 #include <atari/dev/grf_etreg.h>
57 
58 int
59 pci_bus_maxdevs(pc, busno)
60 	pci_chipset_tag_t pc;
61 	int busno;
62 {
63 	return (4);
64 }
65 
66 static int pci_config_offset __P((pcitag_t));
67 
68 /*
69  * Atari_init.c maps the config areas PAGE_SIZE bytes apart....
70  */
71 static int pci_config_offset(tag)
72 pcitag_t	tag;
73 {
74 	int	device;
75 
76 	device = (tag >> 11) & 0x1f;
77 	return(device * PAGE_SIZE);
78 }
79 
80 pcireg_t
81 pci_conf_read(pc, tag, reg)
82 	pci_chipset_tag_t pc;
83 	pcitag_t tag;
84 	int reg;
85 {
86 	u_long	data;
87 
88 	data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
89 	return (bswap32(data));
90 }
91 
92 void
93 pci_conf_write(pc, tag, reg, data)
94 	pci_chipset_tag_t pc;
95 	pcitag_t tag;
96 	int reg;
97 	pcireg_t data;
98 {
99 	*((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
100 		= bswap32(data);
101 }
102 
103 /*
104  * The interrupt stuff is rather ugly. On the Hades, all interrupt lines
105  * for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
106  * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
107  * to the slot position.
108  */
109 static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
110 
111 static int	iifun __P((int, int));
112 
113 static int
114 iifun(slot, sr)
115 int	slot;
116 int	sr;
117 {
118 	pci_intr_info_t *iinfo_p;
119 	int		s;
120 
121 	iinfo_p = &iinfo[slot];
122 
123 	/*
124 	 * Disable the interrupts
125 	 */
126 	MFP2->mf_imrb  &= ~iinfo_p->imask;
127 
128 	if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
129 		/*
130 		 * We're running at a too high priority now.
131 		 */
132 		add_sicallback((si_farg)iifun, (void*)slot, 0);
133 	}
134 	else {
135 		s = splx(iinfo_p->ipl);
136 		(void) (iinfo_p->ifunc)(iinfo_p->iarg);
137 		splx(s);
138 
139 		/*
140 		 * Re-enable interrupts after handling
141 		 */
142 		MFP2->mf_imrb |= iinfo_p->imask;
143 	}
144 	return 1;
145 }
146 
147 void *
148 pci_intr_establish(pc, ih, level, ih_fun, ih_arg)
149 	pci_chipset_tag_t	pc;
150 	pci_intr_handle_t	ih;
151 	int			level;
152 	int			(*ih_fun) __P((void *));
153 	void			*ih_arg;
154 {
155 	pci_intr_info_t *iinfo_p;
156 	struct intrhand	*ihand;
157 	int		slot;
158 
159 	slot    = ih;
160 	iinfo_p = &iinfo[slot];
161 
162 	if (iinfo_p->ipl > 0)
163 	    panic("pci_intr_establish: interrupt was already established");
164 
165 	ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
166 				(hw_ifun_t)iifun, (void *)slot);
167 	if (ihand != NULL) {
168 		iinfo_p->ipl   = level;
169 		iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
170 		iinfo_p->ifunc = ih_fun;
171 		iinfo_p->iarg  = ih_arg;
172 		iinfo_p->ihand = ihand;
173 
174 		/*
175 		 * Enable (unmask) the interrupt
176 		 */
177 		MFP2->mf_imrb |= iinfo_p->imask;
178 		MFP2->mf_ierb |= iinfo_p->imask;
179 		return(iinfo_p);
180 	}
181 	return NULL;
182 }
183 
184 void
185 pci_intr_disestablish(pc, cookie)
186 	pci_chipset_tag_t pc;
187 	void *cookie;
188 {
189 	pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
190 
191 	if (iinfo->ipl < 0)
192 	    panic("pci_intr_disestablish: interrupt was not established");
193 
194 	MFP2->mf_imrb &= ~iinfo->imask;
195 	MFP2->mf_ierb &= ~iinfo->imask;
196 	(void) intr_disestablish(iinfo_p->ihand);
197 	iinfo_p->ipl = -1;
198 }
199 
200 /*
201  * XXX: Why are we repeating this everywhere! (Leo)
202  */
203 #define PCI_LINMEMBASE  0x0e000000
204 
205 static u_char crt_tab[] = {
206 	0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
207 	0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
208 	0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
209 	0xff };
210 
211 static u_char seq_tab[] = {
212 	0x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00 };
213 
214 static u_char attr_tab[] = {
215 	0x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00 };
216 
217 static u_char gdc_tab[] = {
218 	0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff };
219 
220 void
221 ati_vga_init(pc, tag, id, ba, fb)
222 	pci_chipset_tag_t	pc;
223 	pcitag_t		tag;
224 	int			id;
225 	volatile u_char		*ba;
226 	u_char			*fb;
227 {
228 	int			i, csr;
229 
230 	/* Turn on the card */
231 	pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
232 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
233 	csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
234 	csr |= PCI_COMMAND_MASTER_ENABLE;
235 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
236 
237 	/*
238 	 * Make sure we're allowed to write all crt-registers and reload them.
239 	 */
240 	WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));
241 
242 	for (i = 0; i < 0x18; i++)
243 		WCrt(ba, i, crt_tab[i]);
244 	for (i = 0; i < 8; i++)
245 		WSeq(ba, i, seq_tab[i]);
246 	for (i = 0; i < 9; i++)
247 		WGfx(ba, i, gdc_tab[i]);
248 	for (i = 0x10; i < 0x18; i++)
249 		WAttr(ba, i, attr_tab[i - 0x10]);
250 	WAttr(ba, 0x20, 0);
251 }
252