xref: /netbsd-src/sys/arch/atari/isa/isa_milan.c (revision 96230fab84e26a6435963032070e916a951a8b2e)
1 /*	$NetBSD: isa_milan.c,v 1.9 2008/04/28 20:23:15 martin Exp $	*/
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Leo Weppelman.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: isa_milan.c,v 1.9 2008/04/28 20:23:15 martin Exp $");
34 
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 
40 #include <dev/isa/isavar.h>
41 #include <dev/isa/isareg.h>
42 
43 #include <machine/iomap.h>
44 
45 void	isa_bus_init(void);
46 
47 static void new_imask(void);
48 static void isa_callback(int);
49 
50 /*
51  * Bitmask of currently enabled isa interrupts. Used by new_imask().
52  */
53 static u_int16_t imask_enable = 0xffff;
54 
55 #define	IRQ_SLAVE		2	/* Slave at level 2		*/
56 #define MILAN_MAX_ISA_INTS	16	/* Max. number of vectors	*/
57 #define	ICU_OFFSET		0	/* Interrupt vector base	*/
58 
59 #define	WICU(icu, val)		*(volatile u_int8_t*)(icu) = val
60 
61 static isa_intr_info_t milan_isa_iinfo[MILAN_MAX_ISA_INTS];
62 
63 void
64 isa_bus_init()
65 {
66 	volatile u_int8_t	*icu;
67 
68 	/*
69 	 * Initialize both the icu's:
70 	 *   - enter Special Mask Mode
71 	 *   - Block all interrupts
72 	 */
73 	icu = (u_int8_t*)(AD_8259_MASTER);
74 
75 	icu[0] = 0x11;			/* reset; program device, four bytes */
76 	icu[1] = ICU_OFFSET;		/* starting at this vector index */
77 	icu[1] = (1 << IRQ_SLAVE);	/* slave on line 2 */
78 	icu[1] = 1;			/* 8086 mode */
79 	icu[1] = 0xff;			/* leave interrupts masked */
80 	icu[0] = 0x68;			/* special mask mode  */
81 	icu[0] = 0x0a;			/* Read IRR by default. */
82 
83 	icu = (u_int8_t*)(AD_8259_SLAVE);
84 
85 	icu[0] = 0x11;			/* reset; program device, four bytes */
86 	icu[1] = ICU_OFFSET + 8;	/* starting at this vector index */
87 	icu[1] = IRQ_SLAVE;		/* slave on line 2 */
88 	icu[1] = 1;			/* 8086 mode */
89 	icu[1] = 0xff;			/* leave interrupts masked */
90 	icu[0] = 0x68;			/* special mask mode  */
91 	icu[0] = 0x0a;			/* Read IRR by default. */
92 }
93 
94 /*
95  * Determine and activate new interrupt mask by scanning the milan_isa_iinfo
96  * array for enabled interrupts.
97  */
98 static void
99 new_imask()
100 {
101 	int		irq;
102 	u_int16_t	nmask = 0;
103 
104 	for (irq = 0; irq < MILAN_MAX_ISA_INTS; irq++) {
105 		if (milan_isa_iinfo[irq].ifunc != NULL)
106 			nmask |= 1 << irq;
107 		if (nmask >= 0x100)
108 			nmask |= 1 << IRQ_SLAVE;
109 	}
110 	imask_enable = ~nmask;
111 	WICU(AD_8259_MASTER+1, imask_enable & 0xff);
112 	WICU(AD_8259_SLAVE+1 , (imask_enable >> 8) & 0xff);
113 }
114 
115 static void
116 isa_callback(vector)
117 	int	vector;
118 {
119 	isa_intr_info_t	*iinfo_p;
120 	int		s;
121 
122 	iinfo_p = &milan_isa_iinfo[vector];
123 
124 	s = splx(iinfo_p->ipl);
125 	(void) (iinfo_p->ifunc)(iinfo_p->iarg);
126 	if (vector > 7)
127 		WICU(AD_8259_SLAVE, 0x60 | (vector & 7));
128 	else WICU(AD_8259_MASTER, 0x60 | (vector & 7));
129 	splx(s);
130 }
131 
132 void milan_isa_intr(int, int);
133 void
134 milan_isa_intr(vector, sr)
135 	int	vector, sr;
136 {
137 	isa_intr_info_t *iinfo_p;
138 	int		s;
139 
140 	if (vector >= MILAN_MAX_ISA_INTS) {
141 		printf("milan_isa_intr: Bogus vector %d\n", vector);
142 		return;
143 	}
144 
145 	/* Ack cascade 0x60 == Specific EOI		*/
146 	if (vector > 7)
147 		WICU(AD_8259_MASTER, 0x60|IRQ_SLAVE);
148 
149 	iinfo_p = &milan_isa_iinfo[vector];
150 	if (iinfo_p->ifunc == NULL) {
151 		printf("milan_isa_intr: Stray interrupt: %d (mask:%04x)\n",
152 				vector, imask_enable);
153 		return;
154 	}
155 	if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
156 		/*
157 		 * We're running at a too high priority now.
158 		 */
159 		add_sicallback((si_farg)isa_callback, (void*)vector, 0);
160 	}
161 	else {
162 		s = splx(iinfo_p->ipl);
163 		(void) (iinfo_p->ifunc)(iinfo_p->iarg);
164 		if (vector > 7)
165 			WICU(AD_8259_SLAVE, 0x60 | (vector & 7));
166 		else WICU(AD_8259_MASTER, 0x60 | (vector & 7));
167 		splx(s);
168 	}
169 }
170 
171 /*
172  * Try to allocate a free interrupt... On the Milan, we have available:
173  * 5, 9, 10, 11, 13. Or in a bitmask: 0x1720.
174  */
175 #define	MILAN_AVAIL_ISA_INTS	0x1720
176 
177 int
178 isa_intr_alloc(ic, mask, type, irq)
179 	isa_chipset_tag_t ic;
180 	int mask;
181 	int type;
182 	int *irq;
183 {
184 	int	i;
185 
186 	/*
187 	 * Say no to impossible questions...
188 	 */
189 	if (!(mask &= MILAN_AVAIL_ISA_INTS))
190 		return 1;
191 
192 	for (i = 0; i < MILAN_MAX_ISA_INTS; i++) {
193 		if (mask & (1<<i)) {
194 		    if (milan_isa_iinfo[i].ifunc == NULL) {
195 			*irq = i;
196 			return 0;
197 		    }
198 		}
199 	}
200 	return (1);
201 }
202 
203 void *
204 isa_intr_establish(ic, irq, type, level, ih_fun, ih_arg)
205 	isa_chipset_tag_t ic;
206 	int		  irq, type, level;
207 	int		  (*ih_fun) __P((void *));
208 	void		  *ih_arg;
209 {
210 	isa_intr_info_t *iinfo_p;
211 
212 	iinfo_p = &milan_isa_iinfo[irq];
213 
214 	if (iinfo_p->ifunc != NULL) {
215 		printf("isa_intr_establish: interrupt %d was already "
216 			"established\n", irq);
217 		return NULL;
218 	}
219 
220 	iinfo_p->slot  = 0;	/* Unused on Milan */
221 	iinfo_p->ihand = NULL;	/* Unused on Milan */
222 	iinfo_p->ipl   = level;
223 	iinfo_p->ifunc = ih_fun;
224 	iinfo_p->iarg  = ih_arg;
225 
226 	new_imask();
227 	return(iinfo_p);
228 }
229 
230 void
231 isa_intr_disestablish(ic, handler)
232 	isa_chipset_tag_t	ic;
233 	void			*handler;
234 {
235 	isa_intr_info_t *iinfo_p = (isa_intr_info_t *)handler;
236 
237 	if (iinfo_p->ifunc == NULL)
238 	    panic("isa_intr_disestablish: interrupt was not established");
239 
240 	iinfo_p->ifunc = NULL;
241 	new_imask();
242 }
243