1 /* $NetBSD: zs.c,v 1.76 2014/03/24 18:39:57 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * 12 * All advertising materials mentioning features or use of this software 13 * must display the following acknowledgement: 14 * This product includes software developed by the University of 15 * California, Lawrence Berkeley Laboratory. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * @(#)zs.c 8.1 (Berkeley) 7/19/93 42 */ 43 44 /*- 45 * Copyright (c) 1995 The NetBSD Foundation, Inc. (Atari modifications) 46 * All rights reserved. 47 * 48 * This code is derived from software contributed to The NetBSD Foundation 49 * by Leo Weppelman. 50 * 51 * Redistribution and use in source and binary forms, with or without 52 * modification, are permitted provided that the following conditions 53 * are met: 54 * 1. Redistributions of source code must retain the above copyright 55 * notice, this list of conditions and the following disclaimer. 56 * 2. Redistributions in binary form must reproduce the above copyright 57 * notice, this list of conditions and the following disclaimer in the 58 * documentation and/or other materials provided with the distribution. 59 * 60 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 61 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 62 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 63 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 64 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 65 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 66 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 67 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 68 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 69 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 70 * POSSIBILITY OF SUCH DAMAGE. 71 */ 72 73 /* 74 * Zilog Z8530 (ZSCC) driver. 75 * 76 * Runs two tty ports (modem2 and serial2) on zs0. 77 * 78 * This driver knows far too much about chip to usage mappings. 79 */ 80 81 #include <sys/cdefs.h> 82 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.76 2014/03/24 18:39:57 christos Exp $"); 83 84 #include <sys/param.h> 85 #include <sys/systm.h> 86 #include <sys/proc.h> 87 #include <sys/device.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/ioctl.h> 91 #include <sys/malloc.h> 92 #include <sys/tty.h> 93 #include <sys/time.h> 94 #include <sys/kernel.h> 95 #include <sys/syslog.h> 96 #include <sys/kauth.h> 97 98 #include <machine/cpu.h> 99 #include <machine/iomap.h> 100 #include <machine/scu.h> 101 #include <machine/mfp.h> 102 #include <atari/dev/ym2149reg.h> 103 104 #include <dev/ic/z8530reg.h> 105 #include <atari/dev/zsvar.h> 106 107 #include "ioconf.h" 108 109 #include "zs.h" 110 #if NZS > 1 111 #error "This driver supports only 1 85C30!" 112 #endif 113 114 #if NZS > 0 115 116 #define PCLK (8053976) /* PCLK pin input clock rate */ 117 #define PCLK_HD (9600 * 1536) /* PCLK on Hades pin input clock rate */ 118 119 #define splzs spl5 120 121 /* 122 * Software state per found chip. 123 */ 124 struct zs_softc { 125 device_t sc_dev; /* base device */ 126 struct zs_chanstate *sc_cs[2]; /* chan A and B software state */ 127 128 struct zs_chanstate sc_cs_store[2]; 129 void *sc_sicookie; /* for callback */ 130 }; 131 132 /* 133 * Define the registers for a closed port 134 */ 135 static uint8_t zs_init_regs[16] = { 136 /* 0 */ 0, 137 /* 1 */ 0, 138 /* 2 */ 0x60, 139 /* 3 */ 0, 140 /* 4 */ 0, 141 /* 5 */ 0, 142 /* 6 */ 0, 143 /* 7 */ 0, 144 /* 8 */ 0, 145 /* 9 */ ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT, 146 /* 10 */ ZSWR10_NRZ, 147 /* 11 */ ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 148 /* 12 */ 0, 149 /* 13 */ 0, 150 /* 14 */ ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA, 151 /* 15 */ 0 152 }; 153 154 /* 155 * Define the machine dependent clock frequencies 156 * If BRgen feeds sender/receiver we always use a 157 * divisor 16, therefor the division by 16 can as 158 * well be done here. 159 */ 160 static const u_long zs_freqs_tt[] = { 161 /* 162 * Atari TT, RTxCB is generated by TT-MFP timer C, 163 * which is set to 307.2 kHz during initialisation 164 * and never changed afterwards. 165 */ 166 PCLK/16, /* BRgen, PCLK, divisor 16 */ 167 229500, /* BRgen, RTxCA, divisor 16 */ 168 3672000, /* RTxCA, from PCLK4 */ 169 0, /* TRxCA, external */ 170 171 PCLK/16, /* BRgen, PCLK, divisor 16 */ 172 19200, /* BRgen, RTxCB, divisor 16 */ 173 307200, /* RTxCB, from TT-MFP TCO */ 174 2457600 /* TRxCB, from BCLK */ 175 }; 176 177 static const u_long zs_freqs_falcon[] = { 178 /* 179 * Atari Falcon, XXX no specs available, this might be wrong 180 */ 181 PCLK/16, /* BRgen, PCLK, divisor 16 */ 182 229500, /* BRgen, RTxCA, divisor 16 */ 183 3672000, /* RTxCA, ??? */ 184 0, /* TRxCA, external */ 185 186 PCLK/16, /* BRgen, PCLK, divisor 16 */ 187 229500, /* BRgen, RTxCB, divisor 16 */ 188 3672000, /* RTxCB, ??? */ 189 2457600 /* TRxCB, ??? */ 190 }; 191 192 static const u_long zs_freqs_hades[] = { 193 /* 194 * XXX: Channel-A unchecked!!!!! 195 */ 196 PCLK_HD/16, /* BRgen, PCLK, divisor 16 */ 197 229500, /* BRgen, RTxCA, divisor 16 */ 198 3672000, /* RTxCA, from PCLK4 */ 199 0, /* TRxCA, external */ 200 201 PCLK_HD/16, /* BRgen, PCLK, divisor 16 */ 202 235550, /* BRgen, RTxCB, divisor 16 */ 203 3768800, /* RTxCB, 3.7688MHz */ 204 3768800 /* TRxCB, 3.7688MHz */ 205 }; 206 207 static const u_long zs_freqs_generic[] = { 208 /* 209 * other machines, assume only PCLK is available 210 */ 211 PCLK/16, /* BRgen, PCLK, divisor 16 */ 212 0, /* BRgen, RTxCA, divisor 16 */ 213 0, /* RTxCA, unknown */ 214 0, /* TRxCA, unknown */ 215 216 PCLK/16, /* BRgen, PCLK, divisor 16 */ 217 0, /* BRgen, RTxCB, divisor 16 */ 218 0, /* RTxCB, unknown */ 219 0 /* TRxCB, unknown */ 220 }; 221 static const u_long *zs_frequencies; 222 223 /* Definition of the driver for autoconfig. */ 224 static int zsmatch(device_t, cfdata_t, void *); 225 static void zsattach(device_t, device_t, void *); 226 227 CFATTACH_DECL_NEW(zs, sizeof(struct zs_softc), 228 zsmatch, zsattach, NULL, NULL); 229 230 /* {b,c}devsw[] function prototypes */ 231 dev_type_open(zsopen); 232 dev_type_close(zsclose); 233 dev_type_read(zsread); 234 dev_type_write(zswrite); 235 dev_type_ioctl(zsioctl); 236 dev_type_stop(zsstop); 237 dev_type_tty(zstty); 238 dev_type_poll(zspoll); 239 240 const struct cdevsw zs_cdevsw = { 241 .d_open = zsopen, 242 .d_close = zsclose, 243 .d_read = zsread, 244 .d_write = zswrite, 245 .d_ioctl = zsioctl, 246 .d_stop = zsstop, 247 .d_tty = zstty, 248 .d_poll = zspoll, 249 .d_mmap = nommap, 250 .d_kqfilter = ttykqfilter, 251 .d_flag = D_TTY 252 }; 253 254 /* Interrupt handlers. */ 255 static int zshard(void *); 256 static int zssoft(void *); 257 static int zsrint(struct zs_chanstate *, struct zschan *); 258 static int zsxint(struct zs_chanstate *, struct zschan *); 259 static int zssint(struct zs_chanstate *, struct zschan *); 260 261 /* Routines called from other code. */ 262 static void zsstart(struct tty *); 263 264 /* Routines purely local to this driver. */ 265 static void zsoverrun(int, long *, const char *); 266 static int zsparam(struct tty *, struct termios *); 267 static int zsbaudrate(int, int, int *, int *, int *, int *); 268 static int zs_modem(struct zs_chanstate *, int, int); 269 static void zs_loadchannelregs(struct zschan *, uint8_t *); 270 static void zs_shutdown(struct zs_chanstate *); 271 272 static int 273 zsmatch(device_t parent, cfdata_t cf, void *aux) 274 { 275 static int zs_matched = 0; 276 277 if (strcmp("zs", aux) || zs_matched) 278 return 0; 279 zs_matched = 1; 280 return 1; 281 } 282 283 /* 284 * Attach a found zs. 285 */ 286 static void 287 zsattach(device_t parent, device_t self, void *aux) 288 { 289 struct zs_softc *sc; 290 struct zsdevice *zs; 291 struct zschan *zc; 292 struct zs_chanstate *cs; 293 int channel; 294 295 sc = device_private(self); 296 sc->sc_dev = self; 297 298 printf(": serial2 on channel a and modem2 on channel b\n"); 299 300 zs = (struct zsdevice *)AD_SCC; 301 302 for (channel = 0; channel < 2; channel++) { 303 cs = &sc->sc_cs_store[channel]; 304 sc->sc_cs[channel] = cs; 305 306 cs->cs_unit = channel; 307 cs->cs_zc = zc = 308 (channel == 0) ? &zs->zs_chan_a : &zs->zs_chan_b; 309 /* 310 * Get the command register into a known state. 311 */ 312 (void)zc->zc_csr; 313 (void)zc->zc_csr; 314 315 /* 316 * Do a hardware reset. 317 */ 318 if (channel == 0) { 319 ZS_WRITE(zc, 9, ZSWR9_HARD_RESET); 320 delay(50000); /* enough ? */ 321 ZS_WRITE(zc, 9, 0); 322 } 323 324 /* 325 * Initialize channel 326 */ 327 zs_loadchannelregs(zc, zs_init_regs); 328 } 329 330 if (machineid & ATARI_TT) { 331 /* 332 * ininitialise TT-MFP timer C: 307200Hz 333 * timer C and D share one control register: 334 * bits 0-2 control timer D 335 * bits 4-6 control timer C 336 */ 337 int cr = MFP2->mf_tcdcr & 7; 338 MFP2->mf_tcdcr = cr; /* stop timer C */ 339 MFP2->mf_tcdr = 1; /* counter 1 */ 340 cr |= T_Q004 << 4; /* divisor 4 */ 341 MFP2->mf_tcdcr = cr; /* start timer C */ 342 /* 343 * enable scc related interrupts 344 */ 345 SCU->vme_mask |= SCU_SCC; 346 347 zs_frequencies = zs_freqs_tt; 348 } else if (machineid & ATARI_FALCON) { 349 zs_frequencies = zs_freqs_falcon; 350 } else if (machineid & ATARI_HADES) { 351 zs_frequencies = zs_freqs_hades; 352 } else { 353 zs_frequencies = zs_freqs_generic; 354 } 355 356 if (intr_establish(36, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL) 357 aprint_error_dev(self, 358 "Can't establish interrupt (Rx chan B)\n"); 359 if (intr_establish(32, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL) 360 aprint_error_dev(self, 361 "Can't establish interrupt (Tx empty chan B)\n"); 362 if (intr_establish(34, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL) 363 aprint_error_dev(self, 364 "Can't establish interrupt (Ext./Status chan B)\n"); 365 if (intr_establish(38, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL) 366 aprint_error_dev(self, 367 "Can't establish interrupt (Special Rx cond. chan B)\n"); 368 if (intr_establish(44, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL) 369 aprint_error_dev(self, 370 "Can't establish interrupt (Rx chan A)\n"); 371 if (intr_establish(40, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL) 372 aprint_error_dev(self, 373 "Can't establish interrupt (Tx empty chan A)\n"); 374 if (intr_establish(42, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL) 375 aprint_error_dev(self, 376 "Can't establish interrupt (Ext./Status chan A)\n"); 377 if (intr_establish(46, USER_VEC, 0, (hw_ifun_t)zshard, sc) == NULL) 378 aprint_error_dev(self, 379 "Can't establish interrupt (Special Rx cond. chan A)\n"); 380 381 sc->sc_sicookie = softint_establish(SOFTINT_SERIAL, 382 (void (*)(void *))zssoft, sc); 383 } 384 385 /* 386 * Open a zs serial port. 387 */ 388 int 389 zsopen(dev_t dev, int flags, int mode, struct lwp *l) 390 { 391 struct tty *tp; 392 struct zs_chanstate *cs; 393 struct zs_softc *sc; 394 int unit = ZS_UNIT(dev); 395 int zs = unit >> 1; 396 int error, s; 397 398 sc = device_lookup_private(&zs_cd, zs); 399 if (sc == NULL) 400 return ENXIO; 401 cs = sc->sc_cs[unit & 1]; 402 403 /* 404 * When port A (ser02) is selected on the TT, make sure 405 * the port is enabled. 406 */ 407 if ((machineid & ATARI_TT) && !(unit & 1)) 408 ym2149_ser2(1); 409 410 if (cs->cs_rbuf == NULL) { 411 cs->cs_rbuf = malloc(ZLRB_RING_SIZE * sizeof(int), M_DEVBUF, 412 M_WAITOK); 413 } 414 415 tp = cs->cs_ttyp; 416 if (tp == NULL) { 417 cs->cs_ttyp = tp = tty_alloc(); 418 tty_attach(tp); 419 tp->t_dev = dev; 420 tp->t_oproc = zsstart; 421 tp->t_param = zsparam; 422 } 423 424 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 425 return EBUSY; 426 427 s = spltty(); 428 429 /* 430 * Do the following iff this is a first open. 431 */ 432 if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) { 433 if (tp->t_ispeed == 0) { 434 tp->t_iflag = TTYDEF_IFLAG; 435 tp->t_oflag = TTYDEF_OFLAG; 436 tp->t_cflag = TTYDEF_CFLAG; 437 tp->t_lflag = TTYDEF_LFLAG; 438 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 439 } 440 ttychars(tp); 441 ttsetwater(tp); 442 443 (void)zsparam(tp, &tp->t_termios); 444 445 /* 446 * Turn on DTR. We must always do this, even if carrier is not 447 * present, because otherwise we'd have to use TIOCSDTR 448 * immediately after setting CLOCAL, which applications do not 449 * expect. We always assert DTR while the device is open 450 * unless explicitly requested to deassert it. 451 */ 452 zs_modem(cs, ZSWR5_RTS|ZSWR5_DTR, DMSET); 453 /* May never get a status intr. if DCD already on. -gwr */ 454 if (((cs->cs_rr0 = cs->cs_zc->zc_csr) & ZSRR0_DCD) != 0) 455 tp->t_state |= TS_CARR_ON; 456 if (cs->cs_softcar) 457 tp->t_state |= TS_CARR_ON; 458 } 459 460 splx(s); 461 462 error = ttyopen(tp, ZS_DIALOUT(dev), (flags & O_NONBLOCK)); 463 if (error) 464 goto bad; 465 466 error = tp->t_linesw->l_open(dev, tp); 467 if (error) 468 goto bad; 469 return 0; 470 471 bad: 472 if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) { 473 /* 474 * We failed to open the device, and nobody else had it opened. 475 * Clean up the state as appropriate. 476 */ 477 zs_shutdown(cs); 478 } 479 return error; 480 } 481 482 /* 483 * Close a zs serial port. 484 */ 485 int 486 zsclose(dev_t dev, int flags, int mode, struct lwp *l) 487 { 488 struct zs_chanstate *cs; 489 struct tty *tp; 490 struct zs_softc *sc; 491 int unit = ZS_UNIT(dev); 492 493 sc = device_lookup_private(&zs_cd, unit >> 1); 494 cs = sc->sc_cs[unit & 1]; 495 tp = cs->cs_ttyp; 496 497 tp->t_linesw->l_close(tp, flags); 498 ttyclose(tp); 499 500 if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) { 501 /* 502 * Although we got a last close, the device may still be in 503 * use; e.g. if this was the dialout node, and there are still 504 * processes waiting for carrier on the non-dialout node. 505 */ 506 zs_shutdown(cs); 507 } 508 return 0; 509 } 510 511 /* 512 * Read/write zs serial port. 513 */ 514 int 515 zsread(dev_t dev, struct uio *uio, int flags) 516 { 517 struct zs_chanstate *cs; 518 struct zs_softc *sc; 519 struct tty *tp; 520 int unit; 521 522 unit = ZS_UNIT(dev); 523 sc = device_lookup_private(&zs_cd, unit >> 1); 524 cs = sc->sc_cs[unit & 1]; 525 tp = cs->cs_ttyp; 526 527 return (*tp->t_linesw->l_read)(tp, uio, flags); 528 } 529 530 int 531 zswrite(dev_t dev, struct uio *uio, int flags) 532 { 533 struct zs_chanstate *cs; 534 struct zs_softc *sc; 535 struct tty *tp; 536 int unit; 537 538 unit = ZS_UNIT(dev); 539 sc = device_lookup_private(&zs_cd, unit >> 1); 540 cs = sc->sc_cs[unit & 1]; 541 tp = cs->cs_ttyp; 542 543 return (*tp->t_linesw->l_write)(tp, uio, flags); 544 } 545 546 int 547 zspoll(dev_t dev, int events, struct lwp *l) 548 { 549 struct zs_chanstate *cs; 550 struct zs_softc *sc; 551 struct tty *tp; 552 int unit; 553 554 unit = ZS_UNIT(dev); 555 sc = device_lookup_private(&zs_cd, unit >> 1); 556 cs = sc->sc_cs[unit & 1]; 557 tp = cs->cs_ttyp; 558 559 return (*tp->t_linesw->l_poll)(tp, events, l); 560 } 561 562 struct tty * 563 zstty(dev_t dev) 564 { 565 struct zs_chanstate *cs; 566 struct zs_softc *sc; 567 int unit; 568 569 unit = ZS_UNIT(dev); 570 sc = device_lookup_private(&zs_cd, unit >> 1); 571 cs = sc->sc_cs[unit & 1]; 572 return cs->cs_ttyp; 573 } 574 575 /* 576 * ZS hardware interrupt. Scan all ZS channels. NB: we know here that 577 * channels are kept in (A,B) pairs. 578 * 579 * Do just a little, then get out; set a software interrupt if more 580 * work is needed. 581 * 582 * We deliberately ignore the vectoring Zilog gives us, and match up 583 * only the number of `reset interrupt under service' operations, not 584 * the order. 585 */ 586 587 int 588 zshard(void *arg) 589 { 590 struct zs_softc *sc; 591 struct zs_chanstate *cs0, *cs1; 592 struct zschan *zc; 593 int intflags, v, i; 594 uint8_t rr3; 595 596 sc = arg; 597 intflags = 0; 598 cs0 = sc->sc_cs[0]; 599 cs1 = sc->sc_cs[1]; 600 601 do { 602 intflags &= ~4; 603 rr3 = ZS_READ(cs0->cs_zc, 3); 604 if (rr3 & (ZSRR3_IP_A_RX | ZSRR3_IP_A_TX | ZSRR3_IP_A_STAT)) { 605 intflags |= 4 | 2; 606 zc = cs0->cs_zc; 607 i = cs0->cs_rbput; 608 if ((rr3 & ZSRR3_IP_A_RX) != 0 && 609 (v = zsrint(cs0, zc)) != 0) { 610 cs0->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 611 intflags |= 1; 612 } 613 if ((rr3 & ZSRR3_IP_A_TX) != 0 && 614 (v = zsxint(cs0, zc)) != 0) { 615 cs0->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 616 intflags |= 1; 617 } 618 if ((rr3 & ZSRR3_IP_A_STAT) != 0 && 619 (v = zssint(cs0, zc)) != 0) { 620 cs0->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 621 intflags |= 1; 622 } 623 cs0->cs_rbput = i; 624 } 625 if (rr3 & (ZSRR3_IP_B_RX | ZSRR3_IP_B_TX | ZSRR3_IP_B_STAT)) { 626 intflags |= 4 | 2; 627 zc = cs1->cs_zc; 628 i = cs1->cs_rbput; 629 if ((rr3 & ZSRR3_IP_B_RX) != 0 && 630 (v = zsrint(cs1, zc)) != 0) { 631 cs1->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 632 intflags |= 1; 633 } 634 if ((rr3 & ZSRR3_IP_B_TX) != 0 && 635 (v = zsxint(cs1, zc)) != 0) { 636 cs1->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 637 intflags |= 1; 638 } 639 if ((rr3 & ZSRR3_IP_B_STAT) != 0 && 640 (v = zssint(cs1, zc)) != 0) { 641 cs1->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 642 intflags |= 1; 643 } 644 cs1->cs_rbput = i; 645 } 646 } while (intflags & 4); 647 648 if (intflags & 1) 649 softint_schedule(sc->sc_sicookie); 650 651 return intflags & 2; 652 } 653 654 static int 655 zsrint(struct zs_chanstate *cs, struct zschan *zc) 656 { 657 int c; 658 659 /* 660 * First read the status, because read of the received char 661 * destroy the status of this char. 662 */ 663 c = ZS_READ(zc, 1); 664 c |= (zc->zc_data << 8); 665 666 /* clear receive error & interrupt condition */ 667 zc->zc_csr = ZSWR0_RESET_ERRORS; 668 zc->zc_csr = ZSWR0_CLR_INTR; 669 670 return ZRING_MAKE(ZRING_RINT, c); 671 } 672 673 static int 674 zsxint(struct zs_chanstate *cs, struct zschan *zc) 675 { 676 int i = cs->cs_tbc; 677 678 if (i == 0) { 679 zc->zc_csr = ZSWR0_RESET_TXINT; 680 zc->zc_csr = ZSWR0_CLR_INTR; 681 return ZRING_MAKE(ZRING_XINT, 0); 682 } 683 cs->cs_tbc = i - 1; 684 zc->zc_data = *cs->cs_tba++; 685 zc->zc_csr = ZSWR0_CLR_INTR; 686 return 0; 687 } 688 689 static int 690 zssint(struct zs_chanstate *cs, struct zschan *zc) 691 { 692 int rr0; 693 694 rr0 = zc->zc_csr; 695 zc->zc_csr = ZSWR0_RESET_STATUS; 696 zc->zc_csr = ZSWR0_CLR_INTR; 697 /* 698 * The chip's hardware flow control is, as noted in zsreg.h, 699 * busted---if the DCD line goes low the chip shuts off the 700 * receiver (!). If we want hardware CTS flow control but do 701 * not have it, and carrier is now on, turn HFC on; if we have 702 * HFC now but carrier has gone low, turn it off. 703 */ 704 if (rr0 & ZSRR0_DCD) { 705 if (cs->cs_ttyp->t_cflag & CCTS_OFLOW && 706 (cs->cs_creg[3] & ZSWR3_HFC) == 0) { 707 cs->cs_creg[3] |= ZSWR3_HFC; 708 ZS_WRITE(zc, 3, cs->cs_creg[3]); 709 } 710 } else { 711 if (cs->cs_creg[3] & ZSWR3_HFC) { 712 cs->cs_creg[3] &= ~ZSWR3_HFC; 713 ZS_WRITE(zc, 3, cs->cs_creg[3]); 714 } 715 } 716 return ZRING_MAKE(ZRING_SINT, rr0); 717 } 718 719 /* 720 * Print out a ring or fifo overrun error message. 721 */ 722 static void 723 zsoverrun(int unit, long *ptime, const char *what) 724 { 725 time_t cur_sec = time_second; 726 727 if (*ptime != cur_sec) { 728 *ptime = cur_sec; 729 log(LOG_WARNING, "zs%d%c: %s overrun\n", unit >> 1, 730 (unit & 1) + 'a', what); 731 } 732 } 733 734 /* 735 * ZS software interrupt. Scan all channels for deferred interrupts. 736 */ 737 int 738 zssoft(void *arg) 739 { 740 struct zs_softc *sc; 741 struct zs_chanstate *cs; 742 struct zschan *zc; 743 struct linesw *line; 744 struct tty *tp; 745 int chan, get, n, c, cc, s; 746 int retval = 0; 747 748 sc = arg; 749 s = spltty(); 750 for (chan = 0; chan < 2; chan++) { 751 cs = sc->sc_cs[chan]; 752 get = cs->cs_rbget; 753 again: 754 n = cs->cs_rbput; /* atomic */ 755 if (get == n) /* nothing more on this line */ 756 continue; 757 retval = 1; 758 zc = cs->cs_zc; 759 tp = cs->cs_ttyp; 760 line = tp->t_linesw; 761 /* 762 * Compute the number of interrupts in the receive ring. 763 * If the count is overlarge, we lost some events, and 764 * must advance to the first valid one. It may get 765 * overwritten if more data are arriving, but this is 766 * too expensive to check and gains nothing (we already 767 * lost out; all we can do at this point is trade one 768 * kind of loss for another). 769 */ 770 n -= get; 771 if (n > ZLRB_RING_SIZE) { 772 zsoverrun(chan, &cs->cs_rotime, "ring"); 773 get += n - ZLRB_RING_SIZE; 774 n = ZLRB_RING_SIZE; 775 } 776 while (--n >= 0) { 777 /* race to keep ahead of incoming interrupts */ 778 c = cs->cs_rbuf[get++ & ZLRB_RING_MASK]; 779 switch (ZRING_TYPE(c)) { 780 781 case ZRING_RINT: 782 c = ZRING_VALUE(c); 783 if ((c & ZSRR1_DO) != 0) 784 zsoverrun(chan, &cs->cs_fotime, "fifo"); 785 cc = c >> 8; 786 if ((c & ZSRR1_FE) != 0) 787 cc |= TTY_FE; 788 if ((c & ZSRR1_PE) != 0) 789 cc |= TTY_PE; 790 line->l_rint(cc, tp); 791 break; 792 793 case ZRING_XINT: 794 /* 795 * Transmit done: change registers and resume, 796 * or clear BUSY. 797 */ 798 if (cs->cs_heldchange) { 799 int sps; 800 801 sps = splzs(); 802 c = zc->zc_csr; 803 if ((c & ZSRR0_DCD) == 0) 804 cs->cs_preg[3] &= ~ZSWR3_HFC; 805 memcpy((void *)cs->cs_creg, 806 (void *)cs->cs_preg, 16); 807 zs_loadchannelregs(zc, cs->cs_creg); 808 splx(sps); 809 cs->cs_heldchange = 0; 810 if (cs->cs_heldtbc && 811 (tp->t_state & TS_TTSTOP) == 0) { 812 cs->cs_tbc = cs->cs_heldtbc - 1; 813 zc->zc_data = *cs->cs_tba++; 814 goto again; 815 } 816 } 817 tp->t_state &= ~TS_BUSY; 818 if ((tp->t_state & TS_FLUSH) != 0) 819 tp->t_state &= ~TS_FLUSH; 820 else 821 ndflush(&tp->t_outq, 822 cs->cs_tba - tp->t_outq.c_cf); 823 line->l_start(tp); 824 break; 825 826 case ZRING_SINT: 827 /* 828 * Status line change. HFC bit is run in 829 * hardware interrupt, to avoid locking 830 * at splzs here. 831 */ 832 c = ZRING_VALUE(c); 833 if (((c ^ cs->cs_rr0) & ZSRR0_DCD) != 0) { 834 cc = (c & ZSRR0_DCD) != 0; 835 if (line->l_modem(tp, cc) == 0) 836 zs_modem(cs, 837 ZSWR5_RTS | ZSWR5_DTR, 838 cc ? DMBIS : DMBIC); 839 } 840 cs->cs_rr0 = c; 841 break; 842 843 default: 844 log(LOG_ERR, "zs%d%c: bad ZRING_TYPE (%x)\n", 845 chan >> 1, (chan & 1) + 'a', c); 846 break; 847 } 848 } 849 cs->cs_rbget = get; 850 goto again; 851 } 852 splx(s); 853 return retval; 854 } 855 856 int 857 zsioctl(dev_t dev, u_long cmd, void * data, int flag, struct lwp *l) 858 { 859 int unit = ZS_UNIT(dev); 860 struct zs_softc *sc = device_lookup_private(&zs_cd, unit >> 1); 861 struct zs_chanstate *cs = sc->sc_cs[unit & 1]; 862 struct tty *tp = cs->cs_ttyp; 863 int error, s; 864 865 error = tp->t_linesw->l_ioctl(tp, cmd, data, flag, l); 866 if (error != EPASSTHROUGH) 867 return error; 868 869 error = ttioctl(tp, cmd, data, flag, l); 870 if (error !=EPASSTHROUGH) 871 return error; 872 873 switch (cmd) { 874 case TIOCSBRK: 875 s = splzs(); 876 cs->cs_preg[5] |= ZSWR5_BREAK; 877 cs->cs_creg[5] |= ZSWR5_BREAK; 878 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]); 879 splx(s); 880 break; 881 case TIOCCBRK: 882 s = splzs(); 883 cs->cs_preg[5] &= ~ZSWR5_BREAK; 884 cs->cs_creg[5] &= ~ZSWR5_BREAK; 885 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]); 886 splx(s); 887 break; 888 case TIOCGFLAGS: { 889 int bits = 0; 890 891 if (cs->cs_softcar) 892 bits |= TIOCFLAG_SOFTCAR; 893 if ((cs->cs_creg[15] & ZSWR15_DCD_IE) != 0) 894 bits |= TIOCFLAG_CLOCAL; 895 if ((cs->cs_creg[3] & ZSWR3_HFC) != 0) 896 bits |= TIOCFLAG_CRTSCTS; 897 *(int *)data = bits; 898 break; 899 } 900 case TIOCSFLAGS: { 901 int userbits = 0; 902 903 error = kauth_authorize_device_tty(l->l_cred, 904 KAUTH_DEVICE_TTY_PRIVSET, tp); 905 if (error != 0) 906 return EPERM; 907 908 userbits = *(int *)data; 909 910 /* 911 * can have `local' or `softcar', and `rtscts' or `mdmbuf' 912 # defaulting to software flow control. 913 */ 914 if ((userbits & TIOCFLAG_SOFTCAR) != 0 && 915 (userbits & TIOCFLAG_CLOCAL) != 0) 916 return EINVAL; 917 if ((userbits & TIOCFLAG_MDMBUF) != 0) 918 /* don't support this (yet?) */ 919 return ENODEV; 920 921 s = splzs(); 922 if ((userbits & TIOCFLAG_SOFTCAR) != 0) { 923 cs->cs_softcar = 1; /* turn on softcar */ 924 cs->cs_preg[15] &= ~ZSWR15_DCD_IE; /* turn off dcd */ 925 cs->cs_creg[15] &= ~ZSWR15_DCD_IE; 926 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]); 927 } else if ((userbits & TIOCFLAG_CLOCAL) != 0) { 928 cs->cs_softcar = 0; /* turn off softcar */ 929 cs->cs_preg[15] |= ZSWR15_DCD_IE; /* turn on dcd */ 930 cs->cs_creg[15] |= ZSWR15_DCD_IE; 931 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]); 932 tp->t_termios.c_cflag |= CLOCAL; 933 } 934 if ((userbits & TIOCFLAG_CRTSCTS) != 0) { 935 cs->cs_preg[15] |= ZSWR15_CTS_IE; 936 cs->cs_creg[15] |= ZSWR15_CTS_IE; 937 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]); 938 cs->cs_preg[3] |= ZSWR3_HFC; 939 cs->cs_creg[3] |= ZSWR3_HFC; 940 ZS_WRITE(cs->cs_zc, 3, cs->cs_creg[3]); 941 tp->t_termios.c_cflag |= CRTSCTS; 942 } else { 943 /* no mdmbuf, so we must want software flow control */ 944 cs->cs_preg[15] &= ~ZSWR15_CTS_IE; 945 cs->cs_creg[15] &= ~ZSWR15_CTS_IE; 946 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]); 947 cs->cs_preg[3] &= ~ZSWR3_HFC; 948 cs->cs_creg[3] &= ~ZSWR3_HFC; 949 ZS_WRITE(cs->cs_zc, 3, cs->cs_creg[3]); 950 tp->t_termios.c_cflag &= ~CRTSCTS; 951 } 952 splx(s); 953 break; 954 } 955 case TIOCSDTR: 956 zs_modem(cs, ZSWR5_DTR, DMBIS); 957 break; 958 case TIOCCDTR: 959 zs_modem(cs, ZSWR5_DTR, DMBIC); 960 break; 961 case TIOCMGET: 962 zs_modem(cs, 0, DMGET); 963 break; 964 case TIOCMSET: 965 case TIOCMBIS: 966 case TIOCMBIC: 967 default: 968 return EPASSTHROUGH; 969 } 970 return 0; 971 } 972 973 /* 974 * Start or restart transmission. 975 */ 976 static void 977 zsstart(struct tty *tp) 978 { 979 struct zs_chanstate *cs; 980 int s, nch; 981 int unit = ZS_UNIT(tp->t_dev); 982 struct zs_softc *sc = device_lookup_private(&zs_cd, unit >> 1); 983 984 cs = sc->sc_cs[unit & 1]; 985 s = spltty(); 986 987 /* 988 * If currently active or delaying, no need to do anything. 989 */ 990 if ((tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP)) != 0) 991 goto out; 992 993 /* 994 * If there are sleepers, and output has drained below low 995 * water mark, awaken. 996 */ 997 ttypull(tp); 998 999 nch = ndqb(&tp->t_outq, 0); /* XXX */ 1000 if (nch) { 1001 char *p = tp->t_outq.c_cf; 1002 1003 /* mark busy, enable tx done interrupts, & send first byte */ 1004 tp->t_state |= TS_BUSY; 1005 (void)splzs(); 1006 cs->cs_preg[1] |= ZSWR1_TIE; 1007 cs->cs_creg[1] |= ZSWR1_TIE; 1008 ZS_WRITE(cs->cs_zc, 1, cs->cs_creg[1]); 1009 cs->cs_zc->zc_data = *p; 1010 cs->cs_tba = p + 1; 1011 cs->cs_tbc = nch - 1; 1012 } else { 1013 /* 1014 * Nothing to send, turn off transmit done interrupts. 1015 * This is useful if something is doing polled output. 1016 */ 1017 (void)splzs(); 1018 cs->cs_preg[1] &= ~ZSWR1_TIE; 1019 cs->cs_creg[1] &= ~ZSWR1_TIE; 1020 ZS_WRITE(cs->cs_zc, 1, cs->cs_creg[1]); 1021 } 1022 out: 1023 splx(s); 1024 } 1025 1026 /* 1027 * Stop output, e.g., for ^S or output flush. 1028 */ 1029 void 1030 zsstop(struct tty *tp, int flag) 1031 { 1032 struct zs_chanstate *cs; 1033 int s, unit = ZS_UNIT(tp->t_dev); 1034 struct zs_softc *sc = device_lookup_private(&zs_cd, unit >> 1); 1035 1036 cs = sc->sc_cs[unit & 1]; 1037 s = splzs(); 1038 if ((tp->t_state & TS_BUSY) != 0) { 1039 /* 1040 * Device is transmitting; must stop it. 1041 */ 1042 cs->cs_tbc = 0; 1043 if ((tp->t_state & TS_TTSTOP) == 0) 1044 tp->t_state |= TS_FLUSH; 1045 } 1046 splx(s); 1047 } 1048 1049 static void 1050 zs_shutdown(struct zs_chanstate *cs) 1051 { 1052 struct tty *tp = cs->cs_ttyp; 1053 int s; 1054 1055 s = splzs(); 1056 1057 /* 1058 * Hang up if necessary. Wait a bit, so the other side has time to 1059 * notice even if we immediately open the port again. 1060 */ 1061 if ((tp->t_cflag & HUPCL) != 0) { 1062 zs_modem(cs, 0, DMSET); 1063 (void)tsleep((void *)cs, TTIPRI, ttclos, hz); 1064 } 1065 1066 /* Clear any break condition set with TIOCSBRK. */ 1067 if ((cs->cs_creg[5] & ZSWR5_BREAK) != 0) { 1068 cs->cs_preg[5] &= ~ZSWR5_BREAK; 1069 cs->cs_creg[5] &= ~ZSWR5_BREAK; 1070 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]); 1071 } 1072 1073 /* 1074 * Drop all lines and cancel interrupts 1075 */ 1076 zs_loadchannelregs(cs->cs_zc, zs_init_regs); 1077 splx(s); 1078 } 1079 1080 /* 1081 * Set ZS tty parameters from termios. 1082 * 1083 * This routine makes use of the fact that only registers 1084 * 1, 3, 4, 5, 9, 10, 11, 12, 13, 14, and 15 are written. 1085 */ 1086 static int 1087 zsparam(struct tty *tp, struct termios *t) 1088 { 1089 int unit = ZS_UNIT(tp->t_dev); 1090 struct zs_softc *sc = device_lookup_private(&zs_cd, unit >> 1); 1091 struct zs_chanstate *cs = sc->sc_cs[unit & 1]; 1092 int cdiv = 0; /* XXX gcc4 -Wuninitialized */ 1093 int clkm = 0; /* XXX gcc4 -Wuninitialized */ 1094 int brgm = 0; /* XXX gcc4 -Wuninitialized */ 1095 int tcon = 0; /* XXX gcc4 -Wuninitialized */ 1096 int tmp, tmp5, cflag, s; 1097 1098 tmp = t->c_ospeed; 1099 tmp5 = t->c_ispeed; 1100 if (tmp < 0 || (tmp5 && tmp5 != tmp)) 1101 return EINVAL; 1102 if (tmp == 0) { 1103 /* stty 0 => drop DTR and RTS */ 1104 zs_modem(cs, 0, DMSET); 1105 return 0; 1106 } 1107 tmp = zsbaudrate(unit, tmp, &cdiv, &clkm, &brgm, &tcon); 1108 if (tmp < 0) 1109 return EINVAL; 1110 tp->t_ispeed = tp->t_ospeed = tmp; 1111 1112 cflag = tp->t_cflag = t->c_cflag; 1113 if ((cflag & CSTOPB) != 0) 1114 cdiv |= ZSWR4_TWOSB; 1115 else 1116 cdiv |= ZSWR4_ONESB; 1117 if ((cflag & PARODD) == 0) 1118 cdiv |= ZSWR4_EVENP; 1119 if ((cflag & PARENB) != 0) 1120 cdiv |= ZSWR4_PARENB; 1121 1122 switch (cflag & CSIZE) { 1123 case CS5: 1124 tmp = ZSWR3_RX_5; 1125 tmp5 = ZSWR5_TX_5; 1126 break; 1127 case CS6: 1128 tmp = ZSWR3_RX_6; 1129 tmp5 = ZSWR5_TX_6; 1130 break; 1131 case CS7: 1132 tmp = ZSWR3_RX_7; 1133 tmp5 = ZSWR5_TX_7; 1134 break; 1135 case CS8: 1136 default: 1137 tmp = ZSWR3_RX_8; 1138 tmp5 = ZSWR5_TX_8; 1139 break; 1140 } 1141 tmp |= ZSWR3_RX_ENABLE; 1142 tmp5 |= ZSWR5_TX_ENABLE | ZSWR5_DTR | ZSWR5_RTS; 1143 1144 /* 1145 * Block interrupts so that state will not 1146 * be altered until we are done setting it up. 1147 */ 1148 s = splzs(); 1149 cs->cs_preg[4] = cdiv; 1150 cs->cs_preg[11] = clkm; 1151 cs->cs_preg[12] = tcon; 1152 cs->cs_preg[13] = tcon >> 8; 1153 cs->cs_preg[14] = brgm; 1154 cs->cs_preg[1] = ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE; 1155 cs->cs_preg[9] = ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT; 1156 cs->cs_preg[10] = ZSWR10_NRZ; 1157 cs->cs_preg[15] = ZSWR15_BREAK_IE | ZSWR15_DCD_IE; 1158 1159 /* 1160 * Output hardware flow control on the chip is horrendous: if 1161 * carrier detect drops, the receiver is disabled. Hence we 1162 * can only do this when the carrier is on. 1163 */ 1164 if ((cflag & CCTS_OFLOW) != 0 && 1165 (cs->cs_zc->zc_csr & ZSRR0_DCD) != 0) 1166 tmp |= ZSWR3_HFC; 1167 cs->cs_preg[3] = tmp; 1168 cs->cs_preg[5] = tmp5; 1169 1170 /* 1171 * If nothing is being transmitted, set up new current values, 1172 * else mark them as pending. 1173 */ 1174 if (cs->cs_heldchange == 0) { 1175 if ((cs->cs_ttyp->t_state & TS_BUSY) != 0) { 1176 cs->cs_heldtbc = cs->cs_tbc; 1177 cs->cs_tbc = 0; 1178 cs->cs_heldchange = 1; 1179 } else { 1180 memcpy((void *)cs->cs_creg, (void *)cs->cs_preg, 16); 1181 zs_loadchannelregs(cs->cs_zc, cs->cs_creg); 1182 } 1183 } 1184 splx(s); 1185 return 0; 1186 } 1187 1188 /* 1189 * search for the best matching baudrate 1190 */ 1191 static int 1192 zsbaudrate(int unit, int wanted, int *divisor, int *clockmode, int *brgenmode, 1193 int *timeconst) 1194 { 1195 int bestdiff, bestbps, source; 1196 1197 bestdiff = bestbps = 0; 1198 unit = (unit & 1) << 2; 1199 for (source = 0; source < 4; ++source) { 1200 u_long freq = zs_frequencies[unit + source]; 1201 int diff, bps, div, clkm, brgm, tcon; 1202 1203 bps = div = clkm = brgm = tcon = 0; 1204 switch (source) { 1205 case 0: /* BRgen, PCLK */ 1206 brgm = ZSWR14_BAUD_ENA|ZSWR14_BAUD_FROM_PCLK; 1207 break; 1208 case 1: /* BRgen, RTxC */ 1209 brgm = ZSWR14_BAUD_ENA; 1210 break; 1211 case 2: /* RTxC */ 1212 clkm = ZSWR11_RXCLK_RTXC|ZSWR11_TXCLK_RTXC; 1213 break; 1214 case 3: /* TRxC */ 1215 clkm = ZSWR11_RXCLK_TRXC|ZSWR11_TXCLK_TRXC; 1216 break; 1217 } 1218 switch (source) { 1219 case 0: 1220 case 1: 1221 div = ZSWR4_CLK_X16; 1222 clkm = ZSWR11_RXCLK_BAUD|ZSWR11_TXCLK_BAUD; 1223 tcon = BPS_TO_TCONST(freq, wanted); 1224 if (tcon < 0) 1225 tcon = 0; 1226 bps = TCONST_TO_BPS(freq, tcon); 1227 break; 1228 case 2: 1229 case 3: 1230 { 1231 int b1 = freq / 16, d1 = abs(b1 - wanted); 1232 int b2 = freq / 32, d2 = abs(b2 - wanted); 1233 int b3 = freq / 64, d3 = abs(b3 - wanted); 1234 1235 if (d1 < d2 && d1 < d3) { 1236 div = ZSWR4_CLK_X16; 1237 bps = b1; 1238 } else if (d2 < d3 && d2 < d1) { 1239 div = ZSWR4_CLK_X32; 1240 bps = b2; 1241 } else { 1242 div = ZSWR4_CLK_X64; 1243 bps = b3; 1244 } 1245 brgm = tcon = 0; 1246 break; 1247 } 1248 } 1249 diff = abs(bps - wanted); 1250 if (!source || diff < bestdiff) { 1251 *divisor = div; 1252 *clockmode = clkm; 1253 *brgenmode = brgm; 1254 *timeconst = tcon; 1255 bestbps = bps; 1256 bestdiff = diff; 1257 if (diff == 0) 1258 break; 1259 } 1260 } 1261 /* Allow deviations upto 5% */ 1262 if (20 * bestdiff > wanted) 1263 return -1; 1264 return bestbps; 1265 } 1266 1267 /* 1268 * Raise or lower modem control (DTR/RTS) signals. If a character is 1269 * in transmission, the change is deferred. 1270 */ 1271 static int 1272 zs_modem(struct zs_chanstate *cs, int bits, int how) 1273 { 1274 int s, mbits; 1275 1276 bits &= ZSWR5_DTR | ZSWR5_RTS; 1277 1278 s = splzs(); 1279 mbits = cs->cs_preg[5] & (ZSWR5_DTR | ZSWR5_RTS); 1280 1281 switch (how) { 1282 case DMSET: 1283 mbits = bits; 1284 break; 1285 case DMBIS: 1286 mbits |= bits; 1287 break; 1288 case DMBIC: 1289 mbits &= ~bits; 1290 break; 1291 case DMGET: 1292 splx(s); 1293 return mbits; 1294 } 1295 1296 cs->cs_preg[5] = (cs->cs_preg[5] & ~(ZSWR5_DTR | ZSWR5_RTS)) | mbits; 1297 if (cs->cs_heldchange == 0) { 1298 if ((cs->cs_ttyp->t_state & TS_BUSY) != 0) { 1299 cs->cs_heldtbc = cs->cs_tbc; 1300 cs->cs_tbc = 0; 1301 cs->cs_heldchange = 1; 1302 } else { 1303 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]); 1304 } 1305 } 1306 splx(s); 1307 return 0; 1308 } 1309 1310 /* 1311 * Write the given register set to the given zs channel in the proper order. 1312 * The channel must not be transmitting at the time. The receiver will 1313 * be disabled for the time it takes to write all the registers. 1314 */ 1315 static void 1316 zs_loadchannelregs(struct zschan *zc, uint8_t *reg) 1317 { 1318 int i; 1319 1320 zc->zc_csr = ZSM_RESET_ERR; /* reset error condition */ 1321 i = zc->zc_data; /* drain fifo */ 1322 i = zc->zc_data; 1323 i = zc->zc_data; 1324 ZS_WRITE(zc, 4, reg[4]); 1325 ZS_WRITE(zc, 10, reg[10]); 1326 ZS_WRITE(zc, 3, reg[3] & ~ZSWR3_RX_ENABLE); 1327 ZS_WRITE(zc, 5, reg[5] & ~ZSWR5_TX_ENABLE); 1328 ZS_WRITE(zc, 1, reg[1]); 1329 ZS_WRITE(zc, 9, reg[9]); 1330 ZS_WRITE(zc, 11, reg[11]); 1331 ZS_WRITE(zc, 12, reg[12]); 1332 ZS_WRITE(zc, 13, reg[13]); 1333 ZS_WRITE(zc, 14, reg[14]); 1334 ZS_WRITE(zc, 15, reg[15]); 1335 ZS_WRITE(zc, 3, reg[3]); 1336 ZS_WRITE(zc, 5, reg[5]); 1337 __USE(i); 1338 } 1339 #endif /* NZS > 1 */ 1340