1 /* $NetBSD: atari_init.c,v 1.65 2005/12/24 22:45:34 perry Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Leo Weppelman 5 * Copyright (c) 1994 Michael L. Hitch 6 * Copyright (c) 1993 Markus Wild 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Markus Wild. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.65 2005/12/24 22:45:34 perry Exp $"); 37 38 #include "opt_ddb.h" 39 #include "opt_mbtype.h" 40 #include "opt_m060sp.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/proc.h> 45 #include <sys/user.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/proc.h> 50 #include <sys/buf.h> 51 #include <sys/msgbuf.h> 52 #include <sys/mbuf.h> 53 #include <sys/extent.h> 54 #include <sys/protosw.h> 55 #include <sys/domain.h> 56 #include <sys/dkbad.h> 57 #include <sys/reboot.h> 58 #include <sys/exec.h> 59 #include <sys/core.h> 60 #include <sys/kcore.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <machine/vmparam.h> 65 #include <machine/pte.h> 66 #include <machine/cpu.h> 67 #include <machine/iomap.h> 68 #include <machine/mfp.h> 69 #include <machine/scu.h> 70 #include <machine/acia.h> 71 #include <machine/kcore.h> 72 73 #include <m68k/cpu.h> 74 #include <m68k/cacheops.h> 75 76 #include <atari/atari/intr.h> 77 #include <atari/atari/stalloc.h> 78 #include <atari/dev/ym2149reg.h> 79 80 #include "pci.h" 81 82 void start_c __P((int, u_int, u_int, u_int, char *)); 83 static void atari_hwinit __P((void)); 84 static void cpu_init_kcorehdr __P((u_long)); 85 static void initcpu __P((void)); 86 static void mmu030_setup __P((st_entry_t *, u_int, pt_entry_t *, u_int, 87 pt_entry_t *, u_int, u_int)); 88 static void map_io_areas __P((pt_entry_t *, u_int, u_int)); 89 static void set_machtype __P((void)); 90 91 #if defined(M68040) || defined(M68060) 92 static void mmu040_setup __P((st_entry_t *, u_int, pt_entry_t *, u_int, 93 pt_entry_t *, u_int, u_int)); 94 #endif 95 96 /* 97 * Extent maps to manage all memory space, including I/O ranges. Allocate 98 * storage for 8 regions in each, initially. Later, iomem_malloc_safe 99 * will indicate that it's safe to use malloc() to dynamically allocate 100 * region descriptors. 101 * This means that the fixed static storage is only used for registrating 102 * the found memory regions and the bus-mapping of the console. 103 * 104 * The extent maps are not static! They are used for bus address space 105 * allocation. 106 */ 107 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 108 struct extent *iomem_ex; 109 int iomem_malloc_safe; 110 111 /* 112 * All info needed to generate a panic dump. All fields are setup by 113 * start_c(). 114 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap 115 * here.... Also, the name is badly choosen. Phys_segs contains the 116 * segment descriptions _after_ reservations are made. 117 * XXX: 'lowram' is obsoleted by the new panicdump format 118 */ 119 static cpu_kcore_hdr_t cpu_kcore_hdr; 120 121 extern u_int lowram; 122 extern u_int Sysptsize, Sysseg_pa, proc0paddr; 123 extern pt_entry_t *Sysptmap; 124 extern st_entry_t *Sysseg; 125 u_int *Sysmap; 126 int machineid, mmutype, cputype, astpending; 127 char *vmmap; 128 pv_entry_t pv_table; 129 #if defined(M68040) || defined(M68060) 130 extern int protostfree; 131 #endif 132 133 extern char *esym; 134 extern struct pcb *curpcb; 135 136 /* 137 * This is the virtual address of physical page 0. Used by 'do_boot()'. 138 */ 139 vaddr_t page_zero; 140 141 /* 142 * Crude support for allocation in ST-ram. Currently only used to allocate 143 * video ram. 144 * The physical address is also returned because the video init needs it to 145 * setup the controller at the time the vm-system is not yet operational so 146 * 'kvtop()' cannot be used. 147 */ 148 #ifndef ST_POOL_SIZE 149 #define ST_POOL_SIZE 40 /* XXX: enough? */ 150 #endif 151 152 u_long st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable */ 153 u_long st_pool_virt, st_pool_phys; 154 155 /* 156 * Are we relocating the kernel to TT-Ram if possible? It is faster, but 157 * it is also reported not to work on all TT's. So the default is NO. 158 */ 159 #ifndef RELOC_KERNEL 160 #define RELOC_KERNEL 0 161 #endif 162 int reloc_kernel = RELOC_KERNEL; /* Patchable */ 163 164 /* 165 * this is the C-level entry function, it's called from locore.s. 166 * Preconditions: 167 * Interrupts are disabled 168 * PA == VA, we don't have to relocate addresses before enabling 169 * the MMU 170 * Exec is no longer available (because we're loaded all over 171 * low memory, no ExecBase is available anymore) 172 * 173 * It's purpose is: 174 * Do the things that are done in locore.s in the hp300 version, 175 * this includes allocation of kernel maps and enabling the MMU. 176 * 177 * Some of the code in here is `stolen' from Amiga MACH, and was 178 * written by Bryan Ford and Niklas Hallqvist. 179 * 180 * Very crude 68040 support by Michael L. Hitch. 181 */ 182 int kernel_copyback = 1; 183 184 void 185 start_c(id, ttphystart, ttphysize, stphysize, esym_addr) 186 int id; /* Machine id */ 187 u_int ttphystart, ttphysize; /* Start address and size of TT-ram */ 188 u_int stphysize; /* Size of ST-ram */ 189 char *esym_addr; /* Address of kernel '_esym' symbol */ 190 { 191 extern char end[]; 192 extern void etext __P((void)); 193 extern u_long protorp[2]; 194 u_int pstart; /* Next available physical address*/ 195 u_int vstart; /* Next available virtual address */ 196 u_int avail; 197 pt_entry_t *pt; 198 u_int ptsize, ptextra; 199 u_int tc, i; 200 u_int *pg; 201 u_int pg_proto; 202 u_int end_loaded; 203 u_long kbase; 204 u_int kstsize; 205 206 #if defined(_MILANHW_) 207 /* XXX 208 * XXX The right place todo this is probably the booter (Leo) 209 * XXX More than 16MB memory is not yet supported on the Milan! 210 * The Milan Lies about the presence of TT-RAM. If you insert 211 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM, 212 * starting at address 16MB. 213 */ 214 stphysize += ttphysize; 215 ttphysize = ttphystart = 0; 216 #endif 217 boot_segs[0].start = 0; 218 boot_segs[0].end = stphysize; 219 boot_segs[1].start = ttphystart; 220 boot_segs[1].end = ttphystart + ttphysize; 221 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */ 222 223 /* 224 * The following is a hack. We do not know how much ST memory we 225 * really need until after configuration has finished. At this 226 * time I have no idea how to grab ST memory at that time. 227 * The round_page() call is ment to correct errors made by 228 * binpatching! 229 */ 230 st_pool_size = m68k_round_page(st_pool_size); 231 st_pool_phys = stphysize - st_pool_size; 232 stphysize = st_pool_phys; 233 234 machineid = id; 235 esym = esym_addr; 236 237 /* 238 * the kernel ends at end() or esym. 239 */ 240 if(esym == NULL) 241 end_loaded = (u_int)end; 242 else end_loaded = (u_int)esym; 243 244 /* 245 * If we have enough fast-memory to put the kernel in and the 246 * RELOC_KERNEL option is set, do it! 247 */ 248 if((reloc_kernel != 0) && (ttphysize >= end_loaded)) 249 kbase = ttphystart; 250 else kbase = 0; 251 252 /* 253 * Determine the type of machine we are running on. This needs 254 * to be done early (and before initcpu())! 255 */ 256 set_machtype(); 257 258 /* 259 * Initialize CPU specific stuff 260 */ 261 initcpu(); 262 263 /* 264 * We run the kernel from ST memory at the moment. 265 * The kernel segment table is put just behind the loaded image. 266 * pstart: start of usable ST memory 267 * avail : size of ST memory available. 268 */ 269 pstart = (u_int)end_loaded; 270 pstart = m68k_round_page(pstart); 271 avail = stphysize - pstart; 272 273 /* 274 * Calculate the number of pages needed for Sysseg. 275 * For the 68030, we need 256 descriptors (segment-table-entries). 276 * This easily fits into one page. 277 * For the 68040, both the level-1 and level-2 descriptors are 278 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE 279 * level-1 & level-2 tables. 280 */ 281 #if defined(M68040) || defined(M68060) 282 if (mmutype == MMU_68040) 283 kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); 284 else 285 #endif 286 kstsize = 1; 287 /* 288 * allocate the kernel segment table 289 */ 290 Sysseg = (st_entry_t *)pstart; 291 Sysseg_pa = (u_int)Sysseg + kbase; 292 pstart += kstsize * PAGE_SIZE; 293 avail -= kstsize * PAGE_SIZE; 294 295 /* 296 * Determine the number of pte's we need for extra's like 297 * ST I/O map's. 298 */ 299 ptextra = btoc(STIO_SIZE); 300 301 /* 302 * If present, add pci areas 303 */ 304 if (machineid & ATARI_HADES) 305 ptextra += btoc(PCI_CONF_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE); 306 if (machineid & ATARI_MILAN) 307 ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE); 308 ptextra += btoc(BOOTM_VA_POOL); 309 310 /* 311 * The 'pt' (the initial kernel pagetable) has to map the kernel and 312 * the I/O areas. The various I/O areas are mapped (virtually) at 313 * the top of the address space mapped by 'pt' (ie. just below Sysmap). 314 */ 315 pt = (pt_entry_t *)pstart; 316 ptsize = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT; 317 pstart += ptsize; 318 avail -= ptsize; 319 320 /* 321 * allocate kernel page table map 322 */ 323 Sysptmap = (pt_entry_t *)pstart; 324 pstart += PAGE_SIZE; 325 avail -= PAGE_SIZE; 326 327 /* 328 * Set Sysmap; mapped after page table pages. Because I too (LWP) 329 * didn't understand the reason for this, I borrowed the following 330 * (sligthly modified) comment from mac68k/locore.s: 331 * LAK: There seems to be some confusion here about the next line, 332 * so I'll explain. The kernel needs some way of dynamically modifying 333 * the page tables for its own virtual memory. What it does is that it 334 * has a page table map. This page table map is mapped right after the 335 * kernel itself (in our implementation; in HP's it was after the I/O 336 * space). Therefore, the first three (or so) entries in the segment 337 * table point to the first three pages of the page tables (which 338 * point to the kernel) and the next entry in the segment table points 339 * to the page table map (this is done later). Therefore, the value 340 * of the pointer "Sysmap" will be something like 16M*3 = 48M. When 341 * the kernel addresses this pointer (e.g., Sysmap[0]), it will get 342 * the first longword of the first page map (== pt[0]). Since the 343 * page map mirrors the segment table, addressing any index of Sysmap 344 * will give you a PTE of the page maps which map the kernel. 345 */ 346 Sysmap = (u_int *)(ptsize << (SEGSHIFT - PGSHIFT)); 347 348 /* 349 * Initialize segment tables 350 */ 351 #if defined(M68040) || defined(M68060) 352 if (mmutype == MMU_68040) 353 mmu040_setup(Sysseg, kstsize, pt, ptsize, Sysptmap, 1, kbase); 354 else 355 #endif /* defined(M68040) || defined(M68060) */ 356 mmu030_setup(Sysseg, kstsize, pt, ptsize, Sysptmap, 1, kbase); 357 358 /* 359 * initialize kernel page table page(s). 360 * Assume load at VA 0. 361 * - Text pages are RO 362 * - Page zero is invalid 363 */ 364 pg_proto = (0 + kbase) | PG_RO | PG_V; 365 pg = pt; 366 *pg++ = PG_NV; pg_proto += PAGE_SIZE; 367 for(i = PAGE_SIZE; i < (u_int)etext; 368 i += PAGE_SIZE, pg_proto += PAGE_SIZE) 369 *pg++ = pg_proto; 370 371 /* 372 * data, bss and dynamic tables are read/write 373 */ 374 pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V; 375 376 #if defined(M68040) || defined(M68060) 377 /* 378 * Map the kernel segment table cache invalidated for 379 * these machines (for the 68040 not strictly necessary, but 380 * recommended by Motorola; for the 68060 mandatory) 381 */ 382 if (mmutype == MMU_68040) { 383 384 if (kernel_copyback) 385 pg_proto |= PG_CCB; 386 387 for (; i < (u_int)Sysseg; i += PAGE_SIZE, pg_proto += PAGE_SIZE) 388 *pg++ = pg_proto; 389 390 pg_proto = (pg_proto & ~PG_CCB) | PG_CI; 391 for (; i < pstart; i += PAGE_SIZE, pg_proto += PAGE_SIZE) 392 *pg++ = pg_proto; 393 pg_proto = (pg_proto & ~PG_CI); 394 if (kernel_copyback) 395 pg_proto |= PG_CCB; 396 } 397 #endif /* defined(M68040) || defined(M68060) */ 398 399 /* 400 * go till end of data allocated so far 401 * plus proc0 u-area (to be allocated) 402 */ 403 for(; i < pstart + USPACE; i += PAGE_SIZE, pg_proto += PAGE_SIZE) 404 *pg++ = pg_proto; 405 406 /* 407 * invalidate remainder of kernel PT 408 */ 409 while(pg < &pt[ptsize/sizeof(pt_entry_t)]) 410 *pg++ = PG_NV; 411 412 /* 413 * Map various I/O areas 414 */ 415 map_io_areas(pt, ptsize, ptextra); 416 417 /* 418 * Save KVA of proc0 user-area and allocate it 419 */ 420 proc0paddr = pstart; 421 pstart += USPACE; 422 avail -= USPACE; 423 424 /* 425 * At this point, virtual and physical allocation starts to divert. 426 */ 427 vstart = pstart; 428 429 /* 430 * Map the allocated space in ST-ram now. In the contig-case, there 431 * is no need to make a distinction between virtual and physical 432 * addresses. But I make it anyway to be prepared. 433 * Physcal space is already reserved! 434 */ 435 st_pool_virt = vstart; 436 pg = &pt[vstart / PAGE_SIZE]; 437 pg_proto = st_pool_phys | PG_RW | PG_CI | PG_V; 438 vstart += st_pool_size; 439 while(pg_proto < (st_pool_phys + st_pool_size)) { 440 *pg++ = pg_proto; 441 pg_proto += PAGE_SIZE; 442 } 443 444 /* 445 * Map physical page_zero and page-zero+1 (First ST-ram page). We need 446 * to reference it in the reboot code. Two pages are mapped, because 447 * we must make sure 'doboot()' is contained in it (see the tricky 448 * copying there....). 449 */ 450 page_zero = vstart; 451 pg = &pt[vstart / PAGE_SIZE]; 452 *pg++ = PG_RW | PG_CI | PG_V; 453 vstart += PAGE_SIZE; 454 *pg = PG_RW | PG_CI | PG_V | PAGE_SIZE; 455 vstart += PAGE_SIZE; 456 457 lowram = 0 >> PGSHIFT; /* XXX */ 458 459 /* 460 * Fill in usable segments. The page indexes will be initialized 461 * later when all reservations are made. 462 */ 463 usable_segs[0].start = 0; 464 usable_segs[0].end = stphysize; 465 usable_segs[1].start = ttphystart; 466 usable_segs[1].end = ttphystart + ttphysize; 467 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */ 468 469 if(kbase) { 470 /* 471 * First page of ST-ram is unusable, reserve the space 472 * for the kernel in the TT-ram segment. 473 * Note: Because physical page-zero is partially mapped to ROM 474 * by hardware, it is unusable. 475 */ 476 usable_segs[0].start = PAGE_SIZE; 477 usable_segs[1].start += pstart; 478 } 479 else usable_segs[0].start += pstart; 480 481 /* 482 * As all segment sizes are now valid, calculate page indexes and 483 * available physical memory. 484 */ 485 usable_segs[0].first_page = 0; 486 for (i = 1; usable_segs[i].start; i++) { 487 usable_segs[i].first_page = usable_segs[i-1].first_page; 488 usable_segs[i].first_page += 489 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE; 490 } 491 for (i = 0, physmem = 0; usable_segs[i].start; i++) 492 physmem += usable_segs[i].end - usable_segs[i].start; 493 physmem >>= PGSHIFT; 494 495 /* 496 * get the pmap module in sync with reality. 497 */ 498 pmap_bootstrap(vstart, stio_addr, ptextra); 499 500 /* 501 * Prepare to enable the MMU. 502 * Setup and load SRP nolimit, share global, 4 byte PTE's 503 */ 504 protorp[0] = 0x80000202; 505 protorp[1] = (u_int)Sysseg + kbase; /* + segtable address */ 506 Sysseg_pa = (u_int)Sysseg + kbase; 507 508 cpu_init_kcorehdr(kbase); 509 510 /* 511 * copy over the kernel (and all now initialized variables) 512 * to fastram. DONT use bcopy(), this beast is much larger 513 * than 128k ! 514 */ 515 if(kbase) { 516 register u_long *lp, *le, *fp; 517 518 lp = (u_long *)0; 519 le = (u_long *)pstart; 520 fp = (u_long *)kbase; 521 while(lp < le) 522 *fp++ = *lp++; 523 } 524 #if defined(M68040) || defined(M68060) 525 if (mmutype == MMU_68040) { 526 /* 527 * movel Sysseg_pa,a0; 528 * movec a0,SRP; 529 * pflusha; 530 * movel #$0xc000,d0; 531 * movec d0,TC 532 */ 533 if (cputype == CPU_68060) { 534 /* XXX: Need the branch cache be cleared? */ 535 __asm volatile (".word 0x4e7a,0x0002;" 536 "orl #0x400000,%%d0;" 537 ".word 0x4e7b,0x0002" : : : "d0"); 538 } 539 __asm volatile ("movel %0,%%a0;" 540 ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0"); 541 __asm volatile (".word 0xf518" : : ); 542 __asm volatile ("movel #0xc000,%%d0;" 543 ".word 0x4e7b,0x0003" : : : "d0" ); 544 } else 545 #endif 546 { 547 __asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0])); 548 /* 549 * setup and load TC register. 550 * enable_cpr, enable_srp, pagesize=8k, 551 * A = 8 bits, B = 11 bits 552 */ 553 tc = 0x82d08b00; 554 __asm volatile ("pmove %0@,%%tc" : : "a" (&tc)); 555 } 556 557 /* Is this to fool the optimizer?? */ 558 i = *(int *)proc0paddr; 559 *(volatile int *)proc0paddr = i; 560 561 /* 562 * Initialize the "u-area" pages. 563 * Must initialize p_addr before autoconfig or the 564 * fault handler will get a NULL reference. 565 */ 566 bzero((u_char *)proc0paddr, USPACE); 567 lwp0.l_addr = (struct user *)proc0paddr; 568 curlwp = &lwp0; 569 curpcb = &((struct user *)proc0paddr)->u_pcb; 570 571 /* 572 * Get the hardware into a defined state 573 */ 574 atari_hwinit(); 575 576 /* 577 * Initialize stmem allocator 578 */ 579 init_stmem(); 580 581 /* 582 * Initialize the I/O mem extent map. 583 * Note: we don't have to check the return value since 584 * creation of a fixed extent map will never fail (since 585 * descriptor storage has already been allocated). 586 * 587 * N.B. The iomem extent manages _all_ physical addresses 588 * on the machine. When the amount of RAM is found, all 589 * extents of RAM are allocated from the map. 590 */ 591 iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF, 592 (caddr_t)iomem_ex_storage, sizeof(iomem_ex_storage), 593 EX_NOCOALESCE|EX_NOWAIT); 594 595 /* 596 * Allocate the physical RAM from the extent map 597 */ 598 for (i = 0; boot_segs[i].end != 0; i++) { 599 if (extent_alloc_region(iomem_ex, boot_segs[i].start, 600 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) { 601 /* XXX: Ahum, should not happen ;-) */ 602 printf("Warning: Cannot allocate boot memory from" 603 " extent map!?\n"); 604 } 605 } 606 607 /* 608 * Initialize interrupt mapping. 609 */ 610 intr_init(); 611 } 612 613 /* 614 * Try to figure out on what type of machine we are running 615 * Note: This module runs *before* the io-mapping is setup! 616 */ 617 static void 618 set_machtype() 619 { 620 #ifdef _MILANHW_ 621 machineid |= ATARI_MILAN; 622 623 #else 624 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */ 625 if(badbaddr((caddr_t)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) { 626 /* 627 * Watch out! We can also have a Hades with < 16Mb 628 * RAM here... 629 */ 630 if(!badbaddr((caddr_t)__UNVOLATILE(&MFP->mf_gpip), 631 sizeof(char))) { 632 machineid |= ATARI_FALCON; 633 return; 634 } 635 } 636 if(!badbaddr((caddr_t)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char))) 637 machineid |= ATARI_HADES; 638 else machineid |= ATARI_TT; 639 #endif /* _MILANHW_ */ 640 } 641 642 static void 643 atari_hwinit() 644 { 645 #if defined(_ATARIHW_) 646 /* 647 * Initialize the sound chip 648 */ 649 ym2149_init(); 650 651 /* 652 * Make sure that the midi acia will not generate an interrupt 653 * unless something attaches to it. We cannot do this for the 654 * keyboard acia because this breaks the '-d' option of the 655 * booter... 656 */ 657 MDI->ac_cs = 0; 658 #endif /* defined(_ATARIHW_) */ 659 660 /* 661 * Initialize both MFP chips (if both present!) to generate 662 * auto-vectored interrupts with EOI. The active-edge registers are 663 * set up. The interrupt enable registers are set to disable all 664 * interrupts. 665 */ 666 MFP->mf_iera = MFP->mf_ierb = 0; 667 MFP->mf_imra = MFP->mf_imrb = 0; 668 MFP->mf_aer = MFP->mf_ddr = 0; 669 MFP->mf_vr = 0x40; 670 671 #if defined(_ATARIHW_) 672 if(machineid & (ATARI_TT|ATARI_HADES)) { 673 MFP2->mf_iera = MFP2->mf_ierb = 0; 674 MFP2->mf_imra = MFP2->mf_imrb = 0; 675 MFP2->mf_aer = 0x80; 676 MFP2->mf_vr = 0x50; 677 } 678 679 if(machineid & ATARI_TT) { 680 /* 681 * Initialize the SCU, to enable interrupts on the SCC (ipl5), 682 * MFP (ipl6) and softints (ipl1). 683 */ 684 SCU->sys_mask = SCU_SYS_SOFT; 685 SCU->vme_mask = SCU_MFP | SCU_SCC; 686 #ifdef DDB 687 /* 688 * This allows people with the correct hardware modification 689 * to drop into the debugger from an NMI. 690 */ 691 SCU->sys_mask |= SCU_IRQ7; 692 #endif 693 } 694 #endif /* defined(_ATARIHW_) */ 695 696 #if NPCI > 0 697 if(machineid & (ATARI_HADES|ATARI_MILAN)) { 698 /* 699 * Configure PCI-bus 700 */ 701 init_pci_bus(); 702 } 703 #endif 704 705 } 706 707 /* 708 * Do the dull work of mapping the various I/O areas. They MUST be Cache 709 * inhibited! 710 * All I/O areas are virtually mapped at the end of the pt-table. 711 */ 712 static void 713 map_io_areas(pt, ptsize, ptextra) 714 pt_entry_t *pt; 715 u_int ptsize; /* Size of 'pt' in bytes */ 716 u_int ptextra; /* #of additional I/O pte's */ 717 { 718 extern void bootm_init __P((vaddr_t, pt_entry_t *, u_long)); 719 vaddr_t ioaddr; 720 pt_entry_t *pg, *epg; 721 pt_entry_t pg_proto; 722 u_long mask; 723 724 ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE; 725 726 /* 727 * Map ST-IO area 728 */ 729 stio_addr = ioaddr; 730 ioaddr += STIO_SIZE; 731 pg = &pt[stio_addr / PAGE_SIZE]; 732 epg = &pg[btoc(STIO_SIZE)]; 733 #ifdef _MILANHW_ 734 /* 735 * Turn on byte swaps in the ST I/O area. On the Milan, the 736 * U0 signal of the MMU controls the BigEndian signal 737 * of the PLX9080. We use this setting so we can read/write the 738 * PLX registers (and PCI-config space) in big-endian mode. 739 */ 740 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100; 741 #else 742 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V; 743 #endif 744 while(pg < epg) { 745 *pg++ = pg_proto; 746 pg_proto += PAGE_SIZE; 747 } 748 749 /* 750 * Map PCI areas 751 */ 752 if (machineid & ATARI_HADES) { 753 /* 754 * Only Hades maps the PCI-config space! 755 */ 756 pci_conf_addr = ioaddr; 757 ioaddr += PCI_CONF_SIZE; 758 pg = &pt[pci_conf_addr / PAGE_SIZE]; 759 epg = &pg[btoc(PCI_CONF_SIZE)]; 760 mask = PCI_CONFM_PHYS; 761 pg_proto = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V; 762 for(; pg < epg; mask <<= 1) 763 *pg++ = pg_proto | mask; 764 } 765 else pci_conf_addr = 0; /* XXX: should crash */ 766 767 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 768 pci_io_addr = ioaddr; 769 ioaddr += PCI_IO_SIZE; 770 pg = &pt[pci_io_addr / PAGE_SIZE]; 771 epg = &pg[btoc(PCI_IO_SIZE)]; 772 pg_proto = PCI_IO_PHYS | PG_RW | PG_CI | PG_V; 773 while(pg < epg) { 774 *pg++ = pg_proto; 775 pg_proto += PAGE_SIZE; 776 } 777 778 pci_mem_addr = ioaddr; 779 /* Provide an uncached PCI address for the MILAN */ 780 pci_mem_uncached = ioaddr; 781 ioaddr += PCI_MEM_SIZE; 782 epg = &pg[btoc(PCI_MEM_SIZE)]; 783 pg_proto = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V; 784 while(pg < epg) { 785 *pg++ = pg_proto; 786 pg_proto += PAGE_SIZE; 787 } 788 } 789 790 bootm_init(ioaddr, pg, BOOTM_VA_POOL); 791 /* 792 * ioaddr += BOOTM_VA_POOL; 793 * pg = &pg[btoc(BOOTM_VA_POOL)]; 794 */ 795 } 796 797 /* 798 * Used by dumpconf() to get the size of the machine-dependent panic-dump 799 * header in disk blocks. 800 */ 801 802 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t))) 803 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1)) 804 805 int 806 cpu_dumpsize() 807 { 808 809 return btodb(MDHDRSIZE); 810 } 811 812 /* 813 * Called by dumpsys() to dump the machine-dependent header. 814 * XXX: Assumes that it will all fit in one diskblock. 815 */ 816 int 817 cpu_dump(int (*dump)(dev_t, daddr_t, caddr_t, size_t), daddr_t *p_blkno) 818 { 819 int buf[MDHDRSIZE/sizeof(int)]; 820 int error; 821 kcore_seg_t *kseg_p; 822 cpu_kcore_hdr_t *chdr_p; 823 824 kseg_p = (kcore_seg_t *)buf; 825 chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)]; 826 827 /* 828 * Generate a segment header 829 */ 830 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU); 831 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p)); 832 833 /* 834 * Add the md header 835 */ 836 *chdr_p = cpu_kcore_hdr; 837 error = dump(dumpdev, *p_blkno, (caddr_t)buf, sizeof(buf)); 838 *p_blkno += btodb(sizeof(buf)); 839 return (error); 840 } 841 842 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS) 843 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS" 844 #endif 845 /* 846 * Initialize the cpu_kcore_header. 847 */ 848 static void 849 cpu_init_kcorehdr(kbase) 850 u_long kbase; 851 { 852 cpu_kcore_hdr_t *h = &cpu_kcore_hdr; 853 struct m68k_kcore_hdr *m = &h->un._m68k; 854 extern char end[]; 855 int i; 856 857 bzero(&cpu_kcore_hdr, sizeof(cpu_kcore_hdr)); 858 859 /* 860 * Initialize the `dispatcher' portion of the header. 861 */ 862 strcpy(h->name, machine); 863 h->page_size = PAGE_SIZE; 864 h->kernbase = KERNBASE; 865 866 /* 867 * Fill in information about our MMU configuration. 868 */ 869 m->mmutype = mmutype; 870 m->sg_v = SG_V; 871 m->sg_frame = SG_FRAME; 872 m->sg_ishift = SG_ISHIFT; 873 m->sg_pmask = SG_PMASK; 874 m->sg40_shift1 = SG4_SHIFT1; 875 m->sg40_mask2 = SG4_MASK2; 876 m->sg40_shift2 = SG4_SHIFT2; 877 m->sg40_mask3 = SG4_MASK3; 878 m->sg40_shift3 = SG4_SHIFT3; 879 m->sg40_addr1 = SG4_ADDR1; 880 m->sg40_addr2 = SG4_ADDR2; 881 m->pg_v = PG_V; 882 m->pg_frame = PG_FRAME; 883 884 /* 885 * Initialize pointer to kernel segment table. 886 */ 887 m->sysseg_pa = (u_int)Sysseg + kbase; 888 889 /* 890 * Initialize relocation value such that: 891 * 892 * pa = (va - KERNBASE) + reloc 893 */ 894 m->reloc = kbase; 895 896 /* 897 * Define the end of the relocatable range. 898 */ 899 m->relocend = (u_int32_t)end; 900 901 for (i = 0; i < NMEM_SEGS; i++) { 902 m->ram_segs[i].start = boot_segs[i].start; 903 m->ram_segs[i].size = boot_segs[i].end - 904 boot_segs[i].start; 905 } 906 } 907 908 void 909 mmu030_setup(sysseg, kstsize, pt, ptsize, sysptmap, sysptsize, kbase) 910 st_entry_t *sysseg; /* System segment table */ 911 u_int kstsize; /* size of 'sysseg' in pages */ 912 pt_entry_t *pt; /* Kernel page table */ 913 u_int ptsize; /* size of 'pt' in bytes */ 914 pt_entry_t *sysptmap; /* System page table */ 915 u_int sysptsize; /* size of 'sysptmap' in pages */ 916 u_int kbase; 917 { 918 st_entry_t sg_proto, *sg; 919 pt_entry_t pg_proto, *pg, *epg; 920 921 sg_proto = ((u_int)pt + kbase) | SG_RW | SG_V; 922 pg_proto = ((u_int)pt + kbase) | PG_RW | PG_CI | PG_V; 923 924 /* 925 * Map the page table pages in both the HW segment table 926 * and the software Sysptmap. Note that Sysptmap is also 927 * considered a PT page, hence the +sysptsize. 928 */ 929 sg = sysseg; 930 pg = sysptmap; 931 epg = &pg[(ptsize >> PGSHIFT) + sysptsize]; 932 while(pg < epg) { 933 *sg++ = sg_proto; 934 *pg++ = pg_proto; 935 sg_proto += PAGE_SIZE; 936 pg_proto += PAGE_SIZE; 937 } 938 939 /* 940 * invalidate the remainder of the tables 941 */ 942 epg = &sysptmap[sysptsize * NPTEPG]; 943 while(pg < epg) { 944 *sg++ = SG_NV; 945 *pg++ = PG_NV; 946 } 947 } 948 949 #if defined(M68040) || defined(M68060) 950 void 951 mmu040_setup(sysseg, kstsize, pt, ptsize, sysptmap, sysptsize, kbase) 952 st_entry_t *sysseg; /* System segment table */ 953 u_int kstsize; /* size of 'sysseg' in pages */ 954 pt_entry_t *pt; /* Kernel page table */ 955 u_int ptsize; /* size of 'pt' in bytes */ 956 pt_entry_t *sysptmap; /* System page table */ 957 u_int sysptsize; /* size of 'sysptmap' in pages */ 958 u_int kbase; 959 { 960 int i; 961 st_entry_t sg_proto, *sg, *esg; 962 pt_entry_t pg_proto; 963 964 /* 965 * First invalidate the entire "segment table" pages 966 * (levels 1 and 2 have the same "invalid" values). 967 */ 968 sg = sysseg; 969 esg = &sg[kstsize * NPTEPG]; 970 while (sg < esg) 971 *sg++ = SG_NV; 972 973 /* 974 * Initialize level 2 descriptors (which immediately 975 * follow the level 1 table). These should map 'pt' + 'sysptmap'. 976 * We need: 977 * NPTEPG / SG4_LEV3SIZE 978 * level 2 descriptors to map each of the nptpages + 1 979 * pages of PTEs. Note that we set the "used" bit 980 * now to save the HW the expense of doing it. 981 */ 982 i = ((ptsize >> PGSHIFT) + sysptsize) * (NPTEPG / SG4_LEV3SIZE); 983 sg = &sysseg[SG4_LEV1SIZE]; 984 esg = &sg[i]; 985 sg_proto = ((u_int)pt + kbase) | SG_U | SG_RW | SG_V; 986 while (sg < esg) { 987 *sg++ = sg_proto; 988 sg_proto += (SG4_LEV3SIZE * sizeof (st_entry_t)); 989 } 990 991 /* 992 * Initialize level 1 descriptors. We need: 993 * roundup(num, SG4_LEV2SIZE) / SG4_LEVEL2SIZE 994 * level 1 descriptors to map the 'num' level 2's. 995 */ 996 i = roundup(i, SG4_LEV2SIZE) / SG4_LEV2SIZE; 997 protostfree = (-1 << (i + 1)) /* & ~(-1 << MAXKL2SIZE) */; 998 sg = sysseg; 999 esg = &sg[i]; 1000 sg_proto = ((u_int)&sg[SG4_LEV1SIZE] + kbase) | SG_U | SG_RW |SG_V; 1001 while (sg < esg) { 1002 *sg++ = sg_proto; 1003 sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t)); 1004 } 1005 1006 /* 1007 * Initialize sysptmap 1008 */ 1009 sg = sysptmap; 1010 esg = &sg[(ptsize >> PGSHIFT) + sysptsize]; 1011 pg_proto = ((u_int)pt + kbase) | PG_RW | PG_CI | PG_V; 1012 while (sg < esg) { 1013 *sg++ = pg_proto; 1014 pg_proto += PAGE_SIZE; 1015 } 1016 /* 1017 * Invalidate rest of Sysptmap page 1018 */ 1019 esg = &sysptmap[sysptsize * NPTEPG]; 1020 while (sg < esg) 1021 *sg++ = SG_NV; 1022 } 1023 #endif /* M68040 */ 1024 1025 #if defined(M68060) 1026 int m68060_pcr_init = 0x21; /* make this patchable */ 1027 #endif 1028 1029 static void 1030 initcpu() 1031 { 1032 typedef void trapfun __P((void)); 1033 1034 switch (cputype) { 1035 1036 #if defined(M68060) 1037 case CPU_68060: 1038 { 1039 extern trapfun *vectab[256]; 1040 extern trapfun buserr60, addrerr4060, fpfault; 1041 #if defined(M060SP) 1042 extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[]; 1043 #else 1044 extern trapfun illinst; 1045 #endif 1046 1047 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : : 1048 "d"(m68060_pcr_init):"d0" ); 1049 1050 /* bus/addrerr vectors */ 1051 vectab[2] = buserr60; 1052 vectab[3] = addrerr4060; 1053 1054 #if defined(M060SP) 1055 /* integer support */ 1056 vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00]; 1057 1058 /* floating point support */ 1059 /* 1060 * XXX maybe we really should run-time check for the 1061 * stack frame format here: 1062 */ 1063 vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30]; 1064 1065 vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38]; 1066 vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40]; 1067 1068 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; 1069 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; 1070 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; 1071 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; 1072 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; 1073 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; 1074 #else 1075 vectab[61] = illinst; 1076 #endif 1077 vectab[48] = fpfault; 1078 } 1079 break; 1080 #endif /* defined(M68060) */ 1081 #if defined(M68040) 1082 case CPU_68040: 1083 { 1084 extern trapfun *vectab[256]; 1085 extern trapfun buserr40, addrerr4060; 1086 1087 /* bus/addrerr vectors */ 1088 vectab[2] = buserr40; 1089 vectab[3] = addrerr4060; 1090 } 1091 break; 1092 #endif /* defined(M68040) */ 1093 #if defined(M68030) || defined(M68020) 1094 case CPU_68030: 1095 case CPU_68020: 1096 { 1097 extern trapfun *vectab[256]; 1098 extern trapfun buserr2030, addrerr2030; 1099 1100 /* bus/addrerr vectors */ 1101 vectab[2] = buserr2030; 1102 vectab[3] = addrerr2030; 1103 } 1104 break; 1105 #endif /* defined(M68030) || defined(M68020) */ 1106 } 1107 1108 DCIS(); 1109 } 1110 1111 #ifdef DEBUG 1112 void dump_segtable __P((u_int *)); 1113 void dump_pagetable __P((u_int *, u_int, u_int)); 1114 u_int vmtophys __P((u_int *, u_int)); 1115 1116 void 1117 dump_segtable(stp) 1118 u_int *stp; 1119 { 1120 u_int *s, *es; 1121 int shift, i; 1122 1123 s = stp; 1124 { 1125 es = s + (ATARI_STSIZE >> 2); 1126 shift = SG_ISHIFT; 1127 } 1128 1129 /* 1130 * XXX need changes for 68040 1131 */ 1132 for (i = 0; s < es; s++, i++) 1133 if (*s & SG_V) 1134 printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME); 1135 printf("\n"); 1136 } 1137 1138 void 1139 dump_pagetable(ptp, i, n) 1140 u_int *ptp, i, n; 1141 { 1142 u_int *p, *ep; 1143 1144 p = ptp + i; 1145 ep = p + n; 1146 for (; p < ep; p++, i++) 1147 if (*p & PG_V) 1148 printf("$%08x -> $%08x\t", i, *p & PG_FRAME); 1149 printf("\n"); 1150 } 1151 1152 u_int 1153 vmtophys(ste, vm) 1154 u_int *ste, vm; 1155 { 1156 ste = (u_int *) (*(ste + (vm >> SEGSHIFT)) & SG_FRAME); 1157 ste += (vm & SG_PMASK) >> PGSHIFT; 1158 return((*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1))); 1159 } 1160 1161 #endif 1162