xref: /netbsd-src/sys/arch/atari/atari/atari_init.c (revision c8a35b6227034951e874c2def577388e79ede4a5)
1 /*	$NetBSD: atari_init.c,v 1.79 2009/03/18 16:00:10 cegger Exp $	*/
2 
3 /*
4  * Copyright (c) 1995 Leo Weppelman
5  * Copyright (c) 1994 Michael L. Hitch
6  * Copyright (c) 1993 Markus Wild
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed by Markus Wild.
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.79 2009/03/18 16:00:10 cegger Exp $");
37 
38 #include "opt_ddb.h"
39 #include "opt_mbtype.h"
40 #include "opt_m060sp.h"
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/proc.h>
45 #include <sys/user.h>
46 #include <sys/ioctl.h>
47 #include <sys/select.h>
48 #include <sys/tty.h>
49 #include <sys/buf.h>
50 #include <sys/msgbuf.h>
51 #include <sys/mbuf.h>
52 #include <sys/extent.h>
53 #include <sys/protosw.h>
54 #include <sys/domain.h>
55 #include <sys/dkbad.h>
56 #include <sys/reboot.h>
57 #include <sys/exec.h>
58 #include <sys/core.h>
59 #include <sys/kcore.h>
60 
61 #include <uvm/uvm_extern.h>
62 
63 #include <machine/vmparam.h>
64 #include <machine/pte.h>
65 #include <machine/cpu.h>
66 #include <machine/iomap.h>
67 #include <machine/mfp.h>
68 #include <machine/scu.h>
69 #include <machine/acia.h>
70 #include <machine/kcore.h>
71 
72 #include <m68k/cpu.h>
73 #include <m68k/cacheops.h>
74 
75 #include <atari/atari/intr.h>
76 #include <atari/atari/stalloc.h>
77 #include <atari/dev/ym2149reg.h>
78 
79 #include "pci.h"
80 
81 void start_c(int, u_int, u_int, u_int, char *);
82 static void atari_hwinit(void);
83 static void cpu_init_kcorehdr(paddr_t, paddr_t);
84 static void initcpu(void);
85 static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t);
86 static void map_io_areas(paddr_t, psize_t, u_int);
87 static void set_machtype(void);
88 
89 #if defined(M68040) || defined(M68060)
90 static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t);
91 #endif
92 
93 /*
94  * Extent maps to manage all memory space, including I/O ranges.  Allocate
95  * storage for 8 regions in each, initially.  Later, iomem_malloc_safe
96  * will indicate that it's safe to use malloc() to dynamically allocate
97  * region descriptors.
98  * This means that the fixed static storage is only used for registrating
99  * the found memory regions and the bus-mapping of the console.
100  *
101  * The extent maps are not static!  They are used for bus address space
102  * allocation.
103  */
104 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
105 struct extent *iomem_ex;
106 int iomem_malloc_safe;
107 
108 /*
109  * All info needed to generate a panic dump. All fields are setup by
110  * start_c().
111  * XXX: Should sheck usage of phys_segs. There is some unwanted overlap
112  *      here.... Also, the name is badly choosen. Phys_segs contains the
113  *      segment descriptions _after_ reservations are made.
114  * XXX: 'lowram' is obsoleted by the new panicdump format
115  */
116 static cpu_kcore_hdr_t cpu_kcore_hdr;
117 
118 extern u_int 	lowram;
119 extern u_int	proc0paddr;
120 int		machineid, mmutype, cputype, astpending;
121 #if defined(M68040) || defined(M68060)
122 extern int	protostfree;
123 #endif
124 
125 extern char		*esym;
126 extern struct pcb	*curpcb;
127 
128 /*
129  * This is the virtual address of physical page 0. Used by 'do_boot()'.
130  */
131 vaddr_t	page_zero;
132 
133 /*
134  * Crude support for allocation in ST-ram. Currently only used to allocate
135  * video ram.
136  * The physical address is also returned because the video init needs it to
137  * setup the controller at the time the vm-system is not yet operational so
138  * 'kvtop()' cannot be used.
139  */
140 #ifndef ST_POOL_SIZE
141 #define	ST_POOL_SIZE	40			/* XXX: enough? */
142 #endif
143 
144 u_long	st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable	*/
145 u_long	st_pool_virt, st_pool_phys;
146 
147 /*
148  * Are we relocating the kernel to TT-Ram if possible? It is faster, but
149  * it is also reported not to work on all TT's. So the default is NO.
150  */
151 #ifndef	RELOC_KERNEL
152 #define	RELOC_KERNEL	0
153 #endif
154 int	reloc_kernel = RELOC_KERNEL;		/* Patchable	*/
155 
156 /*
157  * this is the C-level entry function, it's called from locore.s.
158  * Preconditions:
159  *	Interrupts are disabled
160  *	PA == VA, we don't have to relocate addresses before enabling
161  *		the MMU
162  * 	Exec is no longer available (because we're loaded all over
163  *		low memory, no ExecBase is available anymore)
164  *
165  * It's purpose is:
166  *	Do the things that are done in locore.s in the hp300 version,
167  *		this includes allocation of kernel maps and enabling the MMU.
168  *
169  * Some of the code in here is `stolen' from Amiga MACH, and was
170  * written by Bryan Ford and Niklas Hallqvist.
171  *
172  * Very crude 68040 support by Michael L. Hitch.
173  */
174 int kernel_copyback = 1;
175 
176 void
177 start_c(int id, u_int ttphystart, u_int ttphysize, u_int stphysize, char *esym_addr)
178 	/* id:			 Machine id			*/
179 	/* ttphystart, ttphysize:	 Start address and size of TT-ram */
180 	/* stphysize:		 Size of ST-ram 		*/
181 	/* esym_addr:		 Address of kernel '_esym' symbol */
182 {
183 	extern char	end[];
184 	extern void	etext(void);
185 	extern u_long	protorp[2];
186 	paddr_t		pstart;		/* Next available physical address */
187 	vaddr_t		vstart;		/* Next available virtual address */
188 	vsize_t		avail;
189 	paddr_t		ptpa;
190 	psize_t		ptsize;
191 	u_int		ptextra;
192 	vaddr_t		kva;
193 	u_int		tc, i;
194 	pt_entry_t	*pg, *epg;
195 	pt_entry_t	pg_proto;
196 	vaddr_t		end_loaded;
197 	paddr_t		kbase;
198 	u_int		kstsize;
199 	paddr_t		Sysseg_pa;
200 	paddr_t		Sysptmap_pa;
201 
202 #if defined(_MILANHW_)
203 	/* XXX
204 	 * XXX The right place todo this is probably the booter (Leo)
205 	 * XXX More than 16MB memory is not yet supported on the Milan!
206 	 * The Milan Lies about the presence of TT-RAM. If you insert
207 	 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM,
208 	 * starting at address 16MB.
209 	 */
210 	stphysize += ttphysize;
211 	ttphysize  = ttphystart = 0;
212 #endif
213 	boot_segs[0].start       = 0;
214 	boot_segs[0].end         = stphysize;
215 	boot_segs[1].start       = ttphystart;
216 	boot_segs[1].end         = ttphystart + ttphysize;
217 	boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */
218 
219 	/*
220 	 * The following is a hack. We do not know how much ST memory we
221 	 * really need until after configuration has finished. At this
222 	 * time I have no idea how to grab ST memory at that time.
223 	 * The round_page() call is ment to correct errors made by
224 	 * binpatching!
225 	 */
226 	st_pool_size   = m68k_round_page(st_pool_size);
227 	st_pool_phys   = stphysize - st_pool_size;
228 	stphysize      = st_pool_phys;
229 
230 	machineid      = id;
231 	esym           = esym_addr;
232 
233 	/*
234 	 * the kernel ends at end() or esym.
235 	 */
236 	if (esym == NULL)
237 		end_loaded = (vaddr_t)&end;
238 	else
239 		end_loaded = (vaddr_t)esym;
240 
241 	/*
242 	 * If we have enough fast-memory to put the kernel in and the
243 	 * RELOC_KERNEL option is set, do it!
244 	 */
245 	if ((reloc_kernel != 0) && (ttphysize >= end_loaded))
246 		kbase = ttphystart;
247 	else
248 		kbase = 0;
249 
250 	/*
251 	 * Determine the type of machine we are running on. This needs
252 	 * to be done early (and before initcpu())!
253 	 */
254 	set_machtype();
255 
256 	/*
257 	 * Initialize CPU specific stuff
258 	 */
259 	initcpu();
260 
261 	/*
262 	 * We run the kernel from ST memory at the moment.
263 	 * The kernel segment table is put just behind the loaded image.
264 	 * pstart: start of usable ST memory
265 	 * avail : size of ST memory available.
266 	 */
267 	vstart = (vaddr_t)end_loaded;
268 	vstart = m68k_round_page(vstart);
269 	pstart = (paddr_t)vstart;	/* pre-reloc PA == kernel VA here */
270 	avail  = stphysize - pstart;
271 
272 	/*
273 	 * Save KVA of proc0 user-area and allocate it
274 	 */
275 	proc0paddr = vstart;
276 	pstart    += USPACE;
277 	vstart    += USPACE;
278 	avail     -= USPACE;
279 
280 	/*
281 	 * Calculate the number of pages needed for Sysseg.
282 	 * For the 68030, we need 256 descriptors (segment-table-entries).
283 	 * This easily fits into one page.
284 	 * For the 68040, both the level-1 and level-2 descriptors are
285 	 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE
286 	 * level-1 & level-2 tables.
287 	 */
288 #if defined(M68040) || defined(M68060)
289 	if (mmutype == MMU_68040)
290 		kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
291 	else
292 #endif
293 		kstsize = 1;
294 	/*
295 	 * allocate the kernel segment table
296 	 */
297 	Sysseg_pa  = pstart;			/* pre-reloc PA to init STEs */
298 	Sysseg     = (st_entry_t *)vstart;
299 	pstart    += kstsize * PAGE_SIZE;
300 	vstart    += kstsize * PAGE_SIZE;
301 	avail     -= kstsize * PAGE_SIZE;
302 
303 	/*
304 	 * allocate kernel page table map
305 	 */
306 	Sysptmap_pa = pstart;			/* pre-reloc PA to init PTEs */
307 	Sysptmap = (pt_entry_t *)vstart;
308 	pstart  += PAGE_SIZE;
309 	vstart  += PAGE_SIZE;
310 	avail   -= PAGE_SIZE;
311 
312 	/*
313 	 * Determine the number of pte's we need for extra's like
314 	 * ST I/O map's.
315 	 */
316 	ptextra = btoc(STIO_SIZE);
317 
318 	/*
319 	 * If present, add pci areas
320 	 */
321 	if (machineid & ATARI_HADES)
322 		ptextra += btoc(PCI_CONF_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE);
323 	if (machineid & ATARI_MILAN)
324 		ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE);
325 	ptextra += btoc(BOOTM_VA_POOL);
326 
327 	/*
328 	 * The 'pt' (the initial kernel pagetable) has to map the kernel and
329 	 * the I/O areas. The various I/O areas are mapped (virtually) at
330 	 * the top of the address space mapped by 'pt' (ie. just below Sysmap).
331 	 */
332 	ptpa	= pstart;			/* pre-reloc PA to init PTEs */
333 	ptsize  = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT;
334 	pstart += ptsize;
335 	vstart += ptsize;
336 	avail  -= ptsize;
337 
338 	/*
339 	 * Sysmap is now placed at the end of Supervisor virtual address space.
340 	 */
341 	Sysmap = (pt_entry_t *)-(NPTEPG * PAGE_SIZE);
342 
343 	/*
344 	 * Initialize segment tables
345 	 */
346 #if defined(M68040) || defined(M68060)
347 	if (mmutype == MMU_68040)
348 		mmu040_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa,
349 		    kbase);
350 	else
351 #endif /* defined(M68040) || defined(M68060) */
352 		mmu030_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa,
353 		    kbase);
354 
355 	/*
356 	 * initialize kernel page table page(s).
357 	 * Assume load at VA 0.
358 	 * - Text pages are RO
359 	 * - Page zero is invalid
360 	 */
361 	pg_proto = (0 + kbase) /* relocated PA */ | PG_RO | PG_V;
362 	pg       = (pt_entry_t *)ptpa;
363 	*pg++    = PG_NV;
364 
365 	pg_proto += PAGE_SIZE;
366 	for (kva = PAGE_SIZE; kva < (vaddr_t)etext; kva += PAGE_SIZE) {
367 		*pg++ = pg_proto;
368 		pg_proto += PAGE_SIZE;
369 	}
370 
371 	/*
372 	 * data, bss and dynamic tables are read/write
373 	 */
374 	pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V;
375 
376 #if defined(M68040) || defined(M68060)
377 	/*
378 	 * Map the kernel segment table cache invalidated for
379 	 * these machines (for the 68040 not strictly necessary, but
380 	 * recommended by Motorola; for the 68060 mandatory)
381 	 */
382 	if (mmutype == MMU_68040) {
383 
384 		if (kernel_copyback)
385 			pg_proto |= PG_CCB;
386 
387 		for (; kva < (vaddr_t)Sysseg; kva += PAGE_SIZE) {
388 			*pg++ = pg_proto;
389 			pg_proto += PAGE_SIZE;
390 		}
391 
392 		pg_proto = (pg_proto & ~PG_CCB) | PG_CI;
393 		for (; kva < (vaddr_t)Sysptmap; kva += PAGE_SIZE) {
394 			*pg++ = pg_proto;
395 			pg_proto += PAGE_SIZE;
396 		}
397 
398 		pg_proto = (pg_proto & ~PG_CI);
399 		if (kernel_copyback)
400 			pg_proto |= PG_CCB;
401 	}
402 #endif /* defined(M68040) || defined(M68060) */
403 
404 	/*
405 	 * go till end of data allocated so far
406 	 * plus proc0 u-area (to be allocated)
407 	 */
408 	for (; kva < vstart; kva += PAGE_SIZE) {
409 		*pg++ = pg_proto;
410 		pg_proto += PAGE_SIZE;
411 	}
412 
413 	/*
414 	 * invalidate remainder of kernel PT
415 	 */
416 	epg = (pt_entry_t *)ptpa;
417 	epg = &epg[ptsize / sizeof(pt_entry_t)];
418 	while (pg < epg)
419 		*pg++ = PG_NV;
420 
421 	/*
422 	 * Map various I/O areas
423 	 */
424 	map_io_areas(ptpa, ptsize, ptextra);
425 
426 	/*
427 	 * Map the allocated space in ST-ram now. In the contig-case, there
428 	 * is no need to make a distinction between virtual and physical
429 	 * addresses. But I make it anyway to be prepared.
430 	 * Physcal space is already reserved!
431 	 */
432 	st_pool_virt = vstart;
433 	pg           = (pt_entry_t *)ptpa;
434 	pg           = &pg[vstart / PAGE_SIZE];
435 	pg_proto     = st_pool_phys | PG_RW | PG_CI | PG_V;
436 	vstart      += st_pool_size;
437 	while (pg_proto < (st_pool_phys + st_pool_size)) {
438 		*pg++     = pg_proto;
439 		pg_proto += PAGE_SIZE;
440 	}
441 
442 	/*
443 	 * Map physical page_zero and page-zero+1 (First ST-ram page). We need
444 	 * to reference it in the reboot code. Two pages are mapped, because
445 	 * we must make sure 'doboot()' is contained in it (see the tricky
446 	 * copying there....).
447 	 */
448 	page_zero  = vstart;
449 	pg         = (pt_entry_t *)ptpa;
450 	pg         = &pg[vstart / PAGE_SIZE];
451 	*pg++      = PG_RW | PG_CI | PG_V;
452 	vstart    += PAGE_SIZE;
453 	*pg        = PG_RW | PG_CI | PG_V | PAGE_SIZE;
454 	vstart    += PAGE_SIZE;
455 
456 	/*
457 	 * All necessary STEs and PTEs have been initialized.
458 	 * Update Sysseg_pa and Sysptmap_pa to point relocated PA.
459 	 */
460 	if (kbase) {
461 		Sysseg_pa   += kbase;
462 		Sysptmap_pa += kbase;
463 	}
464 
465 	lowram  = 0 >> PGSHIFT; /* XXX */
466 
467 	/*
468 	 * Fill in usable segments. The page indexes will be initialized
469 	 * later when all reservations are made.
470 	 */
471 	usable_segs[0].start = 0;
472 	usable_segs[0].end   = stphysize;
473 	usable_segs[0].free_list = VM_FREELIST_STRAM;
474 	usable_segs[1].start = ttphystart;
475 	usable_segs[1].end   = ttphystart + ttphysize;
476 	usable_segs[1].free_list = VM_FREELIST_TTRAM;
477 	usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */
478 
479 	if (kbase) {
480 		/*
481 		 * First page of ST-ram is unusable, reserve the space
482 		 * for the kernel in the TT-ram segment.
483 		 * Note: Because physical page-zero is partially mapped to ROM
484 		 *       by hardware, it is unusable.
485 		 */
486 		usable_segs[0].start  = PAGE_SIZE;
487 		usable_segs[1].start += pstart;
488 	} else
489 		usable_segs[0].start += pstart;
490 
491 	/*
492 	 * As all segment sizes are now valid, calculate page indexes and
493 	 * available physical memory.
494 	 */
495 	usable_segs[0].first_page = 0;
496 	for (i = 1; usable_segs[i].start; i++) {
497 		usable_segs[i].first_page  = usable_segs[i-1].first_page;
498 		usable_segs[i].first_page +=
499 		    (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE;
500 	}
501 	for (i = 0, physmem = 0; usable_segs[i].start; i++)
502 		physmem += usable_segs[i].end - usable_segs[i].start;
503 	physmem >>= PGSHIFT;
504 
505 	/*
506 	 * get the pmap module in sync with reality.
507 	 */
508 	pmap_bootstrap(vstart, Sysseg_pa);
509 
510 	/*
511 	 * Prepare to enable the MMU.
512 	 * Setup and load SRP nolimit, share global, 4 byte PTE's
513 	 */
514 	protorp[0] = 0x80000202;
515 	protorp[1] = Sysseg_pa;			/* + segtable address */
516 
517 	cpu_init_kcorehdr(kbase, Sysseg_pa);
518 
519 	/*
520 	 * copy over the kernel (and all now initialized variables)
521 	 * to fastram.  DONT use bcopy(), this beast is much larger
522 	 * than 128k !
523 	 */
524 	if (kbase) {
525 		register paddr_t *lp, *le, *fp;
526 
527 		lp = (paddr_t *)0;
528 		le = (paddr_t *)pstart;
529 		fp = (paddr_t *)kbase;
530 		while(lp < le)
531 			*fp++ = *lp++;
532 	}
533 #if defined(M68040) || defined(M68060)
534 	if (mmutype == MMU_68040) {
535 		/*
536 		 * movel Sysseg_pa,a0;
537 		 * movec a0,SRP;
538 		 * pflusha;
539 		 * movel #$0xc000,d0;
540 		 * movec d0,TC
541 		 */
542 		if (cputype == CPU_68060) {
543 			/* XXX: Need the branch cache be cleared? */
544 			__asm volatile (".word 0x4e7a,0x0002;"
545 				      "orl #0x400000,%%d0;"
546 				      ".word 0x4e7b,0x0002" : : : "d0");
547 		}
548 		__asm volatile ("movel %0,%%a0;"
549 			      ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0");
550 		__asm volatile (".word 0xf518" : : );
551 		__asm volatile ("movel #0xc000,%%d0;"
552 			      ".word 0x4e7b,0x0003" : : : "d0" );
553 	} else
554 #endif
555 	{
556 		__asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0]));
557 		/*
558 		 * setup and load TC register.
559 		 * enable_cpr, enable_srp, pagesize=8k,
560 		 * A = 8 bits, B = 11 bits
561 		 */
562 		tc = 0x82d08b00;
563 		__asm volatile ("pmove %0@,%%tc" : : "a" (&tc));
564 	}
565 
566 	/* Is this to fool the optimizer?? */
567 	i = *(int *)proc0paddr;
568 	*(volatile int *)proc0paddr = i;
569 
570 	/*
571 	 * Initialize the "u-area" pages.
572 	 * Must initialize p_addr before autoconfig or the
573 	 * fault handler will get a NULL reference.
574 	 */
575 	memset((u_char *)proc0paddr, 0, USPACE);
576 	lwp0.l_addr = (struct user *)proc0paddr;
577 	curlwp = &lwp0;
578 	curpcb  = &((struct user *)proc0paddr)->u_pcb;
579 
580 	/*
581 	 * Get the hardware into a defined state
582 	 */
583 	atari_hwinit();
584 
585 	/*
586 	 * Initialize stmem allocator
587 	 */
588 	init_stmem();
589 
590 	/*
591 	 * Initialize the I/O mem extent map.
592 	 * Note: we don't have to check the return value since
593 	 * creation of a fixed extent map will never fail (since
594 	 * descriptor storage has already been allocated).
595 	 *
596 	 * N.B. The iomem extent manages _all_ physical addresses
597 	 * on the machine.  When the amount of RAM is found, all
598 	 * extents of RAM are allocated from the map.
599 	 */
600 	iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF,
601 	    (void *)iomem_ex_storage, sizeof(iomem_ex_storage),
602 	    EX_NOCOALESCE|EX_NOWAIT);
603 
604 	/*
605 	 * Allocate the physical RAM from the extent map
606 	 */
607 	for (i = 0; boot_segs[i].end != 0; i++) {
608 		if (extent_alloc_region(iomem_ex, boot_segs[i].start,
609 		    boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) {
610 			/* XXX: Ahum, should not happen ;-) */
611 			printf("Warning: Cannot allocate boot memory from"
612 			    " extent map!?\n");
613 		}
614 	}
615 
616 	/*
617 	 * Initialize interrupt mapping.
618 	 */
619 	intr_init();
620 }
621 
622 /*
623  * Try to figure out on what type of machine we are running
624  * Note: This module runs *before* the io-mapping is setup!
625  */
626 static void
627 set_machtype(void)
628 {
629 
630 #ifdef _MILANHW_
631 	machineid |= ATARI_MILAN;
632 
633 #else
634 	stio_addr = 0xff8000;	/* XXX: For TT & Falcon only */
635 	if (badbaddr((void *)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) {
636 		/*
637 		 * Watch out! We can also have a Hades with < 16Mb
638 		 * RAM here...
639 		 */
640 		if (!badbaddr((void *)__UNVOLATILE(&MFP->mf_gpip),
641 		    sizeof(char))) {
642 			machineid |= ATARI_FALCON;
643 			return;
644 		}
645 	}
646 	if (!badbaddr((void *)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char)))
647 		machineid |= ATARI_HADES;
648 	else
649 		machineid |= ATARI_TT;
650 #endif /* _MILANHW_ */
651 }
652 
653 static void
654 atari_hwinit(void)
655 {
656 
657 #if defined(_ATARIHW_)
658 	/*
659 	 * Initialize the sound chip
660 	 */
661 	ym2149_init();
662 
663 	/*
664 	 * Make sure that the midi acia will not generate an interrupt
665 	 * unless something attaches to it. We cannot do this for the
666 	 * keyboard acia because this breaks the '-d' option of the
667 	 * booter...
668 	 */
669 	MDI->ac_cs = 0;
670 #endif /* defined(_ATARIHW_) */
671 
672 	/*
673 	 * Initialize both MFP chips (if both present!) to generate
674 	 * auto-vectored interrupts with EOI. The active-edge registers are
675 	 * set up. The interrupt enable registers are set to disable all
676 	 * interrupts.
677 	 */
678 	MFP->mf_iera  = MFP->mf_ierb = 0;
679 	MFP->mf_imra  = MFP->mf_imrb = 0;
680 	MFP->mf_aer   = MFP->mf_ddr  = 0;
681 	MFP->mf_vr    = 0x40;
682 
683 #if defined(_ATARIHW_)
684 	if (machineid & (ATARI_TT|ATARI_HADES)) {
685 		MFP2->mf_iera = MFP2->mf_ierb = 0;
686 		MFP2->mf_imra = MFP2->mf_imrb = 0;
687 		MFP2->mf_aer  = 0x80;
688 		MFP2->mf_vr   = 0x50;
689 	}
690 
691 	if (machineid & ATARI_TT) {
692 		/*
693 		 * Initialize the SCU, to enable interrupts on the SCC (ipl5),
694 		 * MFP (ipl6) and softints (ipl1).
695 		 */
696 		SCU->sys_mask = SCU_SYS_SOFT;
697 		SCU->vme_mask = SCU_MFP | SCU_SCC;
698 #ifdef DDB
699 		/*
700 		 * This allows people with the correct hardware modification
701 		 * to drop into the debugger from an NMI.
702 		 */
703 		SCU->sys_mask |= SCU_IRQ7;
704 #endif
705 	}
706 #endif /* defined(_ATARIHW_) */
707 
708 #if NPCI > 0
709 	if (machineid & (ATARI_HADES|ATARI_MILAN)) {
710 		/*
711 		 * Configure PCI-bus
712 		 */
713 		init_pci_bus();
714 	}
715 #endif
716 
717 }
718 
719 /*
720  * Do the dull work of mapping the various I/O areas. They MUST be Cache
721  * inhibited!
722  * All I/O areas are virtually mapped at the end of the pt-table.
723  */
724 static void
725 map_io_areas(paddr_t ptpa, psize_t ptsize, u_int ptextra)
726 	/* ptsize:		 Size of 'pt' in bytes	*/
727 	/* ptextra:	 #of additional I/O pte's	*/
728 {
729 	extern void	bootm_init(vaddr_t, pt_entry_t *, u_long);
730 	vaddr_t		ioaddr;
731 	pt_entry_t	*pt, *pg, *epg;
732 	pt_entry_t	pg_proto;
733 	u_long		mask;
734 
735 	pt = (pt_entry_t *)ptpa;
736 	ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE;
737 
738 	/*
739 	 * Map ST-IO area
740 	 */
741 	stio_addr = ioaddr;
742 	ioaddr   += STIO_SIZE;
743 	pg        = &pt[stio_addr / PAGE_SIZE];
744 	epg       = &pg[btoc(STIO_SIZE)];
745 #ifdef _MILANHW_
746 	/*
747 	 * Turn on byte swaps in the ST I/O area. On the Milan, the
748 	 * U0 signal of the MMU controls the BigEndian signal
749 	 * of the PLX9080. We use this setting so we can read/write the
750 	 * PLX registers (and PCI-config space) in big-endian mode.
751 	 */
752 	pg_proto  = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100;
753 #else
754 	pg_proto  = STIO_PHYS | PG_RW | PG_CI | PG_V;
755 #endif
756 	while(pg < epg) {
757 		*pg++     = pg_proto;
758 		pg_proto += PAGE_SIZE;
759 	}
760 
761 	/*
762 	 * Map PCI areas
763 	 */
764 	if (machineid & ATARI_HADES) {
765 		/*
766 		 * Only Hades maps the PCI-config space!
767 		 */
768 		pci_conf_addr = ioaddr;
769 		ioaddr       += PCI_CONF_SIZE;
770 		pg            = &pt[pci_conf_addr / PAGE_SIZE];
771 		epg           = &pg[btoc(PCI_CONF_SIZE)];
772 		mask          = PCI_CONFM_PHYS;
773 		pg_proto      = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V;
774 		for (; pg < epg; mask <<= 1)
775 			*pg++ = pg_proto | mask;
776 	} else
777 		pci_conf_addr = 0; /* XXX: should crash */
778 
779 	if (machineid & (ATARI_HADES|ATARI_MILAN)) {
780 		pci_io_addr   = ioaddr;
781 		ioaddr       += PCI_IO_SIZE;
782 		pg	      = &pt[pci_io_addr / PAGE_SIZE];
783 		epg           = &pg[btoc(PCI_IO_SIZE)];
784 		pg_proto      = PCI_IO_PHYS | PG_RW | PG_CI | PG_V;
785 		while (pg < epg) {
786 			*pg++     = pg_proto;
787 			pg_proto += PAGE_SIZE;
788 		}
789 
790 		pci_mem_addr  = ioaddr;
791 		/* Provide an uncached PCI address for the MILAN */
792 		pci_mem_uncached = ioaddr;
793 		ioaddr       += PCI_MEM_SIZE;
794 		epg           = &pg[btoc(PCI_MEM_SIZE)];
795 		pg_proto      = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V;
796 		while (pg < epg) {
797 			*pg++     = pg_proto;
798 			pg_proto += PAGE_SIZE;
799 		}
800 	}
801 
802 	bootm_init(ioaddr, pg, BOOTM_VA_POOL);
803 	/*
804 	 * ioaddr += BOOTM_VA_POOL;
805 	 * pg = &pg[btoc(BOOTM_VA_POOL)];
806 	 */
807 }
808 
809 /*
810  * Used by dumpconf() to get the size of the machine-dependent panic-dump
811  * header in disk blocks.
812  */
813 
814 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t)))
815 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1))
816 
817 int
818 cpu_dumpsize(void)
819 {
820 
821 	return btodb(MDHDRSIZE);
822 }
823 
824 /*
825  * Called by dumpsys() to dump the machine-dependent header.
826  * XXX: Assumes that it will all fit in one diskblock.
827  */
828 int
829 cpu_dump(int (*dump)(dev_t, daddr_t, void *, size_t), daddr_t *p_blkno)
830 {
831 	int		buf[MDHDRSIZE/sizeof(int)];
832 	int		error;
833 	kcore_seg_t	*kseg_p;
834 	cpu_kcore_hdr_t	*chdr_p;
835 
836 	kseg_p = (kcore_seg_t *)buf;
837 	chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)];
838 
839 	/*
840 	 * Generate a segment header
841 	 */
842 	CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU);
843 	kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p));
844 
845 	/*
846 	 * Add the md header
847 	 */
848 	*chdr_p = cpu_kcore_hdr;
849 	error = dump(dumpdev, *p_blkno, (void *)buf, sizeof(buf));
850 	*p_blkno += btodb(sizeof(buf));
851 	return (error);
852 }
853 
854 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS)
855 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS"
856 #endif
857 /*
858  * Initialize the cpu_kcore_header.
859  */
860 static void
861 cpu_init_kcorehdr(paddr_t kbase, paddr_t sysseg_pa)
862 {
863 	cpu_kcore_hdr_t *h = &cpu_kcore_hdr;
864 	struct m68k_kcore_hdr *m = &h->un._m68k;
865 	extern char end[];
866 	int	i;
867 
868 	memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr));
869 
870 	/*
871 	 * Initialize the `dispatcher' portion of the header.
872 	 */
873 	strcpy(h->name, machine);
874 	h->page_size = PAGE_SIZE;
875 	h->kernbase = KERNBASE;
876 
877 	/*
878 	 * Fill in information about our MMU configuration.
879 	 */
880 	m->mmutype	= mmutype;
881 	m->sg_v		= SG_V;
882 	m->sg_frame	= SG_FRAME;
883 	m->sg_ishift	= SG_ISHIFT;
884 	m->sg_pmask	= SG_PMASK;
885 	m->sg40_shift1	= SG4_SHIFT1;
886 	m->sg40_mask2	= SG4_MASK2;
887 	m->sg40_shift2	= SG4_SHIFT2;
888 	m->sg40_mask3	= SG4_MASK3;
889 	m->sg40_shift3	= SG4_SHIFT3;
890 	m->sg40_addr1	= SG4_ADDR1;
891 	m->sg40_addr2	= SG4_ADDR2;
892 	m->pg_v		= PG_V;
893 	m->pg_frame	= PG_FRAME;
894 
895 	/*
896 	 * Initialize pointer to kernel segment table.
897 	 */
898 	m->sysseg_pa = sysseg_pa;		/* PA after relocation */
899 
900 	/*
901 	 * Initialize relocation value such that:
902 	 *
903 	 *	pa = (va - KERNBASE) + reloc
904 	 */
905 	m->reloc = kbase;
906 
907 	/*
908 	 * Define the end of the relocatable range.
909 	 */
910 	m->relocend = (vaddr_t)end;
911 
912 	for (i = 0; i < NMEM_SEGS; i++) {
913 		m->ram_segs[i].start = boot_segs[i].start;
914 		m->ram_segs[i].size  = boot_segs[i].end -
915 		    boot_segs[i].start;
916 	}
917 }
918 
919 void
920 mmu030_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, paddr_t sysptmap_pa, paddr_t kbase)
921 	/* sysseg_pa:	 System segment table		*/
922 	/* kstsize:	 size of 'sysseg' in pages	*/
923 	/* ptpa:		 Kernel page table		*/
924 	/* ptsize:		 size	of 'pt' in bytes	*/
925 	/* sysptmap_pa:	 System page table		*/
926 {
927 	st_entry_t	sg_proto, *sg, *esg;
928 	pt_entry_t	pg_proto, *pg, *epg;
929 
930 	/*
931 	 * Map the page table pages in both the HW segment table
932 	 * and the software Sysptmap.
933 	 */
934 	sg  = (st_entry_t *)sysseg_pa;
935 	pg  = (pt_entry_t *)sysptmap_pa;
936 	epg = &pg[ptsize >> PGSHIFT];
937 	sg_proto = (ptpa + kbase) /* relocated PA */ | SG_RW | SG_V;
938 	pg_proto = (ptpa + kbase) /* relocated PA */ | PG_RW | PG_CI | PG_V;
939 	while (pg < epg) {
940 		*sg++ = sg_proto;
941 		*pg++ = pg_proto;
942 		sg_proto += PAGE_SIZE;
943 		pg_proto += PAGE_SIZE;
944 	}
945 
946 	/*
947 	 * Invalidate the remainder of the tables.
948 	 */
949 	esg = (st_entry_t *)sysseg_pa;
950 	esg = &esg[256];			/* XXX should be TIA_SIZE */
951 	while (sg < esg)
952 		*sg++ = SG_NV;
953 	epg = (pt_entry_t *)sysptmap_pa;
954 	epg = &epg[NPTEPG];			/* XXX should be TIB_SIZE */
955 	while (pg < epg)
956 		*pg++ = PG_NV;
957 
958 	/*
959 	 * Initialize the PTE for the last one to point Sysptmap.
960 	 */
961 	sg = (st_entry_t *)sysseg_pa;
962 	sg = &sg[256 - 1];			/* XXX should be TIA_SIZE */
963 	pg = (pt_entry_t *)sysptmap_pa;
964 	pg = &pg[256 - 1];			/* XXX should be TIA_SIZE */
965 	*sg = (sysptmap_pa + kbase) /* relocated PA */ | SG_RW | SG_V;
966 	*pg = (sysptmap_pa + kbase) /* relocated PA */ | PG_RW | PG_CI | PG_V;
967 }
968 
969 #if defined(M68040) || defined(M68060)
970 void
971 mmu040_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, paddr_t sysptmap_pa, paddr_t kbase)
972 	/* sysseg_pa:	 System segment table		*/
973 	/* kstsize:	 size of 'sysseg' in pages	*/
974 	/* ptpa:		 Kernel page table		*/
975 	/* ptsize:		 size	of 'pt' in bytes	*/
976 	/* sysptmap_pa:	 System page table		*/
977 {
978 	int		nl1desc, nl2desc, i;
979 	st_entry_t	sg_proto, *sg, *esg;
980 	pt_entry_t	pg_proto, *pg, *epg;
981 
982 	/*
983 	 * First invalidate the entire "segment table" pages
984 	 * (levels 1 and 2 have the same "invalid" values).
985 	 */
986 	sg  = (st_entry_t *)sysseg_pa;
987 	esg = &sg[kstsize * NPTEPG];
988 	while (sg < esg)
989 		*sg++ = SG_NV;
990 
991 	/*
992 	 * Initialize level 2 descriptors (which immediately
993 	 * follow the level 1 table).
994 	 * We need:
995 	 *	NPTEPG / SG4_LEV3SIZE
996 	 * level 2 descriptors to map each of the nptpages
997 	 * pages of PTEs.  Note that we set the "used" bit
998 	 * now to save the HW the expense of doing it.
999 	 */
1000 	nl2desc = (ptsize >> PGSHIFT) * (NPTEPG / SG4_LEV3SIZE);
1001 	sg  = (st_entry_t *)sysseg_pa;
1002 	sg  = &sg[SG4_LEV1SIZE];
1003 	esg = &sg[nl2desc];
1004 	sg_proto = (ptpa + kbase) /* relocated PA */ | SG_U | SG_RW | SG_V;
1005 	while (sg < esg) {
1006 		*sg++     = sg_proto;
1007 		sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t));
1008 	}
1009 
1010 	/*
1011 	 * Initialize level 1 descriptors.  We need:
1012 	 *	howmany(nl2desc, SG4_LEV2SIZE)
1013 	 * level 1 descriptors to map the 'nl2desc' level 2's.
1014 	 */
1015 	nl1desc = howmany(nl2desc, SG4_LEV2SIZE);
1016 	sg  = (st_entry_t *)sysseg_pa;
1017 	esg = &sg[nl1desc];
1018 	sg_proto = ((paddr_t)&sg[SG4_LEV1SIZE] + kbase) /* relocated PA */
1019 	    | SG_U | SG_RW | SG_V;
1020 	while (sg < esg) {
1021 		*sg++     = sg_proto;
1022 		sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t));
1023 	}
1024 
1025 	/* Sysmap is last entry in level 1 */
1026 	sg  = (st_entry_t *)sysseg_pa;
1027 	sg  = &sg[SG4_LEV1SIZE - 1];
1028 	*sg = sg_proto;
1029 
1030 	/*
1031 	 * Kernel segment table at end of next level 2 table
1032 	 */
1033 	i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE);
1034 	sg  = (st_entry_t *)sysseg_pa;
1035 	sg  = &sg[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)];
1036 	esg = &sg[NPTEPG / SG4_LEV3SIZE];
1037 	sg_proto = (sysptmap_pa + kbase) /* relocated PA */
1038 	    | SG_U | SG_RW | SG_V;
1039 	while (sg < esg) {
1040 		*sg++ = sg_proto;
1041 		sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t));
1042 	}
1043 
1044 	/* Include additional level 2 table for Sysmap in protostfree */
1045 	protostfree = (~0 << (1 + nl1desc + 1)) /* & ~(~0 << MAXKL2SIZE) */;
1046 
1047 	/*
1048 	 * Initialize Sysptmap
1049 	 */
1050 	pg  = (pt_entry_t *)sysptmap_pa;
1051 	epg = &pg[ptsize >> PGSHIFT];
1052 	pg_proto = (ptpa + kbase) /* relocated PA */ | PG_RW | PG_CI | PG_V;
1053 	while (pg < epg) {
1054 		*pg++ = pg_proto;
1055 		pg_proto += PAGE_SIZE;
1056 	}
1057 
1058 	/*
1059 	 * Invalidate rest of Sysptmap page.
1060 	 */
1061 	epg = (pt_entry_t *)sysptmap_pa;
1062 	epg = &epg[NPTEPG];		/* XXX: should be TIB_SIZE */
1063 	while (pg < epg)
1064 		*pg++ = PG_NV;
1065 
1066 	/*
1067 	 * Initialize the PTE for the last one to point Sysptmap.
1068 	 */
1069 	pg = (pt_entry_t *)sysptmap_pa;
1070 	pg = &pg[256 - 1];		/* XXX: should be TIA_SIZE */
1071 	*pg = (sysptmap_pa + kbase) /* relocated PA */ | PG_RW | PG_CI | PG_V;
1072 }
1073 #endif /* M68040 */
1074 
1075 #if defined(M68060)
1076 int m68060_pcr_init = 0x21;	/* make this patchable */
1077 #endif
1078 
1079 static void
1080 initcpu(void)
1081 {
1082 	typedef void trapfun(void);
1083 
1084 	switch (cputype) {
1085 
1086 #if defined(M68060)
1087 	case CPU_68060:
1088 		{
1089 			extern trapfun	*vectab[256];
1090 			extern trapfun	buserr60, addrerr4060, fpfault;
1091 #if defined(M060SP)
1092 			extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[];
1093 #else
1094 			extern trapfun illinst;
1095 #endif
1096 
1097 			__asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : :
1098 					"d"(m68060_pcr_init):"d0" );
1099 
1100 			/* bus/addrerr vectors */
1101 			vectab[2] = buserr60;
1102 			vectab[3] = addrerr4060;
1103 
1104 #if defined(M060SP)
1105 			/* integer support */
1106 			vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00];
1107 
1108 			/* floating point support */
1109 			/*
1110 			 * XXX maybe we really should run-time check for the
1111 			 * stack frame format here:
1112 			 */
1113 			vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30];
1114 
1115 			vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38];
1116 			vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40];
1117 
1118 			vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00];
1119 			vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08];
1120 			vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10];
1121 			vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18];
1122 			vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20];
1123 			vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28];
1124 #else
1125 			vectab[61] = illinst;
1126 #endif
1127 			vectab[48] = fpfault;
1128 		}
1129 		break;
1130 #endif /* defined(M68060) */
1131 #if defined(M68040)
1132 	case CPU_68040:
1133 		{
1134 			extern trapfun	*vectab[256];
1135 			extern trapfun	buserr40, addrerr4060;
1136 
1137 			/* bus/addrerr vectors */
1138 			vectab[2] = buserr40;
1139 			vectab[3] = addrerr4060;
1140 		}
1141 		break;
1142 #endif /* defined(M68040) */
1143 #if defined(M68030) || defined(M68020)
1144 	case CPU_68030:
1145 	case CPU_68020:
1146 		{
1147 			extern trapfun	*vectab[256];
1148 			extern trapfun	buserr2030, addrerr2030;
1149 
1150 			/* bus/addrerr vectors */
1151 			vectab[2] = buserr2030;
1152 			vectab[3] = addrerr2030;
1153 		}
1154 		break;
1155 #endif /* defined(M68030) || defined(M68020) */
1156 	}
1157 
1158 	DCIS();
1159 }
1160 
1161 #ifdef DEBUG
1162 void dump_segtable(u_int *);
1163 void dump_pagetable(u_int *, u_int, u_int);
1164 u_int vmtophys(u_int *, u_int);
1165 
1166 void
1167 dump_segtable(u_int *stp)
1168 {
1169 	u_int *s, *es;
1170 	int shift, i;
1171 
1172 	s = stp;
1173 	{
1174 		es = s + (M68K_STSIZE >> 2);
1175 		shift = SG_ISHIFT;
1176 	}
1177 
1178 	/*
1179 	 * XXX need changes for 68040
1180 	 */
1181 	for (i = 0; s < es; s++, i++)
1182 		if (*s & SG_V)
1183 			printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME);
1184 	printf("\n");
1185 }
1186 
1187 void
1188 dump_pagetable(u_int *ptp, u_int i, u_int n)
1189 {
1190 	u_int *p, *ep;
1191 
1192 	p = ptp + i;
1193 	ep = p + n;
1194 	for (; p < ep; p++, i++)
1195 		if (*p & PG_V)
1196 			printf("$%08x -> $%08x\t", i, *p & PG_FRAME);
1197 	printf("\n");
1198 }
1199 
1200 u_int
1201 vmtophys(u_int *ste, u_int vm)
1202 {
1203 
1204 	ste = (u_int *)(*(ste + (vm >> SEGSHIFT)) & SG_FRAME);
1205 	ste += (vm & SG_PMASK) >> PGSHIFT;
1206 	return (*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1));
1207 }
1208 
1209 #endif
1210