1 /* $NetBSD: atari_init.c,v 1.99 2012/02/21 12:09:50 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Leo Weppelman 5 * Copyright (c) 1994 Michael L. Hitch 6 * Copyright (c) 1993 Markus Wild 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Markus Wild. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.99 2012/02/21 12:09:50 tsutsui Exp $"); 37 38 #include "opt_ddb.h" 39 #include "opt_mbtype.h" 40 #include "opt_m060sp.h" 41 #include "opt_m68k_arch.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/ioctl.h> 46 #include <sys/select.h> 47 #include <sys/tty.h> 48 #include <sys/buf.h> 49 #include <sys/msgbuf.h> 50 #include <sys/mbuf.h> 51 #include <sys/extent.h> 52 #include <sys/protosw.h> 53 #include <sys/domain.h> 54 #include <sys/dkbad.h> 55 #include <sys/reboot.h> 56 #include <sys/exec.h> 57 #include <sys/exec_aout.h> 58 #include <sys/core.h> 59 #include <sys/kcore.h> 60 61 #include <uvm/uvm_extern.h> 62 63 #include <machine/vmparam.h> 64 #include <machine/pte.h> 65 #include <machine/cpu.h> 66 #include <machine/iomap.h> 67 #include <machine/mfp.h> 68 #include <machine/scu.h> 69 #include <machine/acia.h> 70 #include <machine/kcore.h> 71 #include <machine/intr.h> 72 73 #include <m68k/cpu.h> 74 #include <m68k/cacheops.h> 75 76 #include <atari/atari/stalloc.h> 77 #include <atari/dev/clockvar.h> 78 #include <atari/dev/ym2149reg.h> 79 80 #include "pci.h" 81 82 void start_c(int, u_int, u_int, u_int, char *); 83 static void atari_hwinit(void); 84 static void cpu_init_kcorehdr(paddr_t, paddr_t); 85 static void initcpu(void); 86 static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 87 static void map_io_areas(paddr_t, psize_t, u_int); 88 static void set_machtype(void); 89 90 #if defined(M68040) || defined(M68060) 91 static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 92 #endif 93 94 /* 95 * Extent maps to manage all memory space, including I/O ranges. Allocate 96 * storage for 8 regions in each, initially. Later, iomem_malloc_safe 97 * will indicate that it's safe to use malloc() to dynamically allocate 98 * region descriptors. 99 * This means that the fixed static storage is only used for registrating 100 * the found memory regions and the bus-mapping of the console. 101 * 102 * The extent maps are not static! They are used for bus address space 103 * allocation. 104 */ 105 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 106 struct extent *iomem_ex; 107 int iomem_malloc_safe; 108 109 /* 110 * All info needed to generate a panic dump. All fields are setup by 111 * start_c(). 112 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap 113 * here.... Also, the name is badly choosen. Phys_segs contains the 114 * segment descriptions _after_ reservations are made. 115 * XXX: 'lowram' is obsoleted by the new panicdump format 116 */ 117 static cpu_kcore_hdr_t cpu_kcore_hdr; 118 119 extern u_int lowram; 120 int machineid, mmutype, cputype, astpending; 121 122 extern char *esym; 123 extern struct pcb *curpcb; 124 125 /* 126 * This is the virtual address of physical page 0. Used by 'do_boot()'. 127 */ 128 vaddr_t page_zero; 129 130 /* 131 * Crude support for allocation in ST-ram. Currently only used to allocate 132 * video ram. 133 * The physical address is also returned because the video init needs it to 134 * setup the controller at the time the vm-system is not yet operational so 135 * 'kvtop()' cannot be used. 136 */ 137 #ifndef ST_POOL_SIZE 138 #define ST_POOL_SIZE 40 /* XXX: enough? */ 139 #endif 140 141 u_long st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable */ 142 u_long st_pool_virt, st_pool_phys; 143 144 /* 145 * Are we relocating the kernel to TT-Ram if possible? It is faster, but 146 * it is also reported not to work on all TT's. So the default is NO. 147 */ 148 #ifndef RELOC_KERNEL 149 #define RELOC_KERNEL 0 150 #endif 151 int reloc_kernel = RELOC_KERNEL; /* Patchable */ 152 153 #define RELOC_PA(base, pa) ((base) + (pa)) /* used to set up PTE etc. */ 154 155 /* 156 * this is the C-level entry function, it's called from locore.s. 157 * Preconditions: 158 * Interrupts are disabled 159 * PA == VA, we don't have to relocate addresses before enabling 160 * the MMU 161 * Exec is no longer available (because we're loaded all over 162 * low memory, no ExecBase is available anymore) 163 * 164 * It's purpose is: 165 * Do the things that are done in locore.s in the hp300 version, 166 * this includes allocation of kernel maps and enabling the MMU. 167 * 168 * Some of the code in here is `stolen' from Amiga MACH, and was 169 * written by Bryan Ford and Niklas Hallqvist. 170 * 171 * Very crude 68040 support by Michael L. Hitch. 172 */ 173 int kernel_copyback = 1; 174 175 void 176 start_c(int id, u_int ttphystart, u_int ttphysize, u_int stphysize, 177 char *esym_addr) 178 /* id: Machine id */ 179 /* ttphystart, ttphysize: Start address and size of TT-ram */ 180 /* stphysize: Size of ST-ram */ 181 /* esym_addr: Address of kernel '_esym' symbol */ 182 { 183 extern char end[]; 184 extern void etext(void); 185 extern u_long protorp[2]; 186 paddr_t pstart; /* Next available physical address */ 187 vaddr_t vstart; /* Next available virtual address */ 188 vsize_t avail; 189 paddr_t ptpa; 190 psize_t ptsize; 191 u_int ptextra; 192 vaddr_t kva; 193 u_int tc, i; 194 pt_entry_t *pg, *epg; 195 pt_entry_t pg_proto; 196 vaddr_t end_loaded; 197 paddr_t kbase; 198 u_int kstsize; 199 paddr_t Sysptmap_pa; 200 201 #if defined(_MILANHW_) 202 /* XXX 203 * XXX The right place todo this is probably the booter (Leo) 204 * XXX More than 16MB memory is not yet supported on the Milan! 205 * The Milan Lies about the presence of TT-RAM. If you insert 206 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM, 207 * starting at address 16MB. 208 */ 209 stphysize += ttphysize; 210 ttphysize = ttphystart = 0; 211 #endif 212 boot_segs[0].start = 0; 213 boot_segs[0].end = stphysize; 214 boot_segs[1].start = ttphystart; 215 boot_segs[1].end = ttphystart + ttphysize; 216 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */ 217 218 /* 219 * The following is a hack. We do not know how much ST memory we 220 * really need until after configuration has finished. At this 221 * time I have no idea how to grab ST memory at that time. 222 * The round_page() call is ment to correct errors made by 223 * binpatching! 224 */ 225 st_pool_size = m68k_round_page(st_pool_size); 226 st_pool_phys = stphysize - st_pool_size; 227 stphysize = st_pool_phys; 228 229 physmem = btoc(stphysize) + btoc(ttphysize); 230 machineid = id; 231 esym = esym_addr; 232 233 /* 234 * the kernel ends at end() or esym. 235 */ 236 if (esym == NULL) 237 end_loaded = (vaddr_t)&end; 238 else 239 end_loaded = (vaddr_t)esym; 240 241 /* 242 * If we have enough fast-memory to put the kernel in and the 243 * RELOC_KERNEL option is set, do it! 244 */ 245 if ((reloc_kernel != 0) && (ttphysize >= end_loaded)) 246 kbase = ttphystart; 247 else 248 kbase = 0; 249 250 /* 251 * Determine the type of machine we are running on. This needs 252 * to be done early (and before initcpu())! 253 */ 254 set_machtype(); 255 256 /* 257 * Initialize CPU specific stuff 258 */ 259 initcpu(); 260 261 /* 262 * We run the kernel from ST memory at the moment. 263 * The kernel segment table is put just behind the loaded image. 264 * pstart: start of usable ST memory 265 * avail : size of ST memory available. 266 */ 267 vstart = (vaddr_t)end_loaded; 268 vstart = m68k_round_page(vstart); 269 pstart = (paddr_t)vstart; /* pre-reloc PA == kernel VA here */ 270 avail = stphysize - pstart; 271 272 /* 273 * Save KVA of lwp0 uarea and allocate it. 274 */ 275 lwp0uarea = vstart; 276 pstart += USPACE; 277 vstart += USPACE; 278 avail -= USPACE; 279 280 /* 281 * Calculate the number of pages needed for Sysseg. 282 * For the 68030, we need 256 descriptors (segment-table-entries). 283 * This easily fits into one page. 284 * For the 68040, both the level-1 and level-2 descriptors are 285 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE 286 * level-1 & level-2 tables. 287 */ 288 #if defined(M68040) || defined(M68060) 289 if (mmutype == MMU_68040) 290 kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); 291 else 292 #endif 293 kstsize = 1; 294 /* 295 * allocate the kernel segment table 296 */ 297 Sysseg_pa = pstart; /* pre-reloc PA to init STEs */ 298 Sysseg = (st_entry_t *)vstart; 299 pstart += kstsize * PAGE_SIZE; 300 vstart += kstsize * PAGE_SIZE; 301 avail -= kstsize * PAGE_SIZE; 302 303 /* 304 * allocate kernel page table map 305 */ 306 Sysptmap_pa = pstart; /* pre-reloc PA to init PTEs */ 307 Sysptmap = (pt_entry_t *)vstart; 308 pstart += PAGE_SIZE; 309 vstart += PAGE_SIZE; 310 avail -= PAGE_SIZE; 311 312 /* 313 * Determine the number of pte's we need for extra's like 314 * ST I/O map's. 315 */ 316 ptextra = btoc(STIO_SIZE); 317 318 /* 319 * If present, add pci areas 320 */ 321 if (machineid & ATARI_HADES) 322 ptextra += btoc(PCI_CONFIG_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE); 323 if (machineid & ATARI_MILAN) 324 ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE); 325 ptextra += btoc(BOOTM_VA_POOL); 326 /* 327 * now need to account for the kmem area, which is allocated 328 * before pmap_init() is called. It is roughly the size of physical 329 * memory. 330 */ 331 ptextra += physmem; 332 333 /* 334 * The 'pt' (the initial kernel pagetable) has to map the kernel and 335 * the I/O areas. The various I/O areas are mapped (virtually) at 336 * the top of the address space mapped by 'pt' (ie. just below Sysmap). 337 */ 338 ptpa = pstart; /* pre-reloc PA to init PTEs */ 339 ptsize = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT; 340 pstart += ptsize; 341 vstart += ptsize; 342 avail -= ptsize; 343 344 /* 345 * Sysmap is now placed at the end of Supervisor virtual address space. 346 */ 347 Sysmap = (pt_entry_t *)SYSMAP_VA; 348 349 /* 350 * Initialize segment tables 351 */ 352 #if defined(M68040) || defined(M68060) 353 if (mmutype == MMU_68040) 354 mmu040_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 355 kbase); 356 else 357 #endif /* defined(M68040) || defined(M68060) */ 358 mmu030_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 359 kbase); 360 361 /* 362 * initialize kernel page table page(s). 363 * Assume load at VA 0. 364 * - Text pages are RO 365 * - Page zero is invalid 366 */ 367 pg_proto = RELOC_PA(kbase, 0) | PG_RO | PG_V; 368 pg = (pt_entry_t *)ptpa; 369 *pg++ = PG_NV; 370 371 pg_proto += PAGE_SIZE; 372 for (kva = PAGE_SIZE; kva < (vaddr_t)etext; kva += PAGE_SIZE) { 373 *pg++ = pg_proto; 374 pg_proto += PAGE_SIZE; 375 } 376 377 /* 378 * data, bss and dynamic tables are read/write 379 */ 380 pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V; 381 382 #if defined(M68040) || defined(M68060) 383 /* 384 * Map the kernel segment table cache invalidated for 68040/68060. 385 * (for the 68040 not strictly necessary, but recommended by Motorola; 386 * for the 68060 mandatory) 387 */ 388 if (mmutype == MMU_68040) { 389 390 if (kernel_copyback) 391 pg_proto |= PG_CCB; 392 393 for (; kva < (vaddr_t)Sysseg; kva += PAGE_SIZE) { 394 *pg++ = pg_proto; 395 pg_proto += PAGE_SIZE; 396 } 397 398 pg_proto = (pg_proto & ~PG_CCB) | PG_CI; 399 for (; kva < (vaddr_t)Sysptmap; kva += PAGE_SIZE) { 400 *pg++ = pg_proto; 401 pg_proto += PAGE_SIZE; 402 } 403 404 pg_proto = (pg_proto & ~PG_CI); 405 if (kernel_copyback) 406 pg_proto |= PG_CCB; 407 } 408 #endif /* defined(M68040) || defined(M68060) */ 409 410 /* 411 * go till end of data allocated so far 412 * plus lwp0 u-area (to be allocated) 413 */ 414 for (; kva < vstart; kva += PAGE_SIZE) { 415 *pg++ = pg_proto; 416 pg_proto += PAGE_SIZE; 417 } 418 419 /* 420 * invalidate remainder of kernel PT 421 */ 422 epg = (pt_entry_t *)ptpa; 423 epg = &epg[ptsize / sizeof(pt_entry_t)]; 424 while (pg < epg) 425 *pg++ = PG_NV; 426 427 /* 428 * Map various I/O areas 429 */ 430 map_io_areas(ptpa, ptsize, ptextra); 431 432 /* 433 * Map the allocated space in ST-ram now. In the contig-case, there 434 * is no need to make a distinction between virtual and physical 435 * addresses. But I make it anyway to be prepared. 436 * Physcal space is already reserved! 437 */ 438 st_pool_virt = vstart; 439 pg = (pt_entry_t *)ptpa; 440 pg = &pg[vstart / PAGE_SIZE]; 441 pg_proto = st_pool_phys | PG_RW | PG_CI | PG_V; 442 vstart += st_pool_size; 443 while (pg_proto < (st_pool_phys + st_pool_size)) { 444 *pg++ = pg_proto; 445 pg_proto += PAGE_SIZE; 446 } 447 448 /* 449 * Map physical page_zero and page-zero+1 (First ST-ram page). We need 450 * to reference it in the reboot code. Two pages are mapped, because 451 * we must make sure 'doboot()' is contained in it (see the tricky 452 * copying there....). 453 */ 454 page_zero = vstart; 455 pg = (pt_entry_t *)ptpa; 456 pg = &pg[vstart / PAGE_SIZE]; 457 *pg++ = PG_RW | PG_CI | PG_V; 458 vstart += PAGE_SIZE; 459 *pg = PG_RW | PG_CI | PG_V | PAGE_SIZE; 460 vstart += PAGE_SIZE; 461 462 /* 463 * All necessary STEs and PTEs have been initialized. 464 * Update Sysseg_pa and Sysptmap_pa to point relocated PA. 465 */ 466 if (kbase) { 467 Sysseg_pa += kbase; 468 Sysptmap_pa += kbase; 469 } 470 471 lowram = 0 >> PGSHIFT; /* XXX */ 472 473 /* 474 * Fill in usable segments. The page indexes will be initialized 475 * later when all reservations are made. 476 */ 477 usable_segs[0].start = 0; 478 usable_segs[0].end = stphysize; 479 usable_segs[0].free_list = VM_FREELIST_STRAM; 480 usable_segs[1].start = ttphystart; 481 usable_segs[1].end = ttphystart + ttphysize; 482 usable_segs[1].free_list = VM_FREELIST_TTRAM; 483 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */ 484 485 if (kbase) { 486 /* 487 * First page of ST-ram is unusable, reserve the space 488 * for the kernel in the TT-ram segment. 489 * Note: Because physical page-zero is partially mapped to ROM 490 * by hardware, it is unusable. 491 */ 492 usable_segs[0].start = PAGE_SIZE; 493 usable_segs[1].start += pstart; 494 } else 495 usable_segs[0].start += pstart; 496 497 /* 498 * As all segment sizes are now valid, calculate page indexes and 499 * available physical memory. 500 */ 501 usable_segs[0].first_page = 0; 502 for (i = 1; usable_segs[i].start; i++) { 503 usable_segs[i].first_page = usable_segs[i-1].first_page; 504 usable_segs[i].first_page += 505 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE; 506 } 507 for (i = 0, physmem = 0; usable_segs[i].start; i++) 508 physmem += usable_segs[i].end - usable_segs[i].start; 509 physmem >>= PGSHIFT; 510 511 /* 512 * get the pmap module in sync with reality. 513 */ 514 pmap_bootstrap(vstart); 515 516 /* 517 * Prepare to enable the MMU. 518 * Setup and load SRP nolimit, share global, 4 byte PTE's 519 */ 520 protorp[0] = 0x80000202; 521 protorp[1] = Sysseg_pa; /* + segtable address */ 522 523 cpu_init_kcorehdr(kbase, Sysseg_pa); 524 525 /* 526 * copy over the kernel (and all now initialized variables) 527 * to fastram. DONT use bcopy(), this beast is much larger 528 * than 128k ! 529 */ 530 if (kbase) { 531 register paddr_t *lp, *le, *fp; 532 533 lp = (paddr_t *)0; 534 le = (paddr_t *)pstart; 535 fp = (paddr_t *)kbase; 536 while (lp < le) 537 *fp++ = *lp++; 538 } 539 #if defined(M68040) || defined(M68060) 540 if (mmutype == MMU_68040) { 541 /* 542 * movel Sysseg_pa,a0; 543 * movec a0,SRP; 544 * pflusha; 545 * movel #$0xc000,d0; 546 * movec d0,TC 547 */ 548 if (cputype == CPU_68060) { 549 /* XXX: Need the branch cache be cleared? */ 550 __asm volatile (".word 0x4e7a,0x0002;" 551 "orl #0x400000,%%d0;" 552 ".word 0x4e7b,0x0002" : : : "d0"); 553 } 554 __asm volatile ("movel %0,%%a0;" 555 ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0"); 556 __asm volatile (".word 0xf518" : : ); 557 __asm volatile ("movel #0xc000,%%d0;" 558 ".word 0x4e7b,0x0003" : : : "d0" ); 559 } else 560 #endif 561 { 562 __asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0])); 563 /* 564 * setup and load TC register. 565 * enable_cpr, enable_srp, pagesize=8k, 566 * A = 8 bits, B = 11 bits 567 */ 568 tc = 0x82d08b00; 569 __asm volatile ("pflusha" : : ); 570 __asm volatile ("pmove %0@,%%tc" : : "a" (&tc)); 571 } 572 573 /* 574 * Initialize the "u-area" pages etc. 575 */ 576 pmap_bootstrap_finalize(); 577 578 /* 579 * Get the hardware into a defined state 580 */ 581 atari_hwinit(); 582 583 /* 584 * Initialize stmem allocator 585 */ 586 init_stmem(); 587 588 /* 589 * Initialize the I/O mem extent map. 590 * Note: we don't have to check the return value since 591 * creation of a fixed extent map will never fail (since 592 * descriptor storage has already been allocated). 593 * 594 * N.B. The iomem extent manages _all_ physical addresses 595 * on the machine. When the amount of RAM is found, all 596 * extents of RAM are allocated from the map. 597 */ 598 iomem_ex = extent_create("iomem", 0x0, 0xffffffff, 599 (void *)iomem_ex_storage, sizeof(iomem_ex_storage), 600 EX_NOCOALESCE|EX_NOWAIT); 601 602 /* 603 * Allocate the physical RAM from the extent map 604 */ 605 for (i = 0; boot_segs[i].end != 0; i++) { 606 if (extent_alloc_region(iomem_ex, boot_segs[i].start, 607 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) { 608 /* XXX: Ahum, should not happen ;-) */ 609 printf("Warning: Cannot allocate boot memory from" 610 " extent map!?\n"); 611 } 612 } 613 614 /* 615 * Initialize interrupt mapping. 616 */ 617 intr_init(); 618 } 619 620 /* 621 * Try to figure out on what type of machine we are running 622 * Note: This module runs *before* the io-mapping is setup! 623 */ 624 static void 625 set_machtype(void) 626 { 627 628 #ifdef _MILANHW_ 629 machineid |= ATARI_MILAN; 630 631 #else 632 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */ 633 if (badbaddr((void *)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) { 634 /* 635 * Watch out! We can also have a Hades with < 16Mb 636 * RAM here... 637 */ 638 if (!badbaddr((void *)__UNVOLATILE(&MFP->mf_gpip), 639 sizeof(char))) { 640 machineid |= ATARI_FALCON; 641 return; 642 } 643 } 644 if (!badbaddr((void *)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char))) 645 machineid |= ATARI_HADES; 646 else 647 machineid |= ATARI_TT; 648 #endif /* _MILANHW_ */ 649 } 650 651 static void 652 atari_hwinit(void) 653 { 654 655 #if defined(_ATARIHW_) 656 /* 657 * Initialize the sound chip 658 */ 659 ym2149_init(); 660 661 /* 662 * Make sure that the midi acia will not generate an interrupt 663 * unless something attaches to it. We cannot do this for the 664 * keyboard acia because this breaks the '-d' option of the 665 * booter... 666 */ 667 MDI->ac_cs = 0; 668 #endif /* defined(_ATARIHW_) */ 669 670 /* 671 * Initialize both MFP chips (if both present!) to generate 672 * auto-vectored interrupts with EOI. The active-edge registers are 673 * set up. The interrupt enable registers are set to disable all 674 * interrupts. 675 */ 676 MFP->mf_iera = MFP->mf_ierb = 0; 677 MFP->mf_imra = MFP->mf_imrb = 0; 678 MFP->mf_aer = MFP->mf_ddr = 0; 679 MFP->mf_vr = 0x40; 680 681 #if defined(_ATARIHW_) 682 if (machineid & (ATARI_TT|ATARI_HADES)) { 683 MFP2->mf_iera = MFP2->mf_ierb = 0; 684 MFP2->mf_imra = MFP2->mf_imrb = 0; 685 MFP2->mf_aer = 0x80; 686 MFP2->mf_vr = 0x50; 687 } 688 689 if (machineid & ATARI_TT) { 690 /* 691 * Initialize the SCU, to enable interrupts on the SCC (ipl5), 692 * MFP (ipl6) and softints (ipl1). 693 */ 694 SCU->sys_mask = SCU_SYS_SOFT; 695 SCU->vme_mask = SCU_MFP | SCU_SCC; 696 #ifdef DDB 697 /* 698 * This allows people with the correct hardware modification 699 * to drop into the debugger from an NMI. 700 */ 701 SCU->sys_mask |= SCU_IRQ7; 702 #endif 703 } 704 #endif /* defined(_ATARIHW_) */ 705 706 /* 707 * Initialize a timer for delay(9). 708 */ 709 init_delay(); 710 711 #if NPCI > 0 712 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 713 /* 714 * Configure PCI-bus 715 */ 716 init_pci_bus(); 717 } 718 #endif 719 720 } 721 722 /* 723 * Do the dull work of mapping the various I/O areas. They MUST be Cache 724 * inhibited! 725 * All I/O areas are virtually mapped at the end of the pt-table. 726 */ 727 static void 728 map_io_areas(paddr_t ptpa, psize_t ptsize, u_int ptextra) 729 /* ptsize: Size of 'pt' in bytes */ 730 /* ptextra: #of additional I/O pte's */ 731 { 732 extern void bootm_init(vaddr_t, pt_entry_t *, u_long); 733 vaddr_t ioaddr; 734 pt_entry_t *pt, *pg, *epg; 735 pt_entry_t pg_proto; 736 u_long mask; 737 738 pt = (pt_entry_t *)ptpa; 739 ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE; 740 741 /* 742 * Map ST-IO area 743 */ 744 stio_addr = ioaddr; 745 ioaddr += STIO_SIZE; 746 pg = &pt[stio_addr / PAGE_SIZE]; 747 epg = &pg[btoc(STIO_SIZE)]; 748 #ifdef _MILANHW_ 749 /* 750 * Turn on byte swaps in the ST I/O area. On the Milan, the 751 * U0 signal of the MMU controls the BigEndian signal 752 * of the PLX9080. We use this setting so we can read/write the 753 * PLX registers (and PCI-config space) in big-endian mode. 754 */ 755 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100; 756 #else 757 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V; 758 #endif 759 while (pg < epg) { 760 *pg++ = pg_proto; 761 pg_proto += PAGE_SIZE; 762 } 763 764 /* 765 * Map PCI areas 766 */ 767 if (machineid & ATARI_HADES) { 768 /* 769 * Only Hades maps the PCI-config space! 770 */ 771 pci_conf_addr = ioaddr; 772 ioaddr += PCI_CONFIG_SIZE; 773 pg = &pt[pci_conf_addr / PAGE_SIZE]; 774 epg = &pg[btoc(PCI_CONFIG_SIZE)]; 775 mask = PCI_CONFM_PHYS; 776 pg_proto = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V; 777 for (; pg < epg; mask <<= 1) 778 *pg++ = pg_proto | mask; 779 } else 780 pci_conf_addr = 0; /* XXX: should crash */ 781 782 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 783 pci_io_addr = ioaddr; 784 ioaddr += PCI_IO_SIZE; 785 pg = &pt[pci_io_addr / PAGE_SIZE]; 786 epg = &pg[btoc(PCI_IO_SIZE)]; 787 pg_proto = PCI_IO_PHYS | PG_RW | PG_CI | PG_V; 788 while (pg < epg) { 789 *pg++ = pg_proto; 790 pg_proto += PAGE_SIZE; 791 } 792 793 pci_mem_addr = ioaddr; 794 /* Provide an uncached PCI address for the MILAN */ 795 pci_mem_uncached = ioaddr; 796 ioaddr += PCI_MEM_SIZE; 797 epg = &pg[btoc(PCI_MEM_SIZE)]; 798 pg_proto = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V; 799 while (pg < epg) { 800 *pg++ = pg_proto; 801 pg_proto += PAGE_SIZE; 802 } 803 } 804 805 bootm_init(ioaddr, pg, BOOTM_VA_POOL); 806 /* 807 * ioaddr += BOOTM_VA_POOL; 808 * pg = &pg[btoc(BOOTM_VA_POOL)]; 809 */ 810 } 811 812 /* 813 * Used by dumpconf() to get the size of the machine-dependent panic-dump 814 * header in disk blocks. 815 */ 816 817 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t))) 818 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1)) 819 820 int 821 cpu_dumpsize(void) 822 { 823 824 return btodb(MDHDRSIZE); 825 } 826 827 /* 828 * Called by dumpsys() to dump the machine-dependent header. 829 * XXX: Assumes that it will all fit in one diskblock. 830 */ 831 int 832 cpu_dump(int (*dump)(dev_t, daddr_t, void *, size_t), daddr_t *p_blkno) 833 { 834 int buf[MDHDRSIZE/sizeof(int)]; 835 int error; 836 kcore_seg_t *kseg_p; 837 cpu_kcore_hdr_t *chdr_p; 838 839 kseg_p = (kcore_seg_t *)buf; 840 chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)]; 841 842 /* 843 * Generate a segment header 844 */ 845 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU); 846 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p)); 847 848 /* 849 * Add the md header 850 */ 851 *chdr_p = cpu_kcore_hdr; 852 error = dump(dumpdev, *p_blkno, (void *)buf, sizeof(buf)); 853 *p_blkno += btodb(sizeof(buf)); 854 return (error); 855 } 856 857 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS) 858 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS" 859 #endif 860 /* 861 * Initialize the cpu_kcore_header. 862 */ 863 static void 864 cpu_init_kcorehdr(paddr_t kbase, paddr_t sysseg_pa) 865 { 866 cpu_kcore_hdr_t *h = &cpu_kcore_hdr; 867 struct m68k_kcore_hdr *m = &h->un._m68k; 868 extern char end[]; 869 int i; 870 871 memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr)); 872 873 /* 874 * Initialize the `dispatcher' portion of the header. 875 */ 876 strcpy(h->name, machine); 877 h->page_size = PAGE_SIZE; 878 h->kernbase = KERNBASE; 879 880 /* 881 * Fill in information about our MMU configuration. 882 */ 883 m->mmutype = mmutype; 884 m->sg_v = SG_V; 885 m->sg_frame = SG_FRAME; 886 m->sg_ishift = SG_ISHIFT; 887 m->sg_pmask = SG_PMASK; 888 m->sg40_shift1 = SG4_SHIFT1; 889 m->sg40_mask2 = SG4_MASK2; 890 m->sg40_shift2 = SG4_SHIFT2; 891 m->sg40_mask3 = SG4_MASK3; 892 m->sg40_shift3 = SG4_SHIFT3; 893 m->sg40_addr1 = SG4_ADDR1; 894 m->sg40_addr2 = SG4_ADDR2; 895 m->pg_v = PG_V; 896 m->pg_frame = PG_FRAME; 897 898 /* 899 * Initialize pointer to kernel segment table. 900 */ 901 m->sysseg_pa = sysseg_pa; /* PA after relocation */ 902 903 /* 904 * Initialize relocation value such that: 905 * 906 * pa = (va - KERNBASE) + reloc 907 */ 908 m->reloc = kbase; 909 910 /* 911 * Define the end of the relocatable range. 912 */ 913 m->relocend = (vaddr_t)end; 914 915 for (i = 0; i < NMEM_SEGS; i++) { 916 m->ram_segs[i].start = boot_segs[i].start; 917 m->ram_segs[i].size = boot_segs[i].end - 918 boot_segs[i].start; 919 } 920 } 921 922 void 923 mmu030_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 924 paddr_t sysptmap_pa, paddr_t kbase) 925 /* sysseg_pa: System segment table */ 926 /* kstsize: size of 'sysseg' in pages */ 927 /* ptpa: Kernel page table */ 928 /* ptsize: size of 'pt' in bytes */ 929 /* sysptmap_pa: System page table */ 930 { 931 st_entry_t sg_proto, *sg, *esg; 932 pt_entry_t pg_proto, *pg, *epg; 933 934 /* 935 * Map the page table pages in both the HW segment table 936 * and the software Sysptmap. 937 */ 938 sg = (st_entry_t *)sysseg_pa; 939 pg = (pt_entry_t *)sysptmap_pa; 940 epg = &pg[ptsize >> PGSHIFT]; 941 sg_proto = RELOC_PA(kbase, ptpa) | SG_RW | SG_V; 942 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 943 while (pg < epg) { 944 *sg++ = sg_proto; 945 *pg++ = pg_proto; 946 sg_proto += PAGE_SIZE; 947 pg_proto += PAGE_SIZE; 948 } 949 950 /* 951 * Invalidate the remainder of the tables. 952 */ 953 esg = (st_entry_t *)sysseg_pa; 954 esg = &esg[TIA_SIZE]; 955 while (sg < esg) 956 *sg++ = SG_NV; 957 epg = (pt_entry_t *)sysptmap_pa; 958 epg = &epg[TIB_SIZE]; 959 while (pg < epg) 960 *pg++ = PG_NV; 961 962 /* 963 * Initialize the PTE for the last one to point Sysptmap. 964 */ 965 sg = (st_entry_t *)sysseg_pa; 966 sg = &sg[SYSMAP_VA >> SEGSHIFT]; 967 pg = (pt_entry_t *)sysptmap_pa; 968 pg = &pg[SYSMAP_VA >> SEGSHIFT]; 969 *sg = RELOC_PA(kbase, sysptmap_pa) | SG_RW | SG_V; 970 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 971 } 972 973 #if defined(M68040) || defined(M68060) 974 void 975 mmu040_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 976 paddr_t sysptmap_pa, paddr_t kbase) 977 /* sysseg_pa: System segment table */ 978 /* kstsize: size of 'sysseg' in pages */ 979 /* ptpa: Kernel page table */ 980 /* ptsize: size of 'pt' in bytes */ 981 /* sysptmap_pa: System page table */ 982 { 983 int nl1desc, nl2desc, i; 984 st_entry_t sg_proto, *sg, *esg; 985 pt_entry_t pg_proto, *pg, *epg; 986 987 /* 988 * First invalidate the entire "segment table" pages 989 * (levels 1 and 2 have the same "invalid" values). 990 */ 991 sg = (st_entry_t *)sysseg_pa; 992 esg = &sg[kstsize * NPTEPG]; 993 while (sg < esg) 994 *sg++ = SG_NV; 995 996 /* 997 * Initialize level 2 descriptors (which immediately 998 * follow the level 1 table). 999 * We need: 1000 * NPTEPG / SG4_LEV3SIZE 1001 * level 2 descriptors to map each of the nptpages 1002 * pages of PTEs. Note that we set the "used" bit 1003 * now to save the HW the expense of doing it. 1004 */ 1005 nl2desc = (ptsize >> PGSHIFT) * (NPTEPG / SG4_LEV3SIZE); 1006 sg = (st_entry_t *)sysseg_pa; 1007 sg = &sg[SG4_LEV1SIZE]; 1008 esg = &sg[nl2desc]; 1009 sg_proto = RELOC_PA(kbase, ptpa) | SG_U | SG_RW | SG_V; 1010 while (sg < esg) { 1011 *sg++ = sg_proto; 1012 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1013 } 1014 1015 /* 1016 * Initialize level 1 descriptors. We need: 1017 * howmany(nl2desc, SG4_LEV2SIZE) 1018 * level 1 descriptors to map the 'nl2desc' level 2's. 1019 */ 1020 nl1desc = howmany(nl2desc, SG4_LEV2SIZE); 1021 sg = (st_entry_t *)sysseg_pa; 1022 esg = &sg[nl1desc]; 1023 sg_proto = RELOC_PA(kbase, (paddr_t)&sg[SG4_LEV1SIZE]) 1024 | SG_U | SG_RW | SG_V; 1025 while (sg < esg) { 1026 *sg++ = sg_proto; 1027 sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t)); 1028 } 1029 1030 /* Sysmap is last entry in level 1 */ 1031 sg = (st_entry_t *)sysseg_pa; 1032 sg = &sg[SG4_LEV1SIZE - 1]; 1033 *sg = sg_proto; 1034 1035 /* 1036 * Kernel segment table at end of next level 2 table 1037 */ 1038 i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE); 1039 sg = (st_entry_t *)sysseg_pa; 1040 sg = &sg[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)]; 1041 esg = &sg[NPTEPG / SG4_LEV3SIZE]; 1042 sg_proto = RELOC_PA(kbase, sysptmap_pa) | SG_U | SG_RW | SG_V; 1043 while (sg < esg) { 1044 *sg++ = sg_proto; 1045 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1046 } 1047 1048 /* Include additional level 2 table for Sysmap in protostfree */ 1049 protostfree = (~0 << (1 + nl1desc + 1)) /* & ~(~0 << MAXKL2SIZE) */; 1050 1051 /* 1052 * Initialize Sysptmap 1053 */ 1054 pg = (pt_entry_t *)sysptmap_pa; 1055 epg = &pg[ptsize >> PGSHIFT]; 1056 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 1057 while (pg < epg) { 1058 *pg++ = pg_proto; 1059 pg_proto += PAGE_SIZE; 1060 } 1061 1062 /* 1063 * Invalidate rest of Sysptmap page. 1064 */ 1065 epg = (pt_entry_t *)sysptmap_pa; 1066 epg = &epg[TIB_SIZE]; 1067 while (pg < epg) 1068 *pg++ = PG_NV; 1069 1070 /* 1071 * Initialize the PTE for the last one to point Sysptmap. 1072 */ 1073 pg = (pt_entry_t *)sysptmap_pa; 1074 pg = &pg[SYSMAP_VA >> SEGSHIFT]; 1075 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 1076 } 1077 #endif /* M68040 */ 1078 1079 #if defined(M68060) 1080 int m68060_pcr_init = 0x21; /* make this patchable */ 1081 #endif 1082 1083 static void 1084 initcpu(void) 1085 { 1086 typedef void trapfun(void); 1087 1088 switch (cputype) { 1089 1090 #if defined(M68060) 1091 case CPU_68060: 1092 { 1093 extern trapfun *vectab[256]; 1094 extern trapfun buserr60, addrerr4060, fpfault; 1095 #if defined(M060SP) 1096 extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[]; 1097 #else 1098 extern trapfun illinst; 1099 #endif 1100 1101 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : : 1102 "d"(m68060_pcr_init):"d0" ); 1103 1104 /* bus/addrerr vectors */ 1105 vectab[2] = buserr60; 1106 vectab[3] = addrerr4060; 1107 1108 #if defined(M060SP) 1109 /* integer support */ 1110 vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00]; 1111 1112 /* floating point support */ 1113 /* 1114 * XXX maybe we really should run-time check for the 1115 * stack frame format here: 1116 */ 1117 vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30]; 1118 1119 vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38]; 1120 vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40]; 1121 1122 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; 1123 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; 1124 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; 1125 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; 1126 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; 1127 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; 1128 #else 1129 vectab[61] = illinst; 1130 #endif 1131 vectab[48] = fpfault; 1132 } 1133 break; 1134 #endif /* defined(M68060) */ 1135 #if defined(M68040) 1136 case CPU_68040: 1137 { 1138 extern trapfun *vectab[256]; 1139 extern trapfun buserr40, addrerr4060; 1140 1141 /* bus/addrerr vectors */ 1142 vectab[2] = buserr40; 1143 vectab[3] = addrerr4060; 1144 } 1145 break; 1146 #endif /* defined(M68040) */ 1147 #if defined(M68030) || defined(M68020) 1148 case CPU_68030: 1149 case CPU_68020: 1150 { 1151 extern trapfun *vectab[256]; 1152 extern trapfun buserr2030, addrerr2030; 1153 1154 /* bus/addrerr vectors */ 1155 vectab[2] = buserr2030; 1156 vectab[3] = addrerr2030; 1157 } 1158 break; 1159 #endif /* defined(M68030) || defined(M68020) */ 1160 } 1161 1162 DCIS(); 1163 } 1164 1165 #ifdef DEBUG 1166 void dump_segtable(u_int *); 1167 void dump_pagetable(u_int *, u_int, u_int); 1168 u_int vmtophys(u_int *, u_int); 1169 1170 void 1171 dump_segtable(u_int *stp) 1172 { 1173 u_int *s, *es; 1174 int shift, i; 1175 1176 s = stp; 1177 { 1178 es = s + (M68K_STSIZE >> 2); 1179 shift = SG_ISHIFT; 1180 } 1181 1182 /* 1183 * XXX need changes for 68040 1184 */ 1185 for (i = 0; s < es; s++, i++) 1186 if (*s & SG_V) 1187 printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME); 1188 printf("\n"); 1189 } 1190 1191 void 1192 dump_pagetable(u_int *ptp, u_int i, u_int n) 1193 { 1194 u_int *p, *ep; 1195 1196 p = ptp + i; 1197 ep = p + n; 1198 for (; p < ep; p++, i++) 1199 if (*p & PG_V) 1200 printf("$%08x -> $%08x\t", i, *p & PG_FRAME); 1201 printf("\n"); 1202 } 1203 1204 u_int 1205 vmtophys(u_int *ste, u_int vm) 1206 { 1207 1208 ste = (u_int *)(*(ste + (vm >> SEGSHIFT)) & SG_FRAME); 1209 ste += (vm & SG_PMASK) >> PGSHIFT; 1210 return (*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1)); 1211 } 1212 1213 #endif 1214