1 /* $NetBSD: atari_init.c,v 1.94 2010/06/06 04:50:06 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Leo Weppelman 5 * Copyright (c) 1994 Michael L. Hitch 6 * Copyright (c) 1993 Markus Wild 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Markus Wild. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.94 2010/06/06 04:50:06 mrg Exp $"); 37 38 #include "opt_ddb.h" 39 #include "opt_mbtype.h" 40 #include "opt_m060sp.h" 41 #include "opt_m68k_arch.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/ioctl.h> 46 #include <sys/select.h> 47 #include <sys/tty.h> 48 #include <sys/buf.h> 49 #include <sys/msgbuf.h> 50 #include <sys/mbuf.h> 51 #include <sys/extent.h> 52 #include <sys/protosw.h> 53 #include <sys/domain.h> 54 #include <sys/dkbad.h> 55 #include <sys/reboot.h> 56 #include <sys/exec.h> 57 #include <sys/exec_aout.h> 58 #include <sys/core.h> 59 #include <sys/kcore.h> 60 61 #include <uvm/uvm_extern.h> 62 63 #include <machine/vmparam.h> 64 #include <machine/pte.h> 65 #include <machine/cpu.h> 66 #include <machine/iomap.h> 67 #include <machine/mfp.h> 68 #include <machine/scu.h> 69 #include <machine/acia.h> 70 #include <machine/kcore.h> 71 #include <machine/intr.h> 72 73 #include <m68k/cpu.h> 74 #include <m68k/cacheops.h> 75 76 #include <atari/atari/stalloc.h> 77 #include <atari/dev/clockvar.h> 78 #include <atari/dev/ym2149reg.h> 79 80 #include "pci.h" 81 82 void start_c(int, u_int, u_int, u_int, char *); 83 static void atari_hwinit(void); 84 static void cpu_init_kcorehdr(paddr_t, paddr_t); 85 static void initcpu(void); 86 static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 87 static void map_io_areas(paddr_t, psize_t, u_int); 88 static void set_machtype(void); 89 90 #if defined(M68040) || defined(M68060) 91 static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 92 #endif 93 94 /* 95 * Extent maps to manage all memory space, including I/O ranges. Allocate 96 * storage for 8 regions in each, initially. Later, iomem_malloc_safe 97 * will indicate that it's safe to use malloc() to dynamically allocate 98 * region descriptors. 99 * This means that the fixed static storage is only used for registrating 100 * the found memory regions and the bus-mapping of the console. 101 * 102 * The extent maps are not static! They are used for bus address space 103 * allocation. 104 */ 105 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 106 struct extent *iomem_ex; 107 int iomem_malloc_safe; 108 109 /* 110 * All info needed to generate a panic dump. All fields are setup by 111 * start_c(). 112 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap 113 * here.... Also, the name is badly choosen. Phys_segs contains the 114 * segment descriptions _after_ reservations are made. 115 * XXX: 'lowram' is obsoleted by the new panicdump format 116 */ 117 static cpu_kcore_hdr_t cpu_kcore_hdr; 118 119 extern u_int lowram; 120 int machineid, mmutype, cputype, astpending; 121 122 extern char *esym; 123 extern struct pcb *curpcb; 124 125 /* 126 * This is the virtual address of physical page 0. Used by 'do_boot()'. 127 */ 128 vaddr_t page_zero; 129 130 /* 131 * Crude support for allocation in ST-ram. Currently only used to allocate 132 * video ram. 133 * The physical address is also returned because the video init needs it to 134 * setup the controller at the time the vm-system is not yet operational so 135 * 'kvtop()' cannot be used. 136 */ 137 #ifndef ST_POOL_SIZE 138 #define ST_POOL_SIZE 40 /* XXX: enough? */ 139 #endif 140 141 u_long st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable */ 142 u_long st_pool_virt, st_pool_phys; 143 144 /* 145 * Are we relocating the kernel to TT-Ram if possible? It is faster, but 146 * it is also reported not to work on all TT's. So the default is NO. 147 */ 148 #ifndef RELOC_KERNEL 149 #define RELOC_KERNEL 0 150 #endif 151 int reloc_kernel = RELOC_KERNEL; /* Patchable */ 152 153 #define RELOC_PA(base, pa) ((base) + (pa)) /* used to set up PTE etc. */ 154 155 /* 156 * this is the C-level entry function, it's called from locore.s. 157 * Preconditions: 158 * Interrupts are disabled 159 * PA == VA, we don't have to relocate addresses before enabling 160 * the MMU 161 * Exec is no longer available (because we're loaded all over 162 * low memory, no ExecBase is available anymore) 163 * 164 * It's purpose is: 165 * Do the things that are done in locore.s in the hp300 version, 166 * this includes allocation of kernel maps and enabling the MMU. 167 * 168 * Some of the code in here is `stolen' from Amiga MACH, and was 169 * written by Bryan Ford and Niklas Hallqvist. 170 * 171 * Very crude 68040 support by Michael L. Hitch. 172 */ 173 int kernel_copyback = 1; 174 175 void 176 start_c(int id, u_int ttphystart, u_int ttphysize, u_int stphysize, 177 char *esym_addr) 178 /* id: Machine id */ 179 /* ttphystart, ttphysize: Start address and size of TT-ram */ 180 /* stphysize: Size of ST-ram */ 181 /* esym_addr: Address of kernel '_esym' symbol */ 182 { 183 extern char end[]; 184 extern void etext(void); 185 extern u_long protorp[2]; 186 paddr_t pstart; /* Next available physical address */ 187 vaddr_t vstart; /* Next available virtual address */ 188 vsize_t avail; 189 paddr_t ptpa; 190 psize_t ptsize; 191 u_int ptextra; 192 vaddr_t kva; 193 u_int tc, i; 194 pt_entry_t *pg, *epg; 195 pt_entry_t pg_proto; 196 vaddr_t end_loaded; 197 paddr_t kbase; 198 u_int kstsize; 199 paddr_t Sysptmap_pa; 200 201 #if defined(_MILANHW_) 202 /* XXX 203 * XXX The right place todo this is probably the booter (Leo) 204 * XXX More than 16MB memory is not yet supported on the Milan! 205 * The Milan Lies about the presence of TT-RAM. If you insert 206 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM, 207 * starting at address 16MB. 208 */ 209 stphysize += ttphysize; 210 ttphysize = ttphystart = 0; 211 #endif 212 boot_segs[0].start = 0; 213 boot_segs[0].end = stphysize; 214 boot_segs[1].start = ttphystart; 215 boot_segs[1].end = ttphystart + ttphysize; 216 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */ 217 218 /* 219 * The following is a hack. We do not know how much ST memory we 220 * really need until after configuration has finished. At this 221 * time I have no idea how to grab ST memory at that time. 222 * The round_page() call is ment to correct errors made by 223 * binpatching! 224 */ 225 st_pool_size = m68k_round_page(st_pool_size); 226 st_pool_phys = stphysize - st_pool_size; 227 stphysize = st_pool_phys; 228 229 machineid = id; 230 esym = esym_addr; 231 232 /* 233 * the kernel ends at end() or esym. 234 */ 235 if (esym == NULL) 236 end_loaded = (vaddr_t)&end; 237 else 238 end_loaded = (vaddr_t)esym; 239 240 /* 241 * If we have enough fast-memory to put the kernel in and the 242 * RELOC_KERNEL option is set, do it! 243 */ 244 if ((reloc_kernel != 0) && (ttphysize >= end_loaded)) 245 kbase = ttphystart; 246 else 247 kbase = 0; 248 249 /* 250 * Determine the type of machine we are running on. This needs 251 * to be done early (and before initcpu())! 252 */ 253 set_machtype(); 254 255 /* 256 * Initialize CPU specific stuff 257 */ 258 initcpu(); 259 260 /* 261 * We run the kernel from ST memory at the moment. 262 * The kernel segment table is put just behind the loaded image. 263 * pstart: start of usable ST memory 264 * avail : size of ST memory available. 265 */ 266 vstart = (vaddr_t)end_loaded; 267 vstart = m68k_round_page(vstart); 268 pstart = (paddr_t)vstart; /* pre-reloc PA == kernel VA here */ 269 avail = stphysize - pstart; 270 271 /* 272 * Save KVA of lwp0 uarea and allocate it. 273 */ 274 lwp0uarea = vstart; 275 pstart += USPACE; 276 vstart += USPACE; 277 avail -= USPACE; 278 279 /* 280 * Calculate the number of pages needed for Sysseg. 281 * For the 68030, we need 256 descriptors (segment-table-entries). 282 * This easily fits into one page. 283 * For the 68040, both the level-1 and level-2 descriptors are 284 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE 285 * level-1 & level-2 tables. 286 */ 287 #if defined(M68040) || defined(M68060) 288 if (mmutype == MMU_68040) 289 kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); 290 else 291 #endif 292 kstsize = 1; 293 /* 294 * allocate the kernel segment table 295 */ 296 Sysseg_pa = pstart; /* pre-reloc PA to init STEs */ 297 Sysseg = (st_entry_t *)vstart; 298 pstart += kstsize * PAGE_SIZE; 299 vstart += kstsize * PAGE_SIZE; 300 avail -= kstsize * PAGE_SIZE; 301 302 /* 303 * allocate kernel page table map 304 */ 305 Sysptmap_pa = pstart; /* pre-reloc PA to init PTEs */ 306 Sysptmap = (pt_entry_t *)vstart; 307 pstart += PAGE_SIZE; 308 vstart += PAGE_SIZE; 309 avail -= PAGE_SIZE; 310 311 /* 312 * Determine the number of pte's we need for extra's like 313 * ST I/O map's. 314 */ 315 ptextra = btoc(STIO_SIZE); 316 317 /* 318 * If present, add pci areas 319 */ 320 if (machineid & ATARI_HADES) 321 ptextra += btoc(PCI_CONFIG_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE); 322 if (machineid & ATARI_MILAN) 323 ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE); 324 ptextra += btoc(BOOTM_VA_POOL); 325 326 /* 327 * The 'pt' (the initial kernel pagetable) has to map the kernel and 328 * the I/O areas. The various I/O areas are mapped (virtually) at 329 * the top of the address space mapped by 'pt' (ie. just below Sysmap). 330 */ 331 ptpa = pstart; /* pre-reloc PA to init PTEs */ 332 ptsize = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT; 333 pstart += ptsize; 334 vstart += ptsize; 335 avail -= ptsize; 336 337 /* 338 * Sysmap is now placed at the end of Supervisor virtual address space. 339 */ 340 Sysmap = (pt_entry_t *)SYSMAP_VA; 341 342 /* 343 * Initialize segment tables 344 */ 345 #if defined(M68040) || defined(M68060) 346 if (mmutype == MMU_68040) 347 mmu040_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 348 kbase); 349 else 350 #endif /* defined(M68040) || defined(M68060) */ 351 mmu030_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 352 kbase); 353 354 /* 355 * initialize kernel page table page(s). 356 * Assume load at VA 0. 357 * - Text pages are RO 358 * - Page zero is invalid 359 */ 360 pg_proto = RELOC_PA(kbase, 0) | PG_RO | PG_V; 361 pg = (pt_entry_t *)ptpa; 362 *pg++ = PG_NV; 363 364 pg_proto += PAGE_SIZE; 365 for (kva = PAGE_SIZE; kva < (vaddr_t)etext; kva += PAGE_SIZE) { 366 *pg++ = pg_proto; 367 pg_proto += PAGE_SIZE; 368 } 369 370 /* 371 * data, bss and dynamic tables are read/write 372 */ 373 pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V; 374 375 #if defined(M68040) || defined(M68060) 376 /* 377 * Map the kernel segment table cache invalidated for 378 * these machines (for the 68040 not strictly necessary, but 379 * recommended by Motorola; for the 68060 mandatory) 380 */ 381 if (mmutype == MMU_68040) { 382 383 if (kernel_copyback) 384 pg_proto |= PG_CCB; 385 386 for (; kva < (vaddr_t)Sysseg; kva += PAGE_SIZE) { 387 *pg++ = pg_proto; 388 pg_proto += PAGE_SIZE; 389 } 390 391 pg_proto = (pg_proto & ~PG_CCB) | PG_CI; 392 for (; kva < (vaddr_t)Sysptmap; kva += PAGE_SIZE) { 393 *pg++ = pg_proto; 394 pg_proto += PAGE_SIZE; 395 } 396 397 pg_proto = (pg_proto & ~PG_CI); 398 if (kernel_copyback) 399 pg_proto |= PG_CCB; 400 } 401 #endif /* defined(M68040) || defined(M68060) */ 402 403 /* 404 * go till end of data allocated so far 405 * plus lwp0 u-area (to be allocated) 406 */ 407 for (; kva < vstart; kva += PAGE_SIZE) { 408 *pg++ = pg_proto; 409 pg_proto += PAGE_SIZE; 410 } 411 412 /* 413 * invalidate remainder of kernel PT 414 */ 415 epg = (pt_entry_t *)ptpa; 416 epg = &epg[ptsize / sizeof(pt_entry_t)]; 417 while (pg < epg) 418 *pg++ = PG_NV; 419 420 /* 421 * Map various I/O areas 422 */ 423 map_io_areas(ptpa, ptsize, ptextra); 424 425 /* 426 * Map the allocated space in ST-ram now. In the contig-case, there 427 * is no need to make a distinction between virtual and physical 428 * addresses. But I make it anyway to be prepared. 429 * Physcal space is already reserved! 430 */ 431 st_pool_virt = vstart; 432 pg = (pt_entry_t *)ptpa; 433 pg = &pg[vstart / PAGE_SIZE]; 434 pg_proto = st_pool_phys | PG_RW | PG_CI | PG_V; 435 vstart += st_pool_size; 436 while (pg_proto < (st_pool_phys + st_pool_size)) { 437 *pg++ = pg_proto; 438 pg_proto += PAGE_SIZE; 439 } 440 441 /* 442 * Map physical page_zero and page-zero+1 (First ST-ram page). We need 443 * to reference it in the reboot code. Two pages are mapped, because 444 * we must make sure 'doboot()' is contained in it (see the tricky 445 * copying there....). 446 */ 447 page_zero = vstart; 448 pg = (pt_entry_t *)ptpa; 449 pg = &pg[vstart / PAGE_SIZE]; 450 *pg++ = PG_RW | PG_CI | PG_V; 451 vstart += PAGE_SIZE; 452 *pg = PG_RW | PG_CI | PG_V | PAGE_SIZE; 453 vstart += PAGE_SIZE; 454 455 /* 456 * All necessary STEs and PTEs have been initialized. 457 * Update Sysseg_pa and Sysptmap_pa to point relocated PA. 458 */ 459 if (kbase) { 460 Sysseg_pa += kbase; 461 Sysptmap_pa += kbase; 462 } 463 464 lowram = 0 >> PGSHIFT; /* XXX */ 465 466 /* 467 * Fill in usable segments. The page indexes will be initialized 468 * later when all reservations are made. 469 */ 470 usable_segs[0].start = 0; 471 usable_segs[0].end = stphysize; 472 usable_segs[0].free_list = VM_FREELIST_STRAM; 473 usable_segs[1].start = ttphystart; 474 usable_segs[1].end = ttphystart + ttphysize; 475 usable_segs[1].free_list = VM_FREELIST_TTRAM; 476 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */ 477 478 if (kbase) { 479 /* 480 * First page of ST-ram is unusable, reserve the space 481 * for the kernel in the TT-ram segment. 482 * Note: Because physical page-zero is partially mapped to ROM 483 * by hardware, it is unusable. 484 */ 485 usable_segs[0].start = PAGE_SIZE; 486 usable_segs[1].start += pstart; 487 } else 488 usable_segs[0].start += pstart; 489 490 /* 491 * As all segment sizes are now valid, calculate page indexes and 492 * available physical memory. 493 */ 494 usable_segs[0].first_page = 0; 495 for (i = 1; usable_segs[i].start; i++) { 496 usable_segs[i].first_page = usable_segs[i-1].first_page; 497 usable_segs[i].first_page += 498 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE; 499 } 500 for (i = 0, physmem = 0; usable_segs[i].start; i++) 501 physmem += usable_segs[i].end - usable_segs[i].start; 502 physmem >>= PGSHIFT; 503 504 /* 505 * get the pmap module in sync with reality. 506 */ 507 pmap_bootstrap(vstart); 508 509 /* 510 * Prepare to enable the MMU. 511 * Setup and load SRP nolimit, share global, 4 byte PTE's 512 */ 513 protorp[0] = 0x80000202; 514 protorp[1] = Sysseg_pa; /* + segtable address */ 515 516 cpu_init_kcorehdr(kbase, Sysseg_pa); 517 518 /* 519 * copy over the kernel (and all now initialized variables) 520 * to fastram. DONT use bcopy(), this beast is much larger 521 * than 128k ! 522 */ 523 if (kbase) { 524 register paddr_t *lp, *le, *fp; 525 526 lp = (paddr_t *)0; 527 le = (paddr_t *)pstart; 528 fp = (paddr_t *)kbase; 529 while (lp < le) 530 *fp++ = *lp++; 531 } 532 #if defined(M68040) || defined(M68060) 533 if (mmutype == MMU_68040) { 534 /* 535 * movel Sysseg_pa,a0; 536 * movec a0,SRP; 537 * pflusha; 538 * movel #$0xc000,d0; 539 * movec d0,TC 540 */ 541 if (cputype == CPU_68060) { 542 /* XXX: Need the branch cache be cleared? */ 543 __asm volatile (".word 0x4e7a,0x0002;" 544 "orl #0x400000,%%d0;" 545 ".word 0x4e7b,0x0002" : : : "d0"); 546 } 547 __asm volatile ("movel %0,%%a0;" 548 ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0"); 549 __asm volatile (".word 0xf518" : : ); 550 __asm volatile ("movel #0xc000,%%d0;" 551 ".word 0x4e7b,0x0003" : : : "d0" ); 552 } else 553 #endif 554 { 555 __asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0])); 556 /* 557 * setup and load TC register. 558 * enable_cpr, enable_srp, pagesize=8k, 559 * A = 8 bits, B = 11 bits 560 */ 561 tc = 0x82d08b00; 562 __asm volatile ("pmove %0@,%%tc" : : "a" (&tc)); 563 } 564 565 /* 566 * Initialize the "u-area" pages etc. 567 */ 568 pmap_bootstrap_finalize(); 569 570 /* 571 * Get the hardware into a defined state 572 */ 573 atari_hwinit(); 574 575 /* 576 * Initialize stmem allocator 577 */ 578 init_stmem(); 579 580 /* 581 * Initialize the I/O mem extent map. 582 * Note: we don't have to check the return value since 583 * creation of a fixed extent map will never fail (since 584 * descriptor storage has already been allocated). 585 * 586 * N.B. The iomem extent manages _all_ physical addresses 587 * on the machine. When the amount of RAM is found, all 588 * extents of RAM are allocated from the map. 589 */ 590 iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF, 591 (void *)iomem_ex_storage, sizeof(iomem_ex_storage), 592 EX_NOCOALESCE|EX_NOWAIT); 593 594 /* 595 * Allocate the physical RAM from the extent map 596 */ 597 for (i = 0; boot_segs[i].end != 0; i++) { 598 if (extent_alloc_region(iomem_ex, boot_segs[i].start, 599 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) { 600 /* XXX: Ahum, should not happen ;-) */ 601 printf("Warning: Cannot allocate boot memory from" 602 " extent map!?\n"); 603 } 604 } 605 606 /* 607 * Initialize interrupt mapping. 608 */ 609 intr_init(); 610 } 611 612 /* 613 * Try to figure out on what type of machine we are running 614 * Note: This module runs *before* the io-mapping is setup! 615 */ 616 static void 617 set_machtype(void) 618 { 619 620 #ifdef _MILANHW_ 621 machineid |= ATARI_MILAN; 622 623 #else 624 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */ 625 if (badbaddr((void *)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) { 626 /* 627 * Watch out! We can also have a Hades with < 16Mb 628 * RAM here... 629 */ 630 if (!badbaddr((void *)__UNVOLATILE(&MFP->mf_gpip), 631 sizeof(char))) { 632 machineid |= ATARI_FALCON; 633 return; 634 } 635 } 636 if (!badbaddr((void *)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char))) 637 machineid |= ATARI_HADES; 638 else 639 machineid |= ATARI_TT; 640 #endif /* _MILANHW_ */ 641 } 642 643 static void 644 atari_hwinit(void) 645 { 646 647 #if defined(_ATARIHW_) 648 /* 649 * Initialize the sound chip 650 */ 651 ym2149_init(); 652 653 /* 654 * Make sure that the midi acia will not generate an interrupt 655 * unless something attaches to it. We cannot do this for the 656 * keyboard acia because this breaks the '-d' option of the 657 * booter... 658 */ 659 MDI->ac_cs = 0; 660 #endif /* defined(_ATARIHW_) */ 661 662 /* 663 * Initialize both MFP chips (if both present!) to generate 664 * auto-vectored interrupts with EOI. The active-edge registers are 665 * set up. The interrupt enable registers are set to disable all 666 * interrupts. 667 */ 668 MFP->mf_iera = MFP->mf_ierb = 0; 669 MFP->mf_imra = MFP->mf_imrb = 0; 670 MFP->mf_aer = MFP->mf_ddr = 0; 671 MFP->mf_vr = 0x40; 672 673 #if defined(_ATARIHW_) 674 if (machineid & (ATARI_TT|ATARI_HADES)) { 675 MFP2->mf_iera = MFP2->mf_ierb = 0; 676 MFP2->mf_imra = MFP2->mf_imrb = 0; 677 MFP2->mf_aer = 0x80; 678 MFP2->mf_vr = 0x50; 679 } 680 681 if (machineid & ATARI_TT) { 682 /* 683 * Initialize the SCU, to enable interrupts on the SCC (ipl5), 684 * MFP (ipl6) and softints (ipl1). 685 */ 686 SCU->sys_mask = SCU_SYS_SOFT; 687 SCU->vme_mask = SCU_MFP | SCU_SCC; 688 #ifdef DDB 689 /* 690 * This allows people with the correct hardware modification 691 * to drop into the debugger from an NMI. 692 */ 693 SCU->sys_mask |= SCU_IRQ7; 694 #endif 695 } 696 #endif /* defined(_ATARIHW_) */ 697 698 /* 699 * Initialize a timer for delay(9). 700 */ 701 init_delay(); 702 703 #if NPCI > 0 704 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 705 /* 706 * Configure PCI-bus 707 */ 708 init_pci_bus(); 709 } 710 #endif 711 712 } 713 714 /* 715 * Do the dull work of mapping the various I/O areas. They MUST be Cache 716 * inhibited! 717 * All I/O areas are virtually mapped at the end of the pt-table. 718 */ 719 static void 720 map_io_areas(paddr_t ptpa, psize_t ptsize, u_int ptextra) 721 /* ptsize: Size of 'pt' in bytes */ 722 /* ptextra: #of additional I/O pte's */ 723 { 724 extern void bootm_init(vaddr_t, pt_entry_t *, u_long); 725 vaddr_t ioaddr; 726 pt_entry_t *pt, *pg, *epg; 727 pt_entry_t pg_proto; 728 u_long mask; 729 730 pt = (pt_entry_t *)ptpa; 731 ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE; 732 733 /* 734 * Map ST-IO area 735 */ 736 stio_addr = ioaddr; 737 ioaddr += STIO_SIZE; 738 pg = &pt[stio_addr / PAGE_SIZE]; 739 epg = &pg[btoc(STIO_SIZE)]; 740 #ifdef _MILANHW_ 741 /* 742 * Turn on byte swaps in the ST I/O area. On the Milan, the 743 * U0 signal of the MMU controls the BigEndian signal 744 * of the PLX9080. We use this setting so we can read/write the 745 * PLX registers (and PCI-config space) in big-endian mode. 746 */ 747 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100; 748 #else 749 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V; 750 #endif 751 while (pg < epg) { 752 *pg++ = pg_proto; 753 pg_proto += PAGE_SIZE; 754 } 755 756 /* 757 * Map PCI areas 758 */ 759 if (machineid & ATARI_HADES) { 760 /* 761 * Only Hades maps the PCI-config space! 762 */ 763 pci_conf_addr = ioaddr; 764 ioaddr += PCI_CONFIG_SIZE; 765 pg = &pt[pci_conf_addr / PAGE_SIZE]; 766 epg = &pg[btoc(PCI_CONFIG_SIZE)]; 767 mask = PCI_CONFM_PHYS; 768 pg_proto = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V; 769 for (; pg < epg; mask <<= 1) 770 *pg++ = pg_proto | mask; 771 } else 772 pci_conf_addr = 0; /* XXX: should crash */ 773 774 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 775 pci_io_addr = ioaddr; 776 ioaddr += PCI_IO_SIZE; 777 pg = &pt[pci_io_addr / PAGE_SIZE]; 778 epg = &pg[btoc(PCI_IO_SIZE)]; 779 pg_proto = PCI_IO_PHYS | PG_RW | PG_CI | PG_V; 780 while (pg < epg) { 781 *pg++ = pg_proto; 782 pg_proto += PAGE_SIZE; 783 } 784 785 pci_mem_addr = ioaddr; 786 /* Provide an uncached PCI address for the MILAN */ 787 pci_mem_uncached = ioaddr; 788 ioaddr += PCI_MEM_SIZE; 789 epg = &pg[btoc(PCI_MEM_SIZE)]; 790 pg_proto = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V; 791 while (pg < epg) { 792 *pg++ = pg_proto; 793 pg_proto += PAGE_SIZE; 794 } 795 } 796 797 bootm_init(ioaddr, pg, BOOTM_VA_POOL); 798 /* 799 * ioaddr += BOOTM_VA_POOL; 800 * pg = &pg[btoc(BOOTM_VA_POOL)]; 801 */ 802 } 803 804 /* 805 * Used by dumpconf() to get the size of the machine-dependent panic-dump 806 * header in disk blocks. 807 */ 808 809 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t))) 810 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1)) 811 812 int 813 cpu_dumpsize(void) 814 { 815 816 return btodb(MDHDRSIZE); 817 } 818 819 /* 820 * Called by dumpsys() to dump the machine-dependent header. 821 * XXX: Assumes that it will all fit in one diskblock. 822 */ 823 int 824 cpu_dump(int (*dump)(dev_t, daddr_t, void *, size_t), daddr_t *p_blkno) 825 { 826 int buf[MDHDRSIZE/sizeof(int)]; 827 int error; 828 kcore_seg_t *kseg_p; 829 cpu_kcore_hdr_t *chdr_p; 830 831 kseg_p = (kcore_seg_t *)buf; 832 chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)]; 833 834 /* 835 * Generate a segment header 836 */ 837 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU); 838 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p)); 839 840 /* 841 * Add the md header 842 */ 843 *chdr_p = cpu_kcore_hdr; 844 error = dump(dumpdev, *p_blkno, (void *)buf, sizeof(buf)); 845 *p_blkno += btodb(sizeof(buf)); 846 return (error); 847 } 848 849 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS) 850 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS" 851 #endif 852 /* 853 * Initialize the cpu_kcore_header. 854 */ 855 static void 856 cpu_init_kcorehdr(paddr_t kbase, paddr_t sysseg_pa) 857 { 858 cpu_kcore_hdr_t *h = &cpu_kcore_hdr; 859 struct m68k_kcore_hdr *m = &h->un._m68k; 860 extern char end[]; 861 int i; 862 863 memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr)); 864 865 /* 866 * Initialize the `dispatcher' portion of the header. 867 */ 868 strcpy(h->name, machine); 869 h->page_size = PAGE_SIZE; 870 h->kernbase = KERNBASE; 871 872 /* 873 * Fill in information about our MMU configuration. 874 */ 875 m->mmutype = mmutype; 876 m->sg_v = SG_V; 877 m->sg_frame = SG_FRAME; 878 m->sg_ishift = SG_ISHIFT; 879 m->sg_pmask = SG_PMASK; 880 m->sg40_shift1 = SG4_SHIFT1; 881 m->sg40_mask2 = SG4_MASK2; 882 m->sg40_shift2 = SG4_SHIFT2; 883 m->sg40_mask3 = SG4_MASK3; 884 m->sg40_shift3 = SG4_SHIFT3; 885 m->sg40_addr1 = SG4_ADDR1; 886 m->sg40_addr2 = SG4_ADDR2; 887 m->pg_v = PG_V; 888 m->pg_frame = PG_FRAME; 889 890 /* 891 * Initialize pointer to kernel segment table. 892 */ 893 m->sysseg_pa = sysseg_pa; /* PA after relocation */ 894 895 /* 896 * Initialize relocation value such that: 897 * 898 * pa = (va - KERNBASE) + reloc 899 */ 900 m->reloc = kbase; 901 902 /* 903 * Define the end of the relocatable range. 904 */ 905 m->relocend = (vaddr_t)end; 906 907 for (i = 0; i < NMEM_SEGS; i++) { 908 m->ram_segs[i].start = boot_segs[i].start; 909 m->ram_segs[i].size = boot_segs[i].end - 910 boot_segs[i].start; 911 } 912 } 913 914 void 915 mmu030_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 916 paddr_t sysptmap_pa, paddr_t kbase) 917 /* sysseg_pa: System segment table */ 918 /* kstsize: size of 'sysseg' in pages */ 919 /* ptpa: Kernel page table */ 920 /* ptsize: size of 'pt' in bytes */ 921 /* sysptmap_pa: System page table */ 922 { 923 st_entry_t sg_proto, *sg, *esg; 924 pt_entry_t pg_proto, *pg, *epg; 925 926 /* 927 * Map the page table pages in both the HW segment table 928 * and the software Sysptmap. 929 */ 930 sg = (st_entry_t *)sysseg_pa; 931 pg = (pt_entry_t *)sysptmap_pa; 932 epg = &pg[ptsize >> PGSHIFT]; 933 sg_proto = RELOC_PA(kbase, ptpa) | SG_RW | SG_V; 934 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 935 while (pg < epg) { 936 *sg++ = sg_proto; 937 *pg++ = pg_proto; 938 sg_proto += PAGE_SIZE; 939 pg_proto += PAGE_SIZE; 940 } 941 942 /* 943 * Invalidate the remainder of the tables. 944 */ 945 esg = (st_entry_t *)sysseg_pa; 946 esg = &esg[TIA_SIZE]; 947 while (sg < esg) 948 *sg++ = SG_NV; 949 epg = (pt_entry_t *)sysptmap_pa; 950 epg = &epg[TIB_SIZE]; 951 while (pg < epg) 952 *pg++ = PG_NV; 953 954 /* 955 * Initialize the PTE for the last one to point Sysptmap. 956 */ 957 sg = (st_entry_t *)sysseg_pa; 958 sg = &sg[SYSMAP_VA >> SEGSHIFT]; 959 pg = (pt_entry_t *)sysptmap_pa; 960 pg = &pg[SYSMAP_VA >> SEGSHIFT]; 961 *sg = RELOC_PA(kbase, sysptmap_pa) | SG_RW | SG_V; 962 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 963 } 964 965 #if defined(M68040) || defined(M68060) 966 void 967 mmu040_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 968 paddr_t sysptmap_pa, paddr_t kbase) 969 /* sysseg_pa: System segment table */ 970 /* kstsize: size of 'sysseg' in pages */ 971 /* ptpa: Kernel page table */ 972 /* ptsize: size of 'pt' in bytes */ 973 /* sysptmap_pa: System page table */ 974 { 975 int nl1desc, nl2desc, i; 976 st_entry_t sg_proto, *sg, *esg; 977 pt_entry_t pg_proto, *pg, *epg; 978 979 /* 980 * First invalidate the entire "segment table" pages 981 * (levels 1 and 2 have the same "invalid" values). 982 */ 983 sg = (st_entry_t *)sysseg_pa; 984 esg = &sg[kstsize * NPTEPG]; 985 while (sg < esg) 986 *sg++ = SG_NV; 987 988 /* 989 * Initialize level 2 descriptors (which immediately 990 * follow the level 1 table). 991 * We need: 992 * NPTEPG / SG4_LEV3SIZE 993 * level 2 descriptors to map each of the nptpages 994 * pages of PTEs. Note that we set the "used" bit 995 * now to save the HW the expense of doing it. 996 */ 997 nl2desc = (ptsize >> PGSHIFT) * (NPTEPG / SG4_LEV3SIZE); 998 sg = (st_entry_t *)sysseg_pa; 999 sg = &sg[SG4_LEV1SIZE]; 1000 esg = &sg[nl2desc]; 1001 sg_proto = RELOC_PA(kbase, ptpa) | SG_U | SG_RW | SG_V; 1002 while (sg < esg) { 1003 *sg++ = sg_proto; 1004 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1005 } 1006 1007 /* 1008 * Initialize level 1 descriptors. We need: 1009 * howmany(nl2desc, SG4_LEV2SIZE) 1010 * level 1 descriptors to map the 'nl2desc' level 2's. 1011 */ 1012 nl1desc = howmany(nl2desc, SG4_LEV2SIZE); 1013 sg = (st_entry_t *)sysseg_pa; 1014 esg = &sg[nl1desc]; 1015 sg_proto = RELOC_PA(kbase, (paddr_t)&sg[SG4_LEV1SIZE]) 1016 | SG_U | SG_RW | SG_V; 1017 while (sg < esg) { 1018 *sg++ = sg_proto; 1019 sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t)); 1020 } 1021 1022 /* Sysmap is last entry in level 1 */ 1023 sg = (st_entry_t *)sysseg_pa; 1024 sg = &sg[SG4_LEV1SIZE - 1]; 1025 *sg = sg_proto; 1026 1027 /* 1028 * Kernel segment table at end of next level 2 table 1029 */ 1030 i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE); 1031 sg = (st_entry_t *)sysseg_pa; 1032 sg = &sg[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)]; 1033 esg = &sg[NPTEPG / SG4_LEV3SIZE]; 1034 sg_proto = RELOC_PA(kbase, sysptmap_pa) | SG_U | SG_RW | SG_V; 1035 while (sg < esg) { 1036 *sg++ = sg_proto; 1037 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1038 } 1039 1040 /* Include additional level 2 table for Sysmap in protostfree */ 1041 protostfree = (~0 << (1 + nl1desc + 1)) /* & ~(~0 << MAXKL2SIZE) */; 1042 1043 /* 1044 * Initialize Sysptmap 1045 */ 1046 pg = (pt_entry_t *)sysptmap_pa; 1047 epg = &pg[ptsize >> PGSHIFT]; 1048 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 1049 while (pg < epg) { 1050 *pg++ = pg_proto; 1051 pg_proto += PAGE_SIZE; 1052 } 1053 1054 /* 1055 * Invalidate rest of Sysptmap page. 1056 */ 1057 epg = (pt_entry_t *)sysptmap_pa; 1058 epg = &epg[TIB_SIZE]; 1059 while (pg < epg) 1060 *pg++ = PG_NV; 1061 1062 /* 1063 * Initialize the PTE for the last one to point Sysptmap. 1064 */ 1065 pg = (pt_entry_t *)sysptmap_pa; 1066 pg = &pg[SYSMAP_VA >> SEGSHIFT]; 1067 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 1068 } 1069 #endif /* M68040 */ 1070 1071 #if defined(M68060) 1072 int m68060_pcr_init = 0x21; /* make this patchable */ 1073 #endif 1074 1075 static void 1076 initcpu(void) 1077 { 1078 typedef void trapfun(void); 1079 1080 switch (cputype) { 1081 1082 #if defined(M68060) 1083 case CPU_68060: 1084 { 1085 extern trapfun *vectab[256]; 1086 extern trapfun buserr60, addrerr4060, fpfault; 1087 #if defined(M060SP) 1088 extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[]; 1089 #else 1090 extern trapfun illinst; 1091 #endif 1092 1093 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : : 1094 "d"(m68060_pcr_init):"d0" ); 1095 1096 /* bus/addrerr vectors */ 1097 vectab[2] = buserr60; 1098 vectab[3] = addrerr4060; 1099 1100 #if defined(M060SP) 1101 /* integer support */ 1102 vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00]; 1103 1104 /* floating point support */ 1105 /* 1106 * XXX maybe we really should run-time check for the 1107 * stack frame format here: 1108 */ 1109 vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30]; 1110 1111 vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38]; 1112 vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40]; 1113 1114 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; 1115 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; 1116 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; 1117 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; 1118 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; 1119 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; 1120 #else 1121 vectab[61] = illinst; 1122 #endif 1123 vectab[48] = fpfault; 1124 } 1125 break; 1126 #endif /* defined(M68060) */ 1127 #if defined(M68040) 1128 case CPU_68040: 1129 { 1130 extern trapfun *vectab[256]; 1131 extern trapfun buserr40, addrerr4060; 1132 1133 /* bus/addrerr vectors */ 1134 vectab[2] = buserr40; 1135 vectab[3] = addrerr4060; 1136 } 1137 break; 1138 #endif /* defined(M68040) */ 1139 #if defined(M68030) || defined(M68020) 1140 case CPU_68030: 1141 case CPU_68020: 1142 { 1143 extern trapfun *vectab[256]; 1144 extern trapfun buserr2030, addrerr2030; 1145 1146 /* bus/addrerr vectors */ 1147 vectab[2] = buserr2030; 1148 vectab[3] = addrerr2030; 1149 } 1150 break; 1151 #endif /* defined(M68030) || defined(M68020) */ 1152 } 1153 1154 DCIS(); 1155 } 1156 1157 #ifdef DEBUG 1158 void dump_segtable(u_int *); 1159 void dump_pagetable(u_int *, u_int, u_int); 1160 u_int vmtophys(u_int *, u_int); 1161 1162 void 1163 dump_segtable(u_int *stp) 1164 { 1165 u_int *s, *es; 1166 int shift, i; 1167 1168 s = stp; 1169 { 1170 es = s + (M68K_STSIZE >> 2); 1171 shift = SG_ISHIFT; 1172 } 1173 1174 /* 1175 * XXX need changes for 68040 1176 */ 1177 for (i = 0; s < es; s++, i++) 1178 if (*s & SG_V) 1179 printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME); 1180 printf("\n"); 1181 } 1182 1183 void 1184 dump_pagetable(u_int *ptp, u_int i, u_int n) 1185 { 1186 u_int *p, *ep; 1187 1188 p = ptp + i; 1189 ep = p + n; 1190 for (; p < ep; p++, i++) 1191 if (*p & PG_V) 1192 printf("$%08x -> $%08x\t", i, *p & PG_FRAME); 1193 printf("\n"); 1194 } 1195 1196 u_int 1197 vmtophys(u_int *ste, u_int vm) 1198 { 1199 1200 ste = (u_int *)(*(ste + (vm >> SEGSHIFT)) & SG_FRAME); 1201 ste += (vm & SG_PMASK) >> PGSHIFT; 1202 return (*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1)); 1203 } 1204 1205 #endif 1206