1 /* $NetBSD: atari_init.c,v 1.88 2009/11/27 03:23:05 rmind Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Leo Weppelman 5 * Copyright (c) 1994 Michael L. Hitch 6 * Copyright (c) 1993 Markus Wild 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Markus Wild. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.88 2009/11/27 03:23:05 rmind Exp $"); 37 38 #include "opt_ddb.h" 39 #include "opt_mbtype.h" 40 #include "opt_m060sp.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/proc.h> 45 #include <sys/ioctl.h> 46 #include <sys/select.h> 47 #include <sys/tty.h> 48 #include <sys/buf.h> 49 #include <sys/msgbuf.h> 50 #include <sys/mbuf.h> 51 #include <sys/extent.h> 52 #include <sys/protosw.h> 53 #include <sys/domain.h> 54 #include <sys/dkbad.h> 55 #include <sys/reboot.h> 56 #include <sys/exec.h> 57 #include <sys/exec_aout.h> 58 #include <sys/core.h> 59 #include <sys/kcore.h> 60 61 #include <uvm/uvm_extern.h> 62 63 #include <machine/vmparam.h> 64 #include <machine/pte.h> 65 #include <machine/cpu.h> 66 #include <machine/iomap.h> 67 #include <machine/mfp.h> 68 #include <machine/scu.h> 69 #include <machine/acia.h> 70 #include <machine/kcore.h> 71 #include <machine/intr.h> 72 73 #include <m68k/cpu.h> 74 #include <m68k/cacheops.h> 75 76 #include <atari/atari/stalloc.h> 77 #include <atari/dev/clockvar.h> 78 #include <atari/dev/ym2149reg.h> 79 80 #include "pci.h" 81 82 void start_c(int, u_int, u_int, u_int, char *); 83 static void atari_hwinit(void); 84 static void cpu_init_kcorehdr(paddr_t, paddr_t); 85 static void initcpu(void); 86 static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 87 static void map_io_areas(paddr_t, psize_t, u_int); 88 static void set_machtype(void); 89 90 #if defined(M68040) || defined(M68060) 91 static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 92 #endif 93 94 /* 95 * Extent maps to manage all memory space, including I/O ranges. Allocate 96 * storage for 8 regions in each, initially. Later, iomem_malloc_safe 97 * will indicate that it's safe to use malloc() to dynamically allocate 98 * region descriptors. 99 * This means that the fixed static storage is only used for registrating 100 * the found memory regions and the bus-mapping of the console. 101 * 102 * The extent maps are not static! They are used for bus address space 103 * allocation. 104 */ 105 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 106 struct extent *iomem_ex; 107 int iomem_malloc_safe; 108 109 /* 110 * All info needed to generate a panic dump. All fields are setup by 111 * start_c(). 112 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap 113 * here.... Also, the name is badly choosen. Phys_segs contains the 114 * segment descriptions _after_ reservations are made. 115 * XXX: 'lowram' is obsoleted by the new panicdump format 116 */ 117 static cpu_kcore_hdr_t cpu_kcore_hdr; 118 119 extern u_int lowram; 120 int machineid, mmutype, cputype, astpending; 121 #if defined(M68040) || defined(M68060) 122 extern int protostfree; 123 #endif 124 125 extern char *esym; 126 extern struct pcb *curpcb; 127 128 /* 129 * This is the virtual address of physical page 0. Used by 'do_boot()'. 130 */ 131 vaddr_t page_zero; 132 133 /* 134 * Crude support for allocation in ST-ram. Currently only used to allocate 135 * video ram. 136 * The physical address is also returned because the video init needs it to 137 * setup the controller at the time the vm-system is not yet operational so 138 * 'kvtop()' cannot be used. 139 */ 140 #ifndef ST_POOL_SIZE 141 #define ST_POOL_SIZE 40 /* XXX: enough? */ 142 #endif 143 144 u_long st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable */ 145 u_long st_pool_virt, st_pool_phys; 146 147 /* 148 * Are we relocating the kernel to TT-Ram if possible? It is faster, but 149 * it is also reported not to work on all TT's. So the default is NO. 150 */ 151 #ifndef RELOC_KERNEL 152 #define RELOC_KERNEL 0 153 #endif 154 int reloc_kernel = RELOC_KERNEL; /* Patchable */ 155 156 #define RELOC_PA(base, pa) ((base) + (pa)) /* used to set up PTE etc. */ 157 158 /* 159 * this is the C-level entry function, it's called from locore.s. 160 * Preconditions: 161 * Interrupts are disabled 162 * PA == VA, we don't have to relocate addresses before enabling 163 * the MMU 164 * Exec is no longer available (because we're loaded all over 165 * low memory, no ExecBase is available anymore) 166 * 167 * It's purpose is: 168 * Do the things that are done in locore.s in the hp300 version, 169 * this includes allocation of kernel maps and enabling the MMU. 170 * 171 * Some of the code in here is `stolen' from Amiga MACH, and was 172 * written by Bryan Ford and Niklas Hallqvist. 173 * 174 * Very crude 68040 support by Michael L. Hitch. 175 */ 176 int kernel_copyback = 1; 177 178 void 179 start_c(int id, u_int ttphystart, u_int ttphysize, u_int stphysize, 180 char *esym_addr) 181 /* id: Machine id */ 182 /* ttphystart, ttphysize: Start address and size of TT-ram */ 183 /* stphysize: Size of ST-ram */ 184 /* esym_addr: Address of kernel '_esym' symbol */ 185 { 186 extern char end[]; 187 extern void etext(void); 188 extern u_long protorp[2]; 189 paddr_t pstart; /* Next available physical address */ 190 vaddr_t vstart; /* Next available virtual address */ 191 vsize_t avail; 192 paddr_t ptpa; 193 psize_t ptsize; 194 u_int ptextra; 195 vaddr_t kva; 196 u_int tc, i; 197 pt_entry_t *pg, *epg; 198 pt_entry_t pg_proto; 199 vaddr_t end_loaded; 200 paddr_t kbase; 201 u_int kstsize; 202 paddr_t Sysseg_pa; 203 paddr_t Sysptmap_pa; 204 205 #if defined(_MILANHW_) 206 /* XXX 207 * XXX The right place todo this is probably the booter (Leo) 208 * XXX More than 16MB memory is not yet supported on the Milan! 209 * The Milan Lies about the presence of TT-RAM. If you insert 210 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM, 211 * starting at address 16MB. 212 */ 213 stphysize += ttphysize; 214 ttphysize = ttphystart = 0; 215 #endif 216 boot_segs[0].start = 0; 217 boot_segs[0].end = stphysize; 218 boot_segs[1].start = ttphystart; 219 boot_segs[1].end = ttphystart + ttphysize; 220 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */ 221 222 /* 223 * The following is a hack. We do not know how much ST memory we 224 * really need until after configuration has finished. At this 225 * time I have no idea how to grab ST memory at that time. 226 * The round_page() call is ment to correct errors made by 227 * binpatching! 228 */ 229 st_pool_size = m68k_round_page(st_pool_size); 230 st_pool_phys = stphysize - st_pool_size; 231 stphysize = st_pool_phys; 232 233 machineid = id; 234 esym = esym_addr; 235 236 /* 237 * the kernel ends at end() or esym. 238 */ 239 if (esym == NULL) 240 end_loaded = (vaddr_t)&end; 241 else 242 end_loaded = (vaddr_t)esym; 243 244 /* 245 * If we have enough fast-memory to put the kernel in and the 246 * RELOC_KERNEL option is set, do it! 247 */ 248 if ((reloc_kernel != 0) && (ttphysize >= end_loaded)) 249 kbase = ttphystart; 250 else 251 kbase = 0; 252 253 /* 254 * Determine the type of machine we are running on. This needs 255 * to be done early (and before initcpu())! 256 */ 257 set_machtype(); 258 259 /* 260 * Initialize CPU specific stuff 261 */ 262 initcpu(); 263 264 /* 265 * We run the kernel from ST memory at the moment. 266 * The kernel segment table is put just behind the loaded image. 267 * pstart: start of usable ST memory 268 * avail : size of ST memory available. 269 */ 270 vstart = (vaddr_t)end_loaded; 271 vstart = m68k_round_page(vstart); 272 pstart = (paddr_t)vstart; /* pre-reloc PA == kernel VA here */ 273 avail = stphysize - pstart; 274 275 /* 276 * Save KVA of lwp0 uarea and allocate it. 277 */ 278 uvm_lwp_setuarea(&lwp0, vstart); 279 pstart += USPACE; 280 vstart += USPACE; 281 avail -= USPACE; 282 283 /* 284 * Calculate the number of pages needed for Sysseg. 285 * For the 68030, we need 256 descriptors (segment-table-entries). 286 * This easily fits into one page. 287 * For the 68040, both the level-1 and level-2 descriptors are 288 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE 289 * level-1 & level-2 tables. 290 */ 291 #if defined(M68040) || defined(M68060) 292 if (mmutype == MMU_68040) 293 kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); 294 else 295 #endif 296 kstsize = 1; 297 /* 298 * allocate the kernel segment table 299 */ 300 Sysseg_pa = pstart; /* pre-reloc PA to init STEs */ 301 Sysseg = (st_entry_t *)vstart; 302 pstart += kstsize * PAGE_SIZE; 303 vstart += kstsize * PAGE_SIZE; 304 avail -= kstsize * PAGE_SIZE; 305 306 /* 307 * allocate kernel page table map 308 */ 309 Sysptmap_pa = pstart; /* pre-reloc PA to init PTEs */ 310 Sysptmap = (pt_entry_t *)vstart; 311 pstart += PAGE_SIZE; 312 vstart += PAGE_SIZE; 313 avail -= PAGE_SIZE; 314 315 /* 316 * Determine the number of pte's we need for extra's like 317 * ST I/O map's. 318 */ 319 ptextra = btoc(STIO_SIZE); 320 321 /* 322 * If present, add pci areas 323 */ 324 if (machineid & ATARI_HADES) 325 ptextra += btoc(PCI_CONFIG_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE); 326 if (machineid & ATARI_MILAN) 327 ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE); 328 ptextra += btoc(BOOTM_VA_POOL); 329 330 /* 331 * The 'pt' (the initial kernel pagetable) has to map the kernel and 332 * the I/O areas. The various I/O areas are mapped (virtually) at 333 * the top of the address space mapped by 'pt' (ie. just below Sysmap). 334 */ 335 ptpa = pstart; /* pre-reloc PA to init PTEs */ 336 ptsize = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT; 337 pstart += ptsize; 338 vstart += ptsize; 339 avail -= ptsize; 340 341 /* 342 * Sysmap is now placed at the end of Supervisor virtual address space. 343 */ 344 Sysmap = (pt_entry_t *)-(NPTEPG * PAGE_SIZE); 345 346 /* 347 * Initialize segment tables 348 */ 349 #if defined(M68040) || defined(M68060) 350 if (mmutype == MMU_68040) 351 mmu040_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 352 kbase); 353 else 354 #endif /* defined(M68040) || defined(M68060) */ 355 mmu030_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 356 kbase); 357 358 /* 359 * initialize kernel page table page(s). 360 * Assume load at VA 0. 361 * - Text pages are RO 362 * - Page zero is invalid 363 */ 364 pg_proto = RELOC_PA(kbase, 0) | PG_RO | PG_V; 365 pg = (pt_entry_t *)ptpa; 366 *pg++ = PG_NV; 367 368 pg_proto += PAGE_SIZE; 369 for (kva = PAGE_SIZE; kva < (vaddr_t)etext; kva += PAGE_SIZE) { 370 *pg++ = pg_proto; 371 pg_proto += PAGE_SIZE; 372 } 373 374 /* 375 * data, bss and dynamic tables are read/write 376 */ 377 pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V; 378 379 #if defined(M68040) || defined(M68060) 380 /* 381 * Map the kernel segment table cache invalidated for 382 * these machines (for the 68040 not strictly necessary, but 383 * recommended by Motorola; for the 68060 mandatory) 384 */ 385 if (mmutype == MMU_68040) { 386 387 if (kernel_copyback) 388 pg_proto |= PG_CCB; 389 390 for (; kva < (vaddr_t)Sysseg; kva += PAGE_SIZE) { 391 *pg++ = pg_proto; 392 pg_proto += PAGE_SIZE; 393 } 394 395 pg_proto = (pg_proto & ~PG_CCB) | PG_CI; 396 for (; kva < (vaddr_t)Sysptmap; kva += PAGE_SIZE) { 397 *pg++ = pg_proto; 398 pg_proto += PAGE_SIZE; 399 } 400 401 pg_proto = (pg_proto & ~PG_CI); 402 if (kernel_copyback) 403 pg_proto |= PG_CCB; 404 } 405 #endif /* defined(M68040) || defined(M68060) */ 406 407 /* 408 * go till end of data allocated so far 409 * plus lwp0 u-area (to be allocated) 410 */ 411 for (; kva < vstart; kva += PAGE_SIZE) { 412 *pg++ = pg_proto; 413 pg_proto += PAGE_SIZE; 414 } 415 416 /* 417 * invalidate remainder of kernel PT 418 */ 419 epg = (pt_entry_t *)ptpa; 420 epg = &epg[ptsize / sizeof(pt_entry_t)]; 421 while (pg < epg) 422 *pg++ = PG_NV; 423 424 /* 425 * Map various I/O areas 426 */ 427 map_io_areas(ptpa, ptsize, ptextra); 428 429 /* 430 * Map the allocated space in ST-ram now. In the contig-case, there 431 * is no need to make a distinction between virtual and physical 432 * addresses. But I make it anyway to be prepared. 433 * Physcal space is already reserved! 434 */ 435 st_pool_virt = vstart; 436 pg = (pt_entry_t *)ptpa; 437 pg = &pg[vstart / PAGE_SIZE]; 438 pg_proto = st_pool_phys | PG_RW | PG_CI | PG_V; 439 vstart += st_pool_size; 440 while (pg_proto < (st_pool_phys + st_pool_size)) { 441 *pg++ = pg_proto; 442 pg_proto += PAGE_SIZE; 443 } 444 445 /* 446 * Map physical page_zero and page-zero+1 (First ST-ram page). We need 447 * to reference it in the reboot code. Two pages are mapped, because 448 * we must make sure 'doboot()' is contained in it (see the tricky 449 * copying there....). 450 */ 451 page_zero = vstart; 452 pg = (pt_entry_t *)ptpa; 453 pg = &pg[vstart / PAGE_SIZE]; 454 *pg++ = PG_RW | PG_CI | PG_V; 455 vstart += PAGE_SIZE; 456 *pg = PG_RW | PG_CI | PG_V | PAGE_SIZE; 457 vstart += PAGE_SIZE; 458 459 /* 460 * All necessary STEs and PTEs have been initialized. 461 * Update Sysseg_pa and Sysptmap_pa to point relocated PA. 462 */ 463 if (kbase) { 464 Sysseg_pa += kbase; 465 Sysptmap_pa += kbase; 466 } 467 468 lowram = 0 >> PGSHIFT; /* XXX */ 469 470 /* 471 * Fill in usable segments. The page indexes will be initialized 472 * later when all reservations are made. 473 */ 474 usable_segs[0].start = 0; 475 usable_segs[0].end = stphysize; 476 usable_segs[0].free_list = VM_FREELIST_STRAM; 477 usable_segs[1].start = ttphystart; 478 usable_segs[1].end = ttphystart + ttphysize; 479 usable_segs[1].free_list = VM_FREELIST_TTRAM; 480 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */ 481 482 if (kbase) { 483 /* 484 * First page of ST-ram is unusable, reserve the space 485 * for the kernel in the TT-ram segment. 486 * Note: Because physical page-zero is partially mapped to ROM 487 * by hardware, it is unusable. 488 */ 489 usable_segs[0].start = PAGE_SIZE; 490 usable_segs[1].start += pstart; 491 } else 492 usable_segs[0].start += pstart; 493 494 /* 495 * As all segment sizes are now valid, calculate page indexes and 496 * available physical memory. 497 */ 498 usable_segs[0].first_page = 0; 499 for (i = 1; usable_segs[i].start; i++) { 500 usable_segs[i].first_page = usable_segs[i-1].first_page; 501 usable_segs[i].first_page += 502 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE; 503 } 504 for (i = 0, physmem = 0; usable_segs[i].start; i++) 505 physmem += usable_segs[i].end - usable_segs[i].start; 506 physmem >>= PGSHIFT; 507 508 /* 509 * get the pmap module in sync with reality. 510 */ 511 pmap_bootstrap(vstart, Sysseg_pa); 512 513 /* 514 * Prepare to enable the MMU. 515 * Setup and load SRP nolimit, share global, 4 byte PTE's 516 */ 517 protorp[0] = 0x80000202; 518 protorp[1] = Sysseg_pa; /* + segtable address */ 519 520 cpu_init_kcorehdr(kbase, Sysseg_pa); 521 522 /* 523 * copy over the kernel (and all now initialized variables) 524 * to fastram. DONT use bcopy(), this beast is much larger 525 * than 128k ! 526 */ 527 if (kbase) { 528 register paddr_t *lp, *le, *fp; 529 530 lp = (paddr_t *)0; 531 le = (paddr_t *)pstart; 532 fp = (paddr_t *)kbase; 533 while(lp < le) 534 *fp++ = *lp++; 535 } 536 #if defined(M68040) || defined(M68060) 537 if (mmutype == MMU_68040) { 538 /* 539 * movel Sysseg_pa,a0; 540 * movec a0,SRP; 541 * pflusha; 542 * movel #$0xc000,d0; 543 * movec d0,TC 544 */ 545 if (cputype == CPU_68060) { 546 /* XXX: Need the branch cache be cleared? */ 547 __asm volatile (".word 0x4e7a,0x0002;" 548 "orl #0x400000,%%d0;" 549 ".word 0x4e7b,0x0002" : : : "d0"); 550 } 551 __asm volatile ("movel %0,%%a0;" 552 ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0"); 553 __asm volatile (".word 0xf518" : : ); 554 __asm volatile ("movel #0xc000,%%d0;" 555 ".word 0x4e7b,0x0003" : : : "d0" ); 556 } else 557 #endif 558 { 559 __asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0])); 560 /* 561 * setup and load TC register. 562 * enable_cpr, enable_srp, pagesize=8k, 563 * A = 8 bits, B = 11 bits 564 */ 565 tc = 0x82d08b00; 566 __asm volatile ("pmove %0@,%%tc" : : "a" (&tc)); 567 } 568 569 /* 570 * Initialize the "u-area" pages. 571 * 572 * Must initialize uarea before autoconfig or the fault handler 573 * will get a NULL reference. 574 */ 575 memset((void*)uvm_lwp_getuarea(&lwp0), 0, USPACE); 576 curlwp = &lwp0; 577 curpcb = lwp_getpcb(&lwp0); 578 579 /* 580 * Get the hardware into a defined state 581 */ 582 atari_hwinit(); 583 584 /* 585 * Initialize stmem allocator 586 */ 587 init_stmem(); 588 589 /* 590 * Initialize the I/O mem extent map. 591 * Note: we don't have to check the return value since 592 * creation of a fixed extent map will never fail (since 593 * descriptor storage has already been allocated). 594 * 595 * N.B. The iomem extent manages _all_ physical addresses 596 * on the machine. When the amount of RAM is found, all 597 * extents of RAM are allocated from the map. 598 */ 599 iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF, 600 (void *)iomem_ex_storage, sizeof(iomem_ex_storage), 601 EX_NOCOALESCE|EX_NOWAIT); 602 603 /* 604 * Allocate the physical RAM from the extent map 605 */ 606 for (i = 0; boot_segs[i].end != 0; i++) { 607 if (extent_alloc_region(iomem_ex, boot_segs[i].start, 608 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) { 609 /* XXX: Ahum, should not happen ;-) */ 610 printf("Warning: Cannot allocate boot memory from" 611 " extent map!?\n"); 612 } 613 } 614 615 /* 616 * Initialize interrupt mapping. 617 */ 618 intr_init(); 619 } 620 621 /* 622 * Try to figure out on what type of machine we are running 623 * Note: This module runs *before* the io-mapping is setup! 624 */ 625 static void 626 set_machtype(void) 627 { 628 629 #ifdef _MILANHW_ 630 machineid |= ATARI_MILAN; 631 632 #else 633 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */ 634 if (badbaddr((void *)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) { 635 /* 636 * Watch out! We can also have a Hades with < 16Mb 637 * RAM here... 638 */ 639 if (!badbaddr((void *)__UNVOLATILE(&MFP->mf_gpip), 640 sizeof(char))) { 641 machineid |= ATARI_FALCON; 642 return; 643 } 644 } 645 if (!badbaddr((void *)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char))) 646 machineid |= ATARI_HADES; 647 else 648 machineid |= ATARI_TT; 649 #endif /* _MILANHW_ */ 650 } 651 652 static void 653 atari_hwinit(void) 654 { 655 656 #if defined(_ATARIHW_) 657 /* 658 * Initialize the sound chip 659 */ 660 ym2149_init(); 661 662 /* 663 * Make sure that the midi acia will not generate an interrupt 664 * unless something attaches to it. We cannot do this for the 665 * keyboard acia because this breaks the '-d' option of the 666 * booter... 667 */ 668 MDI->ac_cs = 0; 669 #endif /* defined(_ATARIHW_) */ 670 671 /* 672 * Initialize both MFP chips (if both present!) to generate 673 * auto-vectored interrupts with EOI. The active-edge registers are 674 * set up. The interrupt enable registers are set to disable all 675 * interrupts. 676 */ 677 MFP->mf_iera = MFP->mf_ierb = 0; 678 MFP->mf_imra = MFP->mf_imrb = 0; 679 MFP->mf_aer = MFP->mf_ddr = 0; 680 MFP->mf_vr = 0x40; 681 682 #if defined(_ATARIHW_) 683 if (machineid & (ATARI_TT|ATARI_HADES)) { 684 MFP2->mf_iera = MFP2->mf_ierb = 0; 685 MFP2->mf_imra = MFP2->mf_imrb = 0; 686 MFP2->mf_aer = 0x80; 687 MFP2->mf_vr = 0x50; 688 } 689 690 if (machineid & ATARI_TT) { 691 /* 692 * Initialize the SCU, to enable interrupts on the SCC (ipl5), 693 * MFP (ipl6) and softints (ipl1). 694 */ 695 SCU->sys_mask = SCU_SYS_SOFT; 696 SCU->vme_mask = SCU_MFP | SCU_SCC; 697 #ifdef DDB 698 /* 699 * This allows people with the correct hardware modification 700 * to drop into the debugger from an NMI. 701 */ 702 SCU->sys_mask |= SCU_IRQ7; 703 #endif 704 } 705 #endif /* defined(_ATARIHW_) */ 706 707 /* 708 * Initialize a timer for delay(9). 709 */ 710 init_delay(); 711 712 #if NPCI > 0 713 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 714 /* 715 * Configure PCI-bus 716 */ 717 init_pci_bus(); 718 } 719 #endif 720 721 } 722 723 /* 724 * Do the dull work of mapping the various I/O areas. They MUST be Cache 725 * inhibited! 726 * All I/O areas are virtually mapped at the end of the pt-table. 727 */ 728 static void 729 map_io_areas(paddr_t ptpa, psize_t ptsize, u_int ptextra) 730 /* ptsize: Size of 'pt' in bytes */ 731 /* ptextra: #of additional I/O pte's */ 732 { 733 extern void bootm_init(vaddr_t, pt_entry_t *, u_long); 734 vaddr_t ioaddr; 735 pt_entry_t *pt, *pg, *epg; 736 pt_entry_t pg_proto; 737 u_long mask; 738 739 pt = (pt_entry_t *)ptpa; 740 ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE; 741 742 /* 743 * Map ST-IO area 744 */ 745 stio_addr = ioaddr; 746 ioaddr += STIO_SIZE; 747 pg = &pt[stio_addr / PAGE_SIZE]; 748 epg = &pg[btoc(STIO_SIZE)]; 749 #ifdef _MILANHW_ 750 /* 751 * Turn on byte swaps in the ST I/O area. On the Milan, the 752 * U0 signal of the MMU controls the BigEndian signal 753 * of the PLX9080. We use this setting so we can read/write the 754 * PLX registers (and PCI-config space) in big-endian mode. 755 */ 756 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100; 757 #else 758 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V; 759 #endif 760 while(pg < epg) { 761 *pg++ = pg_proto; 762 pg_proto += PAGE_SIZE; 763 } 764 765 /* 766 * Map PCI areas 767 */ 768 if (machineid & ATARI_HADES) { 769 /* 770 * Only Hades maps the PCI-config space! 771 */ 772 pci_conf_addr = ioaddr; 773 ioaddr += PCI_CONFIG_SIZE; 774 pg = &pt[pci_conf_addr / PAGE_SIZE]; 775 epg = &pg[btoc(PCI_CONFIG_SIZE)]; 776 mask = PCI_CONFM_PHYS; 777 pg_proto = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V; 778 for (; pg < epg; mask <<= 1) 779 *pg++ = pg_proto | mask; 780 } else 781 pci_conf_addr = 0; /* XXX: should crash */ 782 783 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 784 pci_io_addr = ioaddr; 785 ioaddr += PCI_IO_SIZE; 786 pg = &pt[pci_io_addr / PAGE_SIZE]; 787 epg = &pg[btoc(PCI_IO_SIZE)]; 788 pg_proto = PCI_IO_PHYS | PG_RW | PG_CI | PG_V; 789 while (pg < epg) { 790 *pg++ = pg_proto; 791 pg_proto += PAGE_SIZE; 792 } 793 794 pci_mem_addr = ioaddr; 795 /* Provide an uncached PCI address for the MILAN */ 796 pci_mem_uncached = ioaddr; 797 ioaddr += PCI_MEM_SIZE; 798 epg = &pg[btoc(PCI_MEM_SIZE)]; 799 pg_proto = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V; 800 while (pg < epg) { 801 *pg++ = pg_proto; 802 pg_proto += PAGE_SIZE; 803 } 804 } 805 806 bootm_init(ioaddr, pg, BOOTM_VA_POOL); 807 /* 808 * ioaddr += BOOTM_VA_POOL; 809 * pg = &pg[btoc(BOOTM_VA_POOL)]; 810 */ 811 } 812 813 /* 814 * Used by dumpconf() to get the size of the machine-dependent panic-dump 815 * header in disk blocks. 816 */ 817 818 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t))) 819 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1)) 820 821 int 822 cpu_dumpsize(void) 823 { 824 825 return btodb(MDHDRSIZE); 826 } 827 828 /* 829 * Called by dumpsys() to dump the machine-dependent header. 830 * XXX: Assumes that it will all fit in one diskblock. 831 */ 832 int 833 cpu_dump(int (*dump)(dev_t, daddr_t, void *, size_t), daddr_t *p_blkno) 834 { 835 int buf[MDHDRSIZE/sizeof(int)]; 836 int error; 837 kcore_seg_t *kseg_p; 838 cpu_kcore_hdr_t *chdr_p; 839 840 kseg_p = (kcore_seg_t *)buf; 841 chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)]; 842 843 /* 844 * Generate a segment header 845 */ 846 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU); 847 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p)); 848 849 /* 850 * Add the md header 851 */ 852 *chdr_p = cpu_kcore_hdr; 853 error = dump(dumpdev, *p_blkno, (void *)buf, sizeof(buf)); 854 *p_blkno += btodb(sizeof(buf)); 855 return (error); 856 } 857 858 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS) 859 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS" 860 #endif 861 /* 862 * Initialize the cpu_kcore_header. 863 */ 864 static void 865 cpu_init_kcorehdr(paddr_t kbase, paddr_t sysseg_pa) 866 { 867 cpu_kcore_hdr_t *h = &cpu_kcore_hdr; 868 struct m68k_kcore_hdr *m = &h->un._m68k; 869 extern char end[]; 870 int i; 871 872 memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr)); 873 874 /* 875 * Initialize the `dispatcher' portion of the header. 876 */ 877 strcpy(h->name, machine); 878 h->page_size = PAGE_SIZE; 879 h->kernbase = KERNBASE; 880 881 /* 882 * Fill in information about our MMU configuration. 883 */ 884 m->mmutype = mmutype; 885 m->sg_v = SG_V; 886 m->sg_frame = SG_FRAME; 887 m->sg_ishift = SG_ISHIFT; 888 m->sg_pmask = SG_PMASK; 889 m->sg40_shift1 = SG4_SHIFT1; 890 m->sg40_mask2 = SG4_MASK2; 891 m->sg40_shift2 = SG4_SHIFT2; 892 m->sg40_mask3 = SG4_MASK3; 893 m->sg40_shift3 = SG4_SHIFT3; 894 m->sg40_addr1 = SG4_ADDR1; 895 m->sg40_addr2 = SG4_ADDR2; 896 m->pg_v = PG_V; 897 m->pg_frame = PG_FRAME; 898 899 /* 900 * Initialize pointer to kernel segment table. 901 */ 902 m->sysseg_pa = sysseg_pa; /* PA after relocation */ 903 904 /* 905 * Initialize relocation value such that: 906 * 907 * pa = (va - KERNBASE) + reloc 908 */ 909 m->reloc = kbase; 910 911 /* 912 * Define the end of the relocatable range. 913 */ 914 m->relocend = (vaddr_t)end; 915 916 for (i = 0; i < NMEM_SEGS; i++) { 917 m->ram_segs[i].start = boot_segs[i].start; 918 m->ram_segs[i].size = boot_segs[i].end - 919 boot_segs[i].start; 920 } 921 } 922 923 void 924 mmu030_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 925 paddr_t sysptmap_pa, paddr_t kbase) 926 /* sysseg_pa: System segment table */ 927 /* kstsize: size of 'sysseg' in pages */ 928 /* ptpa: Kernel page table */ 929 /* ptsize: size of 'pt' in bytes */ 930 /* sysptmap_pa: System page table */ 931 { 932 st_entry_t sg_proto, *sg, *esg; 933 pt_entry_t pg_proto, *pg, *epg; 934 935 /* 936 * Map the page table pages in both the HW segment table 937 * and the software Sysptmap. 938 */ 939 sg = (st_entry_t *)sysseg_pa; 940 pg = (pt_entry_t *)sysptmap_pa; 941 epg = &pg[ptsize >> PGSHIFT]; 942 sg_proto = RELOC_PA(kbase, ptpa) | SG_RW | SG_V; 943 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 944 while (pg < epg) { 945 *sg++ = sg_proto; 946 *pg++ = pg_proto; 947 sg_proto += PAGE_SIZE; 948 pg_proto += PAGE_SIZE; 949 } 950 951 /* 952 * Invalidate the remainder of the tables. 953 */ 954 esg = (st_entry_t *)sysseg_pa; 955 esg = &esg[256]; /* XXX should be TIA_SIZE */ 956 while (sg < esg) 957 *sg++ = SG_NV; 958 epg = (pt_entry_t *)sysptmap_pa; 959 epg = &epg[NPTEPG]; /* XXX should be TIB_SIZE */ 960 while (pg < epg) 961 *pg++ = PG_NV; 962 963 /* 964 * Initialize the PTE for the last one to point Sysptmap. 965 */ 966 sg = (st_entry_t *)sysseg_pa; 967 sg = &sg[256 - 1]; /* XXX should be TIA_SIZE */ 968 pg = (pt_entry_t *)sysptmap_pa; 969 pg = &pg[256 - 1]; /* XXX should be TIA_SIZE */ 970 *sg = RELOC_PA(kbase, sysptmap_pa) | SG_RW | SG_V; 971 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 972 } 973 974 #if defined(M68040) || defined(M68060) 975 void 976 mmu040_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 977 paddr_t sysptmap_pa, paddr_t kbase) 978 /* sysseg_pa: System segment table */ 979 /* kstsize: size of 'sysseg' in pages */ 980 /* ptpa: Kernel page table */ 981 /* ptsize: size of 'pt' in bytes */ 982 /* sysptmap_pa: System page table */ 983 { 984 int nl1desc, nl2desc, i; 985 st_entry_t sg_proto, *sg, *esg; 986 pt_entry_t pg_proto, *pg, *epg; 987 988 /* 989 * First invalidate the entire "segment table" pages 990 * (levels 1 and 2 have the same "invalid" values). 991 */ 992 sg = (st_entry_t *)sysseg_pa; 993 esg = &sg[kstsize * NPTEPG]; 994 while (sg < esg) 995 *sg++ = SG_NV; 996 997 /* 998 * Initialize level 2 descriptors (which immediately 999 * follow the level 1 table). 1000 * We need: 1001 * NPTEPG / SG4_LEV3SIZE 1002 * level 2 descriptors to map each of the nptpages 1003 * pages of PTEs. Note that we set the "used" bit 1004 * now to save the HW the expense of doing it. 1005 */ 1006 nl2desc = (ptsize >> PGSHIFT) * (NPTEPG / SG4_LEV3SIZE); 1007 sg = (st_entry_t *)sysseg_pa; 1008 sg = &sg[SG4_LEV1SIZE]; 1009 esg = &sg[nl2desc]; 1010 sg_proto = RELOC_PA(kbase, ptpa) | SG_U | SG_RW | SG_V; 1011 while (sg < esg) { 1012 *sg++ = sg_proto; 1013 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1014 } 1015 1016 /* 1017 * Initialize level 1 descriptors. We need: 1018 * howmany(nl2desc, SG4_LEV2SIZE) 1019 * level 1 descriptors to map the 'nl2desc' level 2's. 1020 */ 1021 nl1desc = howmany(nl2desc, SG4_LEV2SIZE); 1022 sg = (st_entry_t *)sysseg_pa; 1023 esg = &sg[nl1desc]; 1024 sg_proto = RELOC_PA(kbase, (paddr_t)&sg[SG4_LEV1SIZE]) 1025 | SG_U | SG_RW | SG_V; 1026 while (sg < esg) { 1027 *sg++ = sg_proto; 1028 sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t)); 1029 } 1030 1031 /* Sysmap is last entry in level 1 */ 1032 sg = (st_entry_t *)sysseg_pa; 1033 sg = &sg[SG4_LEV1SIZE - 1]; 1034 *sg = sg_proto; 1035 1036 /* 1037 * Kernel segment table at end of next level 2 table 1038 */ 1039 i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE); 1040 sg = (st_entry_t *)sysseg_pa; 1041 sg = &sg[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)]; 1042 esg = &sg[NPTEPG / SG4_LEV3SIZE]; 1043 sg_proto = RELOC_PA(kbase, sysptmap_pa) | SG_U | SG_RW | SG_V; 1044 while (sg < esg) { 1045 *sg++ = sg_proto; 1046 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1047 } 1048 1049 /* Include additional level 2 table for Sysmap in protostfree */ 1050 protostfree = (~0 << (1 + nl1desc + 1)) /* & ~(~0 << MAXKL2SIZE) */; 1051 1052 /* 1053 * Initialize Sysptmap 1054 */ 1055 pg = (pt_entry_t *)sysptmap_pa; 1056 epg = &pg[ptsize >> PGSHIFT]; 1057 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 1058 while (pg < epg) { 1059 *pg++ = pg_proto; 1060 pg_proto += PAGE_SIZE; 1061 } 1062 1063 /* 1064 * Invalidate rest of Sysptmap page. 1065 */ 1066 epg = (pt_entry_t *)sysptmap_pa; 1067 epg = &epg[NPTEPG]; /* XXX: should be TIB_SIZE */ 1068 while (pg < epg) 1069 *pg++ = PG_NV; 1070 1071 /* 1072 * Initialize the PTE for the last one to point Sysptmap. 1073 */ 1074 pg = (pt_entry_t *)sysptmap_pa; 1075 pg = &pg[256 - 1]; /* XXX: should be TIA_SIZE */ 1076 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 1077 } 1078 #endif /* M68040 */ 1079 1080 #if defined(M68060) 1081 int m68060_pcr_init = 0x21; /* make this patchable */ 1082 #endif 1083 1084 static void 1085 initcpu(void) 1086 { 1087 typedef void trapfun(void); 1088 1089 switch (cputype) { 1090 1091 #if defined(M68060) 1092 case CPU_68060: 1093 { 1094 extern trapfun *vectab[256]; 1095 extern trapfun buserr60, addrerr4060, fpfault; 1096 #if defined(M060SP) 1097 extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[]; 1098 #else 1099 extern trapfun illinst; 1100 #endif 1101 1102 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : : 1103 "d"(m68060_pcr_init):"d0" ); 1104 1105 /* bus/addrerr vectors */ 1106 vectab[2] = buserr60; 1107 vectab[3] = addrerr4060; 1108 1109 #if defined(M060SP) 1110 /* integer support */ 1111 vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00]; 1112 1113 /* floating point support */ 1114 /* 1115 * XXX maybe we really should run-time check for the 1116 * stack frame format here: 1117 */ 1118 vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30]; 1119 1120 vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38]; 1121 vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40]; 1122 1123 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; 1124 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; 1125 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; 1126 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; 1127 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; 1128 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; 1129 #else 1130 vectab[61] = illinst; 1131 #endif 1132 vectab[48] = fpfault; 1133 } 1134 break; 1135 #endif /* defined(M68060) */ 1136 #if defined(M68040) 1137 case CPU_68040: 1138 { 1139 extern trapfun *vectab[256]; 1140 extern trapfun buserr40, addrerr4060; 1141 1142 /* bus/addrerr vectors */ 1143 vectab[2] = buserr40; 1144 vectab[3] = addrerr4060; 1145 } 1146 break; 1147 #endif /* defined(M68040) */ 1148 #if defined(M68030) || defined(M68020) 1149 case CPU_68030: 1150 case CPU_68020: 1151 { 1152 extern trapfun *vectab[256]; 1153 extern trapfun buserr2030, addrerr2030; 1154 1155 /* bus/addrerr vectors */ 1156 vectab[2] = buserr2030; 1157 vectab[3] = addrerr2030; 1158 } 1159 break; 1160 #endif /* defined(M68030) || defined(M68020) */ 1161 } 1162 1163 DCIS(); 1164 } 1165 1166 #ifdef DEBUG 1167 void dump_segtable(u_int *); 1168 void dump_pagetable(u_int *, u_int, u_int); 1169 u_int vmtophys(u_int *, u_int); 1170 1171 void 1172 dump_segtable(u_int *stp) 1173 { 1174 u_int *s, *es; 1175 int shift, i; 1176 1177 s = stp; 1178 { 1179 es = s + (M68K_STSIZE >> 2); 1180 shift = SG_ISHIFT; 1181 } 1182 1183 /* 1184 * XXX need changes for 68040 1185 */ 1186 for (i = 0; s < es; s++, i++) 1187 if (*s & SG_V) 1188 printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME); 1189 printf("\n"); 1190 } 1191 1192 void 1193 dump_pagetable(u_int *ptp, u_int i, u_int n) 1194 { 1195 u_int *p, *ep; 1196 1197 p = ptp + i; 1198 ep = p + n; 1199 for (; p < ep; p++, i++) 1200 if (*p & PG_V) 1201 printf("$%08x -> $%08x\t", i, *p & PG_FRAME); 1202 printf("\n"); 1203 } 1204 1205 u_int 1206 vmtophys(u_int *ste, u_int vm) 1207 { 1208 1209 ste = (u_int *)(*(ste + (vm >> SEGSHIFT)) & SG_FRAME); 1210 ste += (vm & SG_PMASK) >> PGSHIFT; 1211 return (*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1)); 1212 } 1213 1214 #endif 1215