1 /* $NetBSD: atari_init.c,v 1.86 2009/08/23 01:27:13 mrg Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Leo Weppelman 5 * Copyright (c) 1994 Michael L. Hitch 6 * Copyright (c) 1993 Markus Wild 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Markus Wild. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.86 2009/08/23 01:27:13 mrg Exp $"); 37 38 #include "opt_ddb.h" 39 #include "opt_mbtype.h" 40 #include "opt_m060sp.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/proc.h> 45 #include <sys/user.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/buf.h> 50 #include <sys/msgbuf.h> 51 #include <sys/mbuf.h> 52 #include <sys/extent.h> 53 #include <sys/protosw.h> 54 #include <sys/domain.h> 55 #include <sys/dkbad.h> 56 #include <sys/reboot.h> 57 #include <sys/exec.h> 58 #include <sys/exec_aout.h> 59 #include <sys/core.h> 60 #include <sys/kcore.h> 61 62 #include <uvm/uvm_extern.h> 63 64 #include <machine/vmparam.h> 65 #include <machine/pte.h> 66 #include <machine/cpu.h> 67 #include <machine/iomap.h> 68 #include <machine/mfp.h> 69 #include <machine/scu.h> 70 #include <machine/acia.h> 71 #include <machine/kcore.h> 72 #include <machine/intr.h> 73 74 #include <m68k/cpu.h> 75 #include <m68k/cacheops.h> 76 77 #include <atari/atari/stalloc.h> 78 #include <atari/dev/clockvar.h> 79 #include <atari/dev/ym2149reg.h> 80 81 #include "pci.h" 82 83 void start_c(int, u_int, u_int, u_int, char *); 84 static void atari_hwinit(void); 85 static void cpu_init_kcorehdr(paddr_t, paddr_t); 86 static void initcpu(void); 87 static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 88 static void map_io_areas(paddr_t, psize_t, u_int); 89 static void set_machtype(void); 90 91 #if defined(M68040) || defined(M68060) 92 static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 93 #endif 94 95 /* 96 * Extent maps to manage all memory space, including I/O ranges. Allocate 97 * storage for 8 regions in each, initially. Later, iomem_malloc_safe 98 * will indicate that it's safe to use malloc() to dynamically allocate 99 * region descriptors. 100 * This means that the fixed static storage is only used for registrating 101 * the found memory regions and the bus-mapping of the console. 102 * 103 * The extent maps are not static! They are used for bus address space 104 * allocation. 105 */ 106 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 107 struct extent *iomem_ex; 108 int iomem_malloc_safe; 109 110 /* 111 * All info needed to generate a panic dump. All fields are setup by 112 * start_c(). 113 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap 114 * here.... Also, the name is badly choosen. Phys_segs contains the 115 * segment descriptions _after_ reservations are made. 116 * XXX: 'lowram' is obsoleted by the new panicdump format 117 */ 118 static cpu_kcore_hdr_t cpu_kcore_hdr; 119 120 extern u_int lowram; 121 extern u_int proc0paddr; 122 int machineid, mmutype, cputype, astpending; 123 #if defined(M68040) || defined(M68060) 124 extern int protostfree; 125 #endif 126 127 extern char *esym; 128 extern struct pcb *curpcb; 129 130 /* 131 * This is the virtual address of physical page 0. Used by 'do_boot()'. 132 */ 133 vaddr_t page_zero; 134 135 /* 136 * Crude support for allocation in ST-ram. Currently only used to allocate 137 * video ram. 138 * The physical address is also returned because the video init needs it to 139 * setup the controller at the time the vm-system is not yet operational so 140 * 'kvtop()' cannot be used. 141 */ 142 #ifndef ST_POOL_SIZE 143 #define ST_POOL_SIZE 40 /* XXX: enough? */ 144 #endif 145 146 u_long st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable */ 147 u_long st_pool_virt, st_pool_phys; 148 149 /* 150 * Are we relocating the kernel to TT-Ram if possible? It is faster, but 151 * it is also reported not to work on all TT's. So the default is NO. 152 */ 153 #ifndef RELOC_KERNEL 154 #define RELOC_KERNEL 0 155 #endif 156 int reloc_kernel = RELOC_KERNEL; /* Patchable */ 157 158 #define RELOC_PA(base, pa) ((base) + (pa)) /* used to set up PTE etc. */ 159 160 /* 161 * this is the C-level entry function, it's called from locore.s. 162 * Preconditions: 163 * Interrupts are disabled 164 * PA == VA, we don't have to relocate addresses before enabling 165 * the MMU 166 * Exec is no longer available (because we're loaded all over 167 * low memory, no ExecBase is available anymore) 168 * 169 * It's purpose is: 170 * Do the things that are done in locore.s in the hp300 version, 171 * this includes allocation of kernel maps and enabling the MMU. 172 * 173 * Some of the code in here is `stolen' from Amiga MACH, and was 174 * written by Bryan Ford and Niklas Hallqvist. 175 * 176 * Very crude 68040 support by Michael L. Hitch. 177 */ 178 int kernel_copyback = 1; 179 180 void 181 start_c(int id, u_int ttphystart, u_int ttphysize, u_int stphysize, 182 char *esym_addr) 183 /* id: Machine id */ 184 /* ttphystart, ttphysize: Start address and size of TT-ram */ 185 /* stphysize: Size of ST-ram */ 186 /* esym_addr: Address of kernel '_esym' symbol */ 187 { 188 extern char end[]; 189 extern void etext(void); 190 extern u_long protorp[2]; 191 paddr_t pstart; /* Next available physical address */ 192 vaddr_t vstart; /* Next available virtual address */ 193 vsize_t avail; 194 paddr_t ptpa; 195 psize_t ptsize; 196 u_int ptextra; 197 vaddr_t kva; 198 u_int tc, i; 199 pt_entry_t *pg, *epg; 200 pt_entry_t pg_proto; 201 vaddr_t end_loaded; 202 paddr_t kbase; 203 u_int kstsize; 204 paddr_t Sysseg_pa; 205 paddr_t Sysptmap_pa; 206 207 #if defined(_MILANHW_) 208 /* XXX 209 * XXX The right place todo this is probably the booter (Leo) 210 * XXX More than 16MB memory is not yet supported on the Milan! 211 * The Milan Lies about the presence of TT-RAM. If you insert 212 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM, 213 * starting at address 16MB. 214 */ 215 stphysize += ttphysize; 216 ttphysize = ttphystart = 0; 217 #endif 218 boot_segs[0].start = 0; 219 boot_segs[0].end = stphysize; 220 boot_segs[1].start = ttphystart; 221 boot_segs[1].end = ttphystart + ttphysize; 222 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */ 223 224 /* 225 * The following is a hack. We do not know how much ST memory we 226 * really need until after configuration has finished. At this 227 * time I have no idea how to grab ST memory at that time. 228 * The round_page() call is ment to correct errors made by 229 * binpatching! 230 */ 231 st_pool_size = m68k_round_page(st_pool_size); 232 st_pool_phys = stphysize - st_pool_size; 233 stphysize = st_pool_phys; 234 235 machineid = id; 236 esym = esym_addr; 237 238 /* 239 * the kernel ends at end() or esym. 240 */ 241 if (esym == NULL) 242 end_loaded = (vaddr_t)&end; 243 else 244 end_loaded = (vaddr_t)esym; 245 246 /* 247 * If we have enough fast-memory to put the kernel in and the 248 * RELOC_KERNEL option is set, do it! 249 */ 250 if ((reloc_kernel != 0) && (ttphysize >= end_loaded)) 251 kbase = ttphystart; 252 else 253 kbase = 0; 254 255 /* 256 * Determine the type of machine we are running on. This needs 257 * to be done early (and before initcpu())! 258 */ 259 set_machtype(); 260 261 /* 262 * Initialize CPU specific stuff 263 */ 264 initcpu(); 265 266 /* 267 * We run the kernel from ST memory at the moment. 268 * The kernel segment table is put just behind the loaded image. 269 * pstart: start of usable ST memory 270 * avail : size of ST memory available. 271 */ 272 vstart = (vaddr_t)end_loaded; 273 vstart = m68k_round_page(vstart); 274 pstart = (paddr_t)vstart; /* pre-reloc PA == kernel VA here */ 275 avail = stphysize - pstart; 276 277 /* 278 * Save KVA of proc0 user-area and allocate it 279 */ 280 proc0paddr = vstart; 281 pstart += USPACE; 282 vstart += USPACE; 283 avail -= USPACE; 284 285 /* 286 * Calculate the number of pages needed for Sysseg. 287 * For the 68030, we need 256 descriptors (segment-table-entries). 288 * This easily fits into one page. 289 * For the 68040, both the level-1 and level-2 descriptors are 290 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE 291 * level-1 & level-2 tables. 292 */ 293 #if defined(M68040) || defined(M68060) 294 if (mmutype == MMU_68040) 295 kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); 296 else 297 #endif 298 kstsize = 1; 299 /* 300 * allocate the kernel segment table 301 */ 302 Sysseg_pa = pstart; /* pre-reloc PA to init STEs */ 303 Sysseg = (st_entry_t *)vstart; 304 pstart += kstsize * PAGE_SIZE; 305 vstart += kstsize * PAGE_SIZE; 306 avail -= kstsize * PAGE_SIZE; 307 308 /* 309 * allocate kernel page table map 310 */ 311 Sysptmap_pa = pstart; /* pre-reloc PA to init PTEs */ 312 Sysptmap = (pt_entry_t *)vstart; 313 pstart += PAGE_SIZE; 314 vstart += PAGE_SIZE; 315 avail -= PAGE_SIZE; 316 317 /* 318 * Determine the number of pte's we need for extra's like 319 * ST I/O map's. 320 */ 321 ptextra = btoc(STIO_SIZE); 322 323 /* 324 * If present, add pci areas 325 */ 326 if (machineid & ATARI_HADES) 327 ptextra += btoc(PCI_CONFIG_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE); 328 if (machineid & ATARI_MILAN) 329 ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE); 330 ptextra += btoc(BOOTM_VA_POOL); 331 332 /* 333 * The 'pt' (the initial kernel pagetable) has to map the kernel and 334 * the I/O areas. The various I/O areas are mapped (virtually) at 335 * the top of the address space mapped by 'pt' (ie. just below Sysmap). 336 */ 337 ptpa = pstart; /* pre-reloc PA to init PTEs */ 338 ptsize = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT; 339 pstart += ptsize; 340 vstart += ptsize; 341 avail -= ptsize; 342 343 /* 344 * Sysmap is now placed at the end of Supervisor virtual address space. 345 */ 346 Sysmap = (pt_entry_t *)-(NPTEPG * PAGE_SIZE); 347 348 /* 349 * Initialize segment tables 350 */ 351 #if defined(M68040) || defined(M68060) 352 if (mmutype == MMU_68040) 353 mmu040_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 354 kbase); 355 else 356 #endif /* defined(M68040) || defined(M68060) */ 357 mmu030_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 358 kbase); 359 360 /* 361 * initialize kernel page table page(s). 362 * Assume load at VA 0. 363 * - Text pages are RO 364 * - Page zero is invalid 365 */ 366 pg_proto = RELOC_PA(kbase, 0) | PG_RO | PG_V; 367 pg = (pt_entry_t *)ptpa; 368 *pg++ = PG_NV; 369 370 pg_proto += PAGE_SIZE; 371 for (kva = PAGE_SIZE; kva < (vaddr_t)etext; kva += PAGE_SIZE) { 372 *pg++ = pg_proto; 373 pg_proto += PAGE_SIZE; 374 } 375 376 /* 377 * data, bss and dynamic tables are read/write 378 */ 379 pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V; 380 381 #if defined(M68040) || defined(M68060) 382 /* 383 * Map the kernel segment table cache invalidated for 384 * these machines (for the 68040 not strictly necessary, but 385 * recommended by Motorola; for the 68060 mandatory) 386 */ 387 if (mmutype == MMU_68040) { 388 389 if (kernel_copyback) 390 pg_proto |= PG_CCB; 391 392 for (; kva < (vaddr_t)Sysseg; kva += PAGE_SIZE) { 393 *pg++ = pg_proto; 394 pg_proto += PAGE_SIZE; 395 } 396 397 pg_proto = (pg_proto & ~PG_CCB) | PG_CI; 398 for (; kva < (vaddr_t)Sysptmap; kva += PAGE_SIZE) { 399 *pg++ = pg_proto; 400 pg_proto += PAGE_SIZE; 401 } 402 403 pg_proto = (pg_proto & ~PG_CI); 404 if (kernel_copyback) 405 pg_proto |= PG_CCB; 406 } 407 #endif /* defined(M68040) || defined(M68060) */ 408 409 /* 410 * go till end of data allocated so far 411 * plus proc0 u-area (to be allocated) 412 */ 413 for (; kva < vstart; kva += PAGE_SIZE) { 414 *pg++ = pg_proto; 415 pg_proto += PAGE_SIZE; 416 } 417 418 /* 419 * invalidate remainder of kernel PT 420 */ 421 epg = (pt_entry_t *)ptpa; 422 epg = &epg[ptsize / sizeof(pt_entry_t)]; 423 while (pg < epg) 424 *pg++ = PG_NV; 425 426 /* 427 * Map various I/O areas 428 */ 429 map_io_areas(ptpa, ptsize, ptextra); 430 431 /* 432 * Map the allocated space in ST-ram now. In the contig-case, there 433 * is no need to make a distinction between virtual and physical 434 * addresses. But I make it anyway to be prepared. 435 * Physcal space is already reserved! 436 */ 437 st_pool_virt = vstart; 438 pg = (pt_entry_t *)ptpa; 439 pg = &pg[vstart / PAGE_SIZE]; 440 pg_proto = st_pool_phys | PG_RW | PG_CI | PG_V; 441 vstart += st_pool_size; 442 while (pg_proto < (st_pool_phys + st_pool_size)) { 443 *pg++ = pg_proto; 444 pg_proto += PAGE_SIZE; 445 } 446 447 /* 448 * Map physical page_zero and page-zero+1 (First ST-ram page). We need 449 * to reference it in the reboot code. Two pages are mapped, because 450 * we must make sure 'doboot()' is contained in it (see the tricky 451 * copying there....). 452 */ 453 page_zero = vstart; 454 pg = (pt_entry_t *)ptpa; 455 pg = &pg[vstart / PAGE_SIZE]; 456 *pg++ = PG_RW | PG_CI | PG_V; 457 vstart += PAGE_SIZE; 458 *pg = PG_RW | PG_CI | PG_V | PAGE_SIZE; 459 vstart += PAGE_SIZE; 460 461 /* 462 * All necessary STEs and PTEs have been initialized. 463 * Update Sysseg_pa and Sysptmap_pa to point relocated PA. 464 */ 465 if (kbase) { 466 Sysseg_pa += kbase; 467 Sysptmap_pa += kbase; 468 } 469 470 lowram = 0 >> PGSHIFT; /* XXX */ 471 472 /* 473 * Fill in usable segments. The page indexes will be initialized 474 * later when all reservations are made. 475 */ 476 usable_segs[0].start = 0; 477 usable_segs[0].end = stphysize; 478 usable_segs[0].free_list = VM_FREELIST_STRAM; 479 usable_segs[1].start = ttphystart; 480 usable_segs[1].end = ttphystart + ttphysize; 481 usable_segs[1].free_list = VM_FREELIST_TTRAM; 482 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */ 483 484 if (kbase) { 485 /* 486 * First page of ST-ram is unusable, reserve the space 487 * for the kernel in the TT-ram segment. 488 * Note: Because physical page-zero is partially mapped to ROM 489 * by hardware, it is unusable. 490 */ 491 usable_segs[0].start = PAGE_SIZE; 492 usable_segs[1].start += pstart; 493 } else 494 usable_segs[0].start += pstart; 495 496 /* 497 * As all segment sizes are now valid, calculate page indexes and 498 * available physical memory. 499 */ 500 usable_segs[0].first_page = 0; 501 for (i = 1; usable_segs[i].start; i++) { 502 usable_segs[i].first_page = usable_segs[i-1].first_page; 503 usable_segs[i].first_page += 504 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE; 505 } 506 for (i = 0, physmem = 0; usable_segs[i].start; i++) 507 physmem += usable_segs[i].end - usable_segs[i].start; 508 physmem >>= PGSHIFT; 509 510 /* 511 * get the pmap module in sync with reality. 512 */ 513 pmap_bootstrap(vstart, Sysseg_pa); 514 515 /* 516 * Prepare to enable the MMU. 517 * Setup and load SRP nolimit, share global, 4 byte PTE's 518 */ 519 protorp[0] = 0x80000202; 520 protorp[1] = Sysseg_pa; /* + segtable address */ 521 522 cpu_init_kcorehdr(kbase, Sysseg_pa); 523 524 /* 525 * copy over the kernel (and all now initialized variables) 526 * to fastram. DONT use bcopy(), this beast is much larger 527 * than 128k ! 528 */ 529 if (kbase) { 530 register paddr_t *lp, *le, *fp; 531 532 lp = (paddr_t *)0; 533 le = (paddr_t *)pstart; 534 fp = (paddr_t *)kbase; 535 while(lp < le) 536 *fp++ = *lp++; 537 } 538 #if defined(M68040) || defined(M68060) 539 if (mmutype == MMU_68040) { 540 /* 541 * movel Sysseg_pa,a0; 542 * movec a0,SRP; 543 * pflusha; 544 * movel #$0xc000,d0; 545 * movec d0,TC 546 */ 547 if (cputype == CPU_68060) { 548 /* XXX: Need the branch cache be cleared? */ 549 __asm volatile (".word 0x4e7a,0x0002;" 550 "orl #0x400000,%%d0;" 551 ".word 0x4e7b,0x0002" : : : "d0"); 552 } 553 __asm volatile ("movel %0,%%a0;" 554 ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0"); 555 __asm volatile (".word 0xf518" : : ); 556 __asm volatile ("movel #0xc000,%%d0;" 557 ".word 0x4e7b,0x0003" : : : "d0" ); 558 } else 559 #endif 560 { 561 __asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0])); 562 /* 563 * setup and load TC register. 564 * enable_cpr, enable_srp, pagesize=8k, 565 * A = 8 bits, B = 11 bits 566 */ 567 tc = 0x82d08b00; 568 __asm volatile ("pmove %0@,%%tc" : : "a" (&tc)); 569 } 570 571 /* Is this to fool the optimizer?? */ 572 i = *(int *)proc0paddr; 573 *(volatile int *)proc0paddr = i; 574 575 /* 576 * Initialize the "u-area" pages. 577 * Must initialize p_addr before autoconfig or the 578 * fault handler will get a NULL reference. 579 */ 580 memset((u_char *)proc0paddr, 0, USPACE); 581 lwp0.l_addr = (struct user *)proc0paddr; 582 curlwp = &lwp0; 583 curpcb = &((struct user *)proc0paddr)->u_pcb; 584 585 /* 586 * Get the hardware into a defined state 587 */ 588 atari_hwinit(); 589 590 /* 591 * Initialize stmem allocator 592 */ 593 init_stmem(); 594 595 /* 596 * Initialize the I/O mem extent map. 597 * Note: we don't have to check the return value since 598 * creation of a fixed extent map will never fail (since 599 * descriptor storage has already been allocated). 600 * 601 * N.B. The iomem extent manages _all_ physical addresses 602 * on the machine. When the amount of RAM is found, all 603 * extents of RAM are allocated from the map. 604 */ 605 iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF, 606 (void *)iomem_ex_storage, sizeof(iomem_ex_storage), 607 EX_NOCOALESCE|EX_NOWAIT); 608 609 /* 610 * Allocate the physical RAM from the extent map 611 */ 612 for (i = 0; boot_segs[i].end != 0; i++) { 613 if (extent_alloc_region(iomem_ex, boot_segs[i].start, 614 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) { 615 /* XXX: Ahum, should not happen ;-) */ 616 printf("Warning: Cannot allocate boot memory from" 617 " extent map!?\n"); 618 } 619 } 620 621 /* 622 * Initialize interrupt mapping. 623 */ 624 intr_init(); 625 } 626 627 /* 628 * Try to figure out on what type of machine we are running 629 * Note: This module runs *before* the io-mapping is setup! 630 */ 631 static void 632 set_machtype(void) 633 { 634 635 #ifdef _MILANHW_ 636 machineid |= ATARI_MILAN; 637 638 #else 639 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */ 640 if (badbaddr((void *)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) { 641 /* 642 * Watch out! We can also have a Hades with < 16Mb 643 * RAM here... 644 */ 645 if (!badbaddr((void *)__UNVOLATILE(&MFP->mf_gpip), 646 sizeof(char))) { 647 machineid |= ATARI_FALCON; 648 return; 649 } 650 } 651 if (!badbaddr((void *)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char))) 652 machineid |= ATARI_HADES; 653 else 654 machineid |= ATARI_TT; 655 #endif /* _MILANHW_ */ 656 } 657 658 static void 659 atari_hwinit(void) 660 { 661 662 #if defined(_ATARIHW_) 663 /* 664 * Initialize the sound chip 665 */ 666 ym2149_init(); 667 668 /* 669 * Make sure that the midi acia will not generate an interrupt 670 * unless something attaches to it. We cannot do this for the 671 * keyboard acia because this breaks the '-d' option of the 672 * booter... 673 */ 674 MDI->ac_cs = 0; 675 #endif /* defined(_ATARIHW_) */ 676 677 /* 678 * Initialize both MFP chips (if both present!) to generate 679 * auto-vectored interrupts with EOI. The active-edge registers are 680 * set up. The interrupt enable registers are set to disable all 681 * interrupts. 682 */ 683 MFP->mf_iera = MFP->mf_ierb = 0; 684 MFP->mf_imra = MFP->mf_imrb = 0; 685 MFP->mf_aer = MFP->mf_ddr = 0; 686 MFP->mf_vr = 0x40; 687 688 #if defined(_ATARIHW_) 689 if (machineid & (ATARI_TT|ATARI_HADES)) { 690 MFP2->mf_iera = MFP2->mf_ierb = 0; 691 MFP2->mf_imra = MFP2->mf_imrb = 0; 692 MFP2->mf_aer = 0x80; 693 MFP2->mf_vr = 0x50; 694 } 695 696 if (machineid & ATARI_TT) { 697 /* 698 * Initialize the SCU, to enable interrupts on the SCC (ipl5), 699 * MFP (ipl6) and softints (ipl1). 700 */ 701 SCU->sys_mask = SCU_SYS_SOFT; 702 SCU->vme_mask = SCU_MFP | SCU_SCC; 703 #ifdef DDB 704 /* 705 * This allows people with the correct hardware modification 706 * to drop into the debugger from an NMI. 707 */ 708 SCU->sys_mask |= SCU_IRQ7; 709 #endif 710 } 711 #endif /* defined(_ATARIHW_) */ 712 713 /* 714 * Initialize a timer for delay(9). 715 */ 716 init_delay(); 717 718 #if NPCI > 0 719 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 720 /* 721 * Configure PCI-bus 722 */ 723 init_pci_bus(); 724 } 725 #endif 726 727 } 728 729 /* 730 * Do the dull work of mapping the various I/O areas. They MUST be Cache 731 * inhibited! 732 * All I/O areas are virtually mapped at the end of the pt-table. 733 */ 734 static void 735 map_io_areas(paddr_t ptpa, psize_t ptsize, u_int ptextra) 736 /* ptsize: Size of 'pt' in bytes */ 737 /* ptextra: #of additional I/O pte's */ 738 { 739 extern void bootm_init(vaddr_t, pt_entry_t *, u_long); 740 vaddr_t ioaddr; 741 pt_entry_t *pt, *pg, *epg; 742 pt_entry_t pg_proto; 743 u_long mask; 744 745 pt = (pt_entry_t *)ptpa; 746 ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE; 747 748 /* 749 * Map ST-IO area 750 */ 751 stio_addr = ioaddr; 752 ioaddr += STIO_SIZE; 753 pg = &pt[stio_addr / PAGE_SIZE]; 754 epg = &pg[btoc(STIO_SIZE)]; 755 #ifdef _MILANHW_ 756 /* 757 * Turn on byte swaps in the ST I/O area. On the Milan, the 758 * U0 signal of the MMU controls the BigEndian signal 759 * of the PLX9080. We use this setting so we can read/write the 760 * PLX registers (and PCI-config space) in big-endian mode. 761 */ 762 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100; 763 #else 764 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V; 765 #endif 766 while(pg < epg) { 767 *pg++ = pg_proto; 768 pg_proto += PAGE_SIZE; 769 } 770 771 /* 772 * Map PCI areas 773 */ 774 if (machineid & ATARI_HADES) { 775 /* 776 * Only Hades maps the PCI-config space! 777 */ 778 pci_conf_addr = ioaddr; 779 ioaddr += PCI_CONFIG_SIZE; 780 pg = &pt[pci_conf_addr / PAGE_SIZE]; 781 epg = &pg[btoc(PCI_CONFIG_SIZE)]; 782 mask = PCI_CONFM_PHYS; 783 pg_proto = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V; 784 for (; pg < epg; mask <<= 1) 785 *pg++ = pg_proto | mask; 786 } else 787 pci_conf_addr = 0; /* XXX: should crash */ 788 789 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 790 pci_io_addr = ioaddr; 791 ioaddr += PCI_IO_SIZE; 792 pg = &pt[pci_io_addr / PAGE_SIZE]; 793 epg = &pg[btoc(PCI_IO_SIZE)]; 794 pg_proto = PCI_IO_PHYS | PG_RW | PG_CI | PG_V; 795 while (pg < epg) { 796 *pg++ = pg_proto; 797 pg_proto += PAGE_SIZE; 798 } 799 800 pci_mem_addr = ioaddr; 801 /* Provide an uncached PCI address for the MILAN */ 802 pci_mem_uncached = ioaddr; 803 ioaddr += PCI_MEM_SIZE; 804 epg = &pg[btoc(PCI_MEM_SIZE)]; 805 pg_proto = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V; 806 while (pg < epg) { 807 *pg++ = pg_proto; 808 pg_proto += PAGE_SIZE; 809 } 810 } 811 812 bootm_init(ioaddr, pg, BOOTM_VA_POOL); 813 /* 814 * ioaddr += BOOTM_VA_POOL; 815 * pg = &pg[btoc(BOOTM_VA_POOL)]; 816 */ 817 } 818 819 /* 820 * Used by dumpconf() to get the size of the machine-dependent panic-dump 821 * header in disk blocks. 822 */ 823 824 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t))) 825 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1)) 826 827 int 828 cpu_dumpsize(void) 829 { 830 831 return btodb(MDHDRSIZE); 832 } 833 834 /* 835 * Called by dumpsys() to dump the machine-dependent header. 836 * XXX: Assumes that it will all fit in one diskblock. 837 */ 838 int 839 cpu_dump(int (*dump)(dev_t, daddr_t, void *, size_t), daddr_t *p_blkno) 840 { 841 int buf[MDHDRSIZE/sizeof(int)]; 842 int error; 843 kcore_seg_t *kseg_p; 844 cpu_kcore_hdr_t *chdr_p; 845 846 kseg_p = (kcore_seg_t *)buf; 847 chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)]; 848 849 /* 850 * Generate a segment header 851 */ 852 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU); 853 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p)); 854 855 /* 856 * Add the md header 857 */ 858 *chdr_p = cpu_kcore_hdr; 859 error = dump(dumpdev, *p_blkno, (void *)buf, sizeof(buf)); 860 *p_blkno += btodb(sizeof(buf)); 861 return (error); 862 } 863 864 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS) 865 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS" 866 #endif 867 /* 868 * Initialize the cpu_kcore_header. 869 */ 870 static void 871 cpu_init_kcorehdr(paddr_t kbase, paddr_t sysseg_pa) 872 { 873 cpu_kcore_hdr_t *h = &cpu_kcore_hdr; 874 struct m68k_kcore_hdr *m = &h->un._m68k; 875 extern char end[]; 876 int i; 877 878 memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr)); 879 880 /* 881 * Initialize the `dispatcher' portion of the header. 882 */ 883 strcpy(h->name, machine); 884 h->page_size = PAGE_SIZE; 885 h->kernbase = KERNBASE; 886 887 /* 888 * Fill in information about our MMU configuration. 889 */ 890 m->mmutype = mmutype; 891 m->sg_v = SG_V; 892 m->sg_frame = SG_FRAME; 893 m->sg_ishift = SG_ISHIFT; 894 m->sg_pmask = SG_PMASK; 895 m->sg40_shift1 = SG4_SHIFT1; 896 m->sg40_mask2 = SG4_MASK2; 897 m->sg40_shift2 = SG4_SHIFT2; 898 m->sg40_mask3 = SG4_MASK3; 899 m->sg40_shift3 = SG4_SHIFT3; 900 m->sg40_addr1 = SG4_ADDR1; 901 m->sg40_addr2 = SG4_ADDR2; 902 m->pg_v = PG_V; 903 m->pg_frame = PG_FRAME; 904 905 /* 906 * Initialize pointer to kernel segment table. 907 */ 908 m->sysseg_pa = sysseg_pa; /* PA after relocation */ 909 910 /* 911 * Initialize relocation value such that: 912 * 913 * pa = (va - KERNBASE) + reloc 914 */ 915 m->reloc = kbase; 916 917 /* 918 * Define the end of the relocatable range. 919 */ 920 m->relocend = (vaddr_t)end; 921 922 for (i = 0; i < NMEM_SEGS; i++) { 923 m->ram_segs[i].start = boot_segs[i].start; 924 m->ram_segs[i].size = boot_segs[i].end - 925 boot_segs[i].start; 926 } 927 } 928 929 void 930 mmu030_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 931 paddr_t sysptmap_pa, paddr_t kbase) 932 /* sysseg_pa: System segment table */ 933 /* kstsize: size of 'sysseg' in pages */ 934 /* ptpa: Kernel page table */ 935 /* ptsize: size of 'pt' in bytes */ 936 /* sysptmap_pa: System page table */ 937 { 938 st_entry_t sg_proto, *sg, *esg; 939 pt_entry_t pg_proto, *pg, *epg; 940 941 /* 942 * Map the page table pages in both the HW segment table 943 * and the software Sysptmap. 944 */ 945 sg = (st_entry_t *)sysseg_pa; 946 pg = (pt_entry_t *)sysptmap_pa; 947 epg = &pg[ptsize >> PGSHIFT]; 948 sg_proto = RELOC_PA(kbase, ptpa) | SG_RW | SG_V; 949 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 950 while (pg < epg) { 951 *sg++ = sg_proto; 952 *pg++ = pg_proto; 953 sg_proto += PAGE_SIZE; 954 pg_proto += PAGE_SIZE; 955 } 956 957 /* 958 * Invalidate the remainder of the tables. 959 */ 960 esg = (st_entry_t *)sysseg_pa; 961 esg = &esg[256]; /* XXX should be TIA_SIZE */ 962 while (sg < esg) 963 *sg++ = SG_NV; 964 epg = (pt_entry_t *)sysptmap_pa; 965 epg = &epg[NPTEPG]; /* XXX should be TIB_SIZE */ 966 while (pg < epg) 967 *pg++ = PG_NV; 968 969 /* 970 * Initialize the PTE for the last one to point Sysptmap. 971 */ 972 sg = (st_entry_t *)sysseg_pa; 973 sg = &sg[256 - 1]; /* XXX should be TIA_SIZE */ 974 pg = (pt_entry_t *)sysptmap_pa; 975 pg = &pg[256 - 1]; /* XXX should be TIA_SIZE */ 976 *sg = RELOC_PA(kbase, sysptmap_pa) | SG_RW | SG_V; 977 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 978 } 979 980 #if defined(M68040) || defined(M68060) 981 void 982 mmu040_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 983 paddr_t sysptmap_pa, paddr_t kbase) 984 /* sysseg_pa: System segment table */ 985 /* kstsize: size of 'sysseg' in pages */ 986 /* ptpa: Kernel page table */ 987 /* ptsize: size of 'pt' in bytes */ 988 /* sysptmap_pa: System page table */ 989 { 990 int nl1desc, nl2desc, i; 991 st_entry_t sg_proto, *sg, *esg; 992 pt_entry_t pg_proto, *pg, *epg; 993 994 /* 995 * First invalidate the entire "segment table" pages 996 * (levels 1 and 2 have the same "invalid" values). 997 */ 998 sg = (st_entry_t *)sysseg_pa; 999 esg = &sg[kstsize * NPTEPG]; 1000 while (sg < esg) 1001 *sg++ = SG_NV; 1002 1003 /* 1004 * Initialize level 2 descriptors (which immediately 1005 * follow the level 1 table). 1006 * We need: 1007 * NPTEPG / SG4_LEV3SIZE 1008 * level 2 descriptors to map each of the nptpages 1009 * pages of PTEs. Note that we set the "used" bit 1010 * now to save the HW the expense of doing it. 1011 */ 1012 nl2desc = (ptsize >> PGSHIFT) * (NPTEPG / SG4_LEV3SIZE); 1013 sg = (st_entry_t *)sysseg_pa; 1014 sg = &sg[SG4_LEV1SIZE]; 1015 esg = &sg[nl2desc]; 1016 sg_proto = RELOC_PA(kbase, ptpa) | SG_U | SG_RW | SG_V; 1017 while (sg < esg) { 1018 *sg++ = sg_proto; 1019 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1020 } 1021 1022 /* 1023 * Initialize level 1 descriptors. We need: 1024 * howmany(nl2desc, SG4_LEV2SIZE) 1025 * level 1 descriptors to map the 'nl2desc' level 2's. 1026 */ 1027 nl1desc = howmany(nl2desc, SG4_LEV2SIZE); 1028 sg = (st_entry_t *)sysseg_pa; 1029 esg = &sg[nl1desc]; 1030 sg_proto = RELOC_PA(kbase, (paddr_t)&sg[SG4_LEV1SIZE]) 1031 | SG_U | SG_RW | SG_V; 1032 while (sg < esg) { 1033 *sg++ = sg_proto; 1034 sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t)); 1035 } 1036 1037 /* Sysmap is last entry in level 1 */ 1038 sg = (st_entry_t *)sysseg_pa; 1039 sg = &sg[SG4_LEV1SIZE - 1]; 1040 *sg = sg_proto; 1041 1042 /* 1043 * Kernel segment table at end of next level 2 table 1044 */ 1045 i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE); 1046 sg = (st_entry_t *)sysseg_pa; 1047 sg = &sg[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)]; 1048 esg = &sg[NPTEPG / SG4_LEV3SIZE]; 1049 sg_proto = RELOC_PA(kbase, sysptmap_pa) | SG_U | SG_RW | SG_V; 1050 while (sg < esg) { 1051 *sg++ = sg_proto; 1052 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1053 } 1054 1055 /* Include additional level 2 table for Sysmap in protostfree */ 1056 protostfree = (~0 << (1 + nl1desc + 1)) /* & ~(~0 << MAXKL2SIZE) */; 1057 1058 /* 1059 * Initialize Sysptmap 1060 */ 1061 pg = (pt_entry_t *)sysptmap_pa; 1062 epg = &pg[ptsize >> PGSHIFT]; 1063 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 1064 while (pg < epg) { 1065 *pg++ = pg_proto; 1066 pg_proto += PAGE_SIZE; 1067 } 1068 1069 /* 1070 * Invalidate rest of Sysptmap page. 1071 */ 1072 epg = (pt_entry_t *)sysptmap_pa; 1073 epg = &epg[NPTEPG]; /* XXX: should be TIB_SIZE */ 1074 while (pg < epg) 1075 *pg++ = PG_NV; 1076 1077 /* 1078 * Initialize the PTE for the last one to point Sysptmap. 1079 */ 1080 pg = (pt_entry_t *)sysptmap_pa; 1081 pg = &pg[256 - 1]; /* XXX: should be TIA_SIZE */ 1082 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 1083 } 1084 #endif /* M68040 */ 1085 1086 #if defined(M68060) 1087 int m68060_pcr_init = 0x21; /* make this patchable */ 1088 #endif 1089 1090 static void 1091 initcpu(void) 1092 { 1093 typedef void trapfun(void); 1094 1095 switch (cputype) { 1096 1097 #if defined(M68060) 1098 case CPU_68060: 1099 { 1100 extern trapfun *vectab[256]; 1101 extern trapfun buserr60, addrerr4060, fpfault; 1102 #if defined(M060SP) 1103 extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[]; 1104 #else 1105 extern trapfun illinst; 1106 #endif 1107 1108 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : : 1109 "d"(m68060_pcr_init):"d0" ); 1110 1111 /* bus/addrerr vectors */ 1112 vectab[2] = buserr60; 1113 vectab[3] = addrerr4060; 1114 1115 #if defined(M060SP) 1116 /* integer support */ 1117 vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00]; 1118 1119 /* floating point support */ 1120 /* 1121 * XXX maybe we really should run-time check for the 1122 * stack frame format here: 1123 */ 1124 vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30]; 1125 1126 vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38]; 1127 vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40]; 1128 1129 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; 1130 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; 1131 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; 1132 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; 1133 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; 1134 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; 1135 #else 1136 vectab[61] = illinst; 1137 #endif 1138 vectab[48] = fpfault; 1139 } 1140 break; 1141 #endif /* defined(M68060) */ 1142 #if defined(M68040) 1143 case CPU_68040: 1144 { 1145 extern trapfun *vectab[256]; 1146 extern trapfun buserr40, addrerr4060; 1147 1148 /* bus/addrerr vectors */ 1149 vectab[2] = buserr40; 1150 vectab[3] = addrerr4060; 1151 } 1152 break; 1153 #endif /* defined(M68040) */ 1154 #if defined(M68030) || defined(M68020) 1155 case CPU_68030: 1156 case CPU_68020: 1157 { 1158 extern trapfun *vectab[256]; 1159 extern trapfun buserr2030, addrerr2030; 1160 1161 /* bus/addrerr vectors */ 1162 vectab[2] = buserr2030; 1163 vectab[3] = addrerr2030; 1164 } 1165 break; 1166 #endif /* defined(M68030) || defined(M68020) */ 1167 } 1168 1169 DCIS(); 1170 } 1171 1172 #ifdef DEBUG 1173 void dump_segtable(u_int *); 1174 void dump_pagetable(u_int *, u_int, u_int); 1175 u_int vmtophys(u_int *, u_int); 1176 1177 void 1178 dump_segtable(u_int *stp) 1179 { 1180 u_int *s, *es; 1181 int shift, i; 1182 1183 s = stp; 1184 { 1185 es = s + (M68K_STSIZE >> 2); 1186 shift = SG_ISHIFT; 1187 } 1188 1189 /* 1190 * XXX need changes for 68040 1191 */ 1192 for (i = 0; s < es; s++, i++) 1193 if (*s & SG_V) 1194 printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME); 1195 printf("\n"); 1196 } 1197 1198 void 1199 dump_pagetable(u_int *ptp, u_int i, u_int n) 1200 { 1201 u_int *p, *ep; 1202 1203 p = ptp + i; 1204 ep = p + n; 1205 for (; p < ep; p++, i++) 1206 if (*p & PG_V) 1207 printf("$%08x -> $%08x\t", i, *p & PG_FRAME); 1208 printf("\n"); 1209 } 1210 1211 u_int 1212 vmtophys(u_int *ste, u_int vm) 1213 { 1214 1215 ste = (u_int *)(*(ste + (vm >> SEGSHIFT)) & SG_FRAME); 1216 ste += (vm & SG_PMASK) >> PGSHIFT; 1217 return (*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1)); 1218 } 1219 1220 #endif 1221