xref: /netbsd-src/sys/arch/atari/atari/atari_init.c (revision 6a1508dad3515842aa76bf5ec8fc2daab5f5af02)
1 /*	$NetBSD: atari_init.c,v 1.75 2009/03/05 13:42:59 tsutsui Exp $	*/
2 
3 /*
4  * Copyright (c) 1995 Leo Weppelman
5  * Copyright (c) 1994 Michael L. Hitch
6  * Copyright (c) 1993 Markus Wild
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed by Markus Wild.
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.75 2009/03/05 13:42:59 tsutsui Exp $");
37 
38 #include "opt_ddb.h"
39 #include "opt_mbtype.h"
40 #include "opt_m060sp.h"
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/proc.h>
45 #include <sys/user.h>
46 #include <sys/ioctl.h>
47 #include <sys/select.h>
48 #include <sys/tty.h>
49 #include <sys/buf.h>
50 #include <sys/msgbuf.h>
51 #include <sys/mbuf.h>
52 #include <sys/extent.h>
53 #include <sys/protosw.h>
54 #include <sys/domain.h>
55 #include <sys/dkbad.h>
56 #include <sys/reboot.h>
57 #include <sys/exec.h>
58 #include <sys/core.h>
59 #include <sys/kcore.h>
60 
61 #include <uvm/uvm_extern.h>
62 
63 #include <machine/vmparam.h>
64 #include <machine/pte.h>
65 #include <machine/cpu.h>
66 #include <machine/iomap.h>
67 #include <machine/mfp.h>
68 #include <machine/scu.h>
69 #include <machine/acia.h>
70 #include <machine/kcore.h>
71 
72 #include <m68k/cpu.h>
73 #include <m68k/cacheops.h>
74 
75 #include <atari/atari/intr.h>
76 #include <atari/atari/stalloc.h>
77 #include <atari/dev/ym2149reg.h>
78 
79 #include "pci.h"
80 
81 void start_c(int, u_int, u_int, u_int, char *);
82 static void atari_hwinit(void);
83 static void cpu_init_kcorehdr(paddr_t, paddr_t);
84 static void initcpu(void);
85 static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t);
86 static void map_io_areas(paddr_t, psize_t, u_int);
87 static void set_machtype(void);
88 
89 #if defined(M68040) || defined(M68060)
90 static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t);
91 #endif
92 
93 /*
94  * Extent maps to manage all memory space, including I/O ranges.  Allocate
95  * storage for 8 regions in each, initially.  Later, iomem_malloc_safe
96  * will indicate that it's safe to use malloc() to dynamically allocate
97  * region descriptors.
98  * This means that the fixed static storage is only used for registrating
99  * the found memory regions and the bus-mapping of the console.
100  *
101  * The extent maps are not static!  They are used for bus address space
102  * allocation.
103  */
104 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
105 struct extent *iomem_ex;
106 int iomem_malloc_safe;
107 
108 /*
109  * All info needed to generate a panic dump. All fields are setup by
110  * start_c().
111  * XXX: Should sheck usage of phys_segs. There is some unwanted overlap
112  *      here.... Also, the name is badly choosen. Phys_segs contains the
113  *      segment descriptions _after_ reservations are made.
114  * XXX: 'lowram' is obsoleted by the new panicdump format
115  */
116 static cpu_kcore_hdr_t cpu_kcore_hdr;
117 
118 extern u_int 	lowram;
119 extern u_int	proc0paddr;
120 int		machineid, mmutype, cputype, astpending;
121 #if defined(M68040) || defined(M68060)
122 extern int	protostfree;
123 #endif
124 
125 extern char		*esym;
126 extern struct pcb	*curpcb;
127 
128 /*
129  * This is the virtual address of physical page 0. Used by 'do_boot()'.
130  */
131 vaddr_t	page_zero;
132 
133 /*
134  * Crude support for allocation in ST-ram. Currently only used to allocate
135  * video ram.
136  * The physical address is also returned because the video init needs it to
137  * setup the controller at the time the vm-system is not yet operational so
138  * 'kvtop()' cannot be used.
139  */
140 #ifndef ST_POOL_SIZE
141 #define	ST_POOL_SIZE	40			/* XXX: enough? */
142 #endif
143 
144 u_long	st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable	*/
145 u_long	st_pool_virt, st_pool_phys;
146 
147 /*
148  * Are we relocating the kernel to TT-Ram if possible? It is faster, but
149  * it is also reported not to work on all TT's. So the default is NO.
150  */
151 #ifndef	RELOC_KERNEL
152 #define	RELOC_KERNEL	0
153 #endif
154 int	reloc_kernel = RELOC_KERNEL;		/* Patchable	*/
155 
156 /*
157  * this is the C-level entry function, it's called from locore.s.
158  * Preconditions:
159  *	Interrupts are disabled
160  *	PA == VA, we don't have to relocate addresses before enabling
161  *		the MMU
162  * 	Exec is no longer available (because we're loaded all over
163  *		low memory, no ExecBase is available anymore)
164  *
165  * It's purpose is:
166  *	Do the things that are done in locore.s in the hp300 version,
167  *		this includes allocation of kernel maps and enabling the MMU.
168  *
169  * Some of the code in here is `stolen' from Amiga MACH, and was
170  * written by Bryan Ford and Niklas Hallqvist.
171  *
172  * Very crude 68040 support by Michael L. Hitch.
173  */
174 int kernel_copyback = 1;
175 
176 void
177 start_c(id, ttphystart, ttphysize, stphysize, esym_addr)
178 	int	id;			/* Machine id			*/
179 	u_int	ttphystart, ttphysize;	/* Start address and size of TT-ram */
180 	u_int	stphysize;		/* Size of ST-ram 		*/
181 	char	*esym_addr;		/* Address of kernel '_esym' symbol */
182 {
183 	extern char	end[];
184 	extern void	etext(void);
185 	extern u_long	protorp[2];
186 	paddr_t		pstart;		/* Next available physical address */
187 	vaddr_t		vstart;		/* Next available virtual address */
188 	vsize_t		avail;
189 	paddr_t		ptpa;
190 	psize_t		ptsize;
191 	u_int		ptextra;
192 	vaddr_t		kva;
193 	u_int		tc, i;
194 	pt_entry_t	*pg, *epg;
195 	pt_entry_t	pg_proto;
196 	vaddr_t		end_loaded;
197 	paddr_t		kbase;
198 	u_int		kstsize;
199 	paddr_t		Sysseg_pa;
200 	paddr_t		Sysptmap_pa;
201 
202 #if defined(_MILANHW_)
203 	/* XXX
204 	 * XXX The right place todo this is probably the booter (Leo)
205 	 * XXX More than 16MB memory is not yet supported on the Milan!
206 	 * The Milan Lies about the presence of TT-RAM. If you insert
207 	 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM,
208 	 * starting at address 16MB.
209 	 */
210 	stphysize += ttphysize;
211 	ttphysize  = ttphystart = 0;
212 #endif
213 	boot_segs[0].start       = 0;
214 	boot_segs[0].end         = stphysize;
215 	boot_segs[1].start       = ttphystart;
216 	boot_segs[1].end         = ttphystart + ttphysize;
217 	boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */
218 
219 	/*
220 	 * The following is a hack. We do not know how much ST memory we
221 	 * really need until after configuration has finished. At this
222 	 * time I have no idea how to grab ST memory at that time.
223 	 * The round_page() call is ment to correct errors made by
224 	 * binpatching!
225 	 */
226 	st_pool_size   = m68k_round_page(st_pool_size);
227 	st_pool_phys   = stphysize - st_pool_size;
228 	stphysize      = st_pool_phys;
229 
230 	machineid      = id;
231 	esym           = esym_addr;
232 
233 	/*
234 	 * the kernel ends at end() or esym.
235 	 */
236 	if (esym == NULL)
237 		end_loaded = (vaddr_t)&end;
238 	else
239 		end_loaded = (vaddr_t)esym;
240 
241 	/*
242 	 * If we have enough fast-memory to put the kernel in and the
243 	 * RELOC_KERNEL option is set, do it!
244 	 */
245 	if ((reloc_kernel != 0) && (ttphysize >= end_loaded))
246 		kbase = ttphystart;
247 	else
248 		kbase = 0;
249 
250 	/*
251 	 * Determine the type of machine we are running on. This needs
252 	 * to be done early (and before initcpu())!
253 	 */
254 	set_machtype();
255 
256 	/*
257 	 * Initialize CPU specific stuff
258 	 */
259 	initcpu();
260 
261 	/*
262 	 * We run the kernel from ST memory at the moment.
263 	 * The kernel segment table is put just behind the loaded image.
264 	 * pstart: start of usable ST memory
265 	 * avail : size of ST memory available.
266 	 */
267 	vstart = (vaddr_t)end_loaded;
268 	vstart = m68k_round_page(vstart);
269 	pstart = (paddr_t)vstart;	/* pre-reloc PA == kernel VA here */
270 	avail  = stphysize - pstart;
271 
272 	/*
273 	 * Save KVA of proc0 user-area and allocate it
274 	 */
275 	proc0paddr = vstart;
276 	pstart    += USPACE;
277 	vstart    += USPACE;
278 	avail     -= USPACE;
279 
280 	/*
281 	 * Calculate the number of pages needed for Sysseg.
282 	 * For the 68030, we need 256 descriptors (segment-table-entries).
283 	 * This easily fits into one page.
284 	 * For the 68040, both the level-1 and level-2 descriptors are
285 	 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE
286 	 * level-1 & level-2 tables.
287 	 */
288 #if defined(M68040) || defined(M68060)
289 	if (mmutype == MMU_68040)
290 		kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
291 	else
292 #endif
293 		kstsize = 1;
294 	/*
295 	 * allocate the kernel segment table
296 	 */
297 	Sysseg_pa  = pstart;			/* pre-reloc PA to init STEs */
298 	Sysseg     = (st_entry_t *)vstart;
299 	pstart    += kstsize * PAGE_SIZE;
300 	vstart    += kstsize * PAGE_SIZE;
301 	avail     -= kstsize * PAGE_SIZE;
302 
303 	/*
304 	 * allocate kernel page table map
305 	 */
306 	Sysptmap_pa = pstart;			/* pre-reloc PA to init PTEs */
307 	Sysptmap = (pt_entry_t *)vstart;
308 	pstart  += PAGE_SIZE;
309 	vstart  += PAGE_SIZE;
310 	avail   -= PAGE_SIZE;
311 
312 	/*
313 	 * Determine the number of pte's we need for extra's like
314 	 * ST I/O map's.
315 	 */
316 	ptextra = btoc(STIO_SIZE);
317 
318 	/*
319 	 * If present, add pci areas
320 	 */
321 	if (machineid & ATARI_HADES)
322 		ptextra += btoc(PCI_CONF_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE);
323 	if (machineid & ATARI_MILAN)
324 		ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE);
325 	ptextra += btoc(BOOTM_VA_POOL);
326 
327 	/*
328 	 * The 'pt' (the initial kernel pagetable) has to map the kernel and
329 	 * the I/O areas. The various I/O areas are mapped (virtually) at
330 	 * the top of the address space mapped by 'pt' (ie. just below Sysmap).
331 	 */
332 	ptpa	= pstart;			/* pre-reloc PA to init PTEs */
333 	ptsize  = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT;
334 	pstart += ptsize;
335 	vstart += ptsize;
336 	avail  -= ptsize;
337 
338 	/*
339 	 * Sysmap is now placed at the end of Supervisor virtual address space.
340 	 */
341 	Sysmap = (pt_entry_t *)-(NPTEPG * PAGE_SIZE);
342 
343 	/*
344 	 * Initialize segment tables
345 	 */
346 #if defined(M68040) || defined(M68060)
347 	if (mmutype == MMU_68040)
348 		mmu040_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa,
349 		    kbase);
350 	else
351 #endif /* defined(M68040) || defined(M68060) */
352 		mmu030_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa,
353 		    kbase);
354 
355 	/*
356 	 * initialize kernel page table page(s).
357 	 * Assume load at VA 0.
358 	 * - Text pages are RO
359 	 * - Page zero is invalid
360 	 */
361 	pg_proto = (0 + kbase) /* relocated PA */ | PG_RO | PG_V;
362 	pg       = (pt_entry_t *)ptpa;
363 	*pg++    = PG_NV;
364 
365 	pg_proto += PAGE_SIZE;
366 	for (kva = PAGE_SIZE; kva < (vaddr_t)etext; kva += PAGE_SIZE) {
367 		*pg++ = pg_proto;
368 		pg_proto += PAGE_SIZE;
369 	}
370 
371 	/*
372 	 * data, bss and dynamic tables are read/write
373 	 */
374 	pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V;
375 
376 #if defined(M68040) || defined(M68060)
377 	/*
378 	 * Map the kernel segment table cache invalidated for
379 	 * these machines (for the 68040 not strictly necessary, but
380 	 * recommended by Motorola; for the 68060 mandatory)
381 	 */
382 	if (mmutype == MMU_68040) {
383 
384 		if (kernel_copyback)
385 			pg_proto |= PG_CCB;
386 
387 		for (; kva < (vaddr_t)Sysseg; kva += PAGE_SIZE) {
388 			*pg++ = pg_proto;
389 			pg_proto += PAGE_SIZE;
390 		}
391 
392 		pg_proto = (pg_proto & ~PG_CCB) | PG_CI;
393 		for (; kva < (vaddr_t)Sysptmap; kva += PAGE_SIZE) {
394 			*pg++ = pg_proto;
395 			pg_proto += PAGE_SIZE;
396 		}
397 
398 		pg_proto = (pg_proto & ~PG_CI);
399 		if (kernel_copyback)
400 			pg_proto |= PG_CCB;
401 	}
402 #endif /* defined(M68040) || defined(M68060) */
403 
404 	/*
405 	 * go till end of data allocated so far
406 	 * plus proc0 u-area (to be allocated)
407 	 */
408 	for (; kva < vstart; kva += PAGE_SIZE) {
409 		*pg++ = pg_proto;
410 		pg_proto += PAGE_SIZE;
411 	}
412 
413 	/*
414 	 * invalidate remainder of kernel PT
415 	 */
416 	epg = (pt_entry_t *)ptpa;
417 	epg = &epg[ptsize / sizeof(pt_entry_t)];
418 	while (pg < epg)
419 		*pg++ = PG_NV;
420 
421 	/*
422 	 * Map various I/O areas
423 	 */
424 	map_io_areas(ptpa, ptsize, ptextra);
425 
426 	/*
427 	 * Map the allocated space in ST-ram now. In the contig-case, there
428 	 * is no need to make a distinction between virtual and physical
429 	 * addresses. But I make it anyway to be prepared.
430 	 * Physcal space is already reserved!
431 	 */
432 	st_pool_virt = vstart;
433 	pg           = (pt_entry_t *)ptpa;
434 	pg           = &pg[vstart / PAGE_SIZE];
435 	pg_proto     = st_pool_phys | PG_RW | PG_CI | PG_V;
436 	vstart      += st_pool_size;
437 	while (pg_proto < (st_pool_phys + st_pool_size)) {
438 		*pg++     = pg_proto;
439 		pg_proto += PAGE_SIZE;
440 	}
441 
442 	/*
443 	 * Map physical page_zero and page-zero+1 (First ST-ram page). We need
444 	 * to reference it in the reboot code. Two pages are mapped, because
445 	 * we must make sure 'doboot()' is contained in it (see the tricky
446 	 * copying there....).
447 	 */
448 	page_zero  = vstart;
449 	pg         = (pt_entry_t *)ptpa;
450 	pg         = &pg[vstart / PAGE_SIZE];
451 	*pg++      = PG_RW | PG_CI | PG_V;
452 	vstart    += PAGE_SIZE;
453 	*pg        = PG_RW | PG_CI | PG_V | PAGE_SIZE;
454 	vstart    += PAGE_SIZE;
455 
456 	/*
457 	 * All necessary STEs and PTEs have been initialized.
458 	 * Update Sysseg_pa and Sysptmap_pa to point relocated PA.
459 	 */
460 	if (kbase) {
461 		Sysseg_pa   += kbase;
462 		Sysptmap_pa += kbase;
463 	}
464 
465 	lowram  = 0 >> PGSHIFT; /* XXX */
466 
467 	/*
468 	 * Fill in usable segments. The page indexes will be initialized
469 	 * later when all reservations are made.
470 	 */
471 	usable_segs[0].start = 0;
472 	usable_segs[0].end   = stphysize;
473 	usable_segs[1].start = ttphystart;
474 	usable_segs[1].end   = ttphystart + ttphysize;
475 	usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */
476 
477 	if (kbase) {
478 		/*
479 		 * First page of ST-ram is unusable, reserve the space
480 		 * for the kernel in the TT-ram segment.
481 		 * Note: Because physical page-zero is partially mapped to ROM
482 		 *       by hardware, it is unusable.
483 		 */
484 		usable_segs[0].start  = PAGE_SIZE;
485 		usable_segs[1].start += pstart;
486 	} else
487 		usable_segs[0].start += pstart;
488 
489 	/*
490 	 * As all segment sizes are now valid, calculate page indexes and
491 	 * available physical memory.
492 	 */
493 	usable_segs[0].first_page = 0;
494 	for (i = 1; usable_segs[i].start; i++) {
495 		usable_segs[i].first_page  = usable_segs[i-1].first_page;
496 		usable_segs[i].first_page +=
497 		    (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE;
498 	}
499 	for (i = 0, physmem = 0; usable_segs[i].start; i++)
500 		physmem += usable_segs[i].end - usable_segs[i].start;
501 	physmem >>= PGSHIFT;
502 
503 	/*
504 	 * get the pmap module in sync with reality.
505 	 */
506 	pmap_bootstrap(vstart, Sysseg_pa);
507 
508 	/*
509 	 * Prepare to enable the MMU.
510 	 * Setup and load SRP nolimit, share global, 4 byte PTE's
511 	 */
512 	protorp[0] = 0x80000202;
513 	protorp[1] = Sysseg_pa;			/* + segtable address */
514 
515 	cpu_init_kcorehdr(kbase, Sysseg_pa);
516 
517 	/*
518 	 * copy over the kernel (and all now initialized variables)
519 	 * to fastram.  DONT use bcopy(), this beast is much larger
520 	 * than 128k !
521 	 */
522 	if (kbase) {
523 		register paddr_t *lp, *le, *fp;
524 
525 		lp = (paddr_t *)0;
526 		le = (paddr_t *)pstart;
527 		fp = (paddr_t *)kbase;
528 		while(lp < le)
529 			*fp++ = *lp++;
530 	}
531 #if defined(M68040) || defined(M68060)
532 	if (mmutype == MMU_68040) {
533 		/*
534 		 * movel Sysseg_pa,a0;
535 		 * movec a0,SRP;
536 		 * pflusha;
537 		 * movel #$0xc000,d0;
538 		 * movec d0,TC
539 		 */
540 		if (cputype == CPU_68060) {
541 			/* XXX: Need the branch cache be cleared? */
542 			__asm volatile (".word 0x4e7a,0x0002;"
543 				      "orl #0x400000,%%d0;"
544 				      ".word 0x4e7b,0x0002" : : : "d0");
545 		}
546 		__asm volatile ("movel %0,%%a0;"
547 			      ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0");
548 		__asm volatile (".word 0xf518" : : );
549 		__asm volatile ("movel #0xc000,%%d0;"
550 			      ".word 0x4e7b,0x0003" : : : "d0" );
551 	} else
552 #endif
553 	{
554 		__asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0]));
555 		/*
556 		 * setup and load TC register.
557 		 * enable_cpr, enable_srp, pagesize=8k,
558 		 * A = 8 bits, B = 11 bits
559 		 */
560 		tc = 0x82d08b00;
561 		__asm volatile ("pmove %0@,%%tc" : : "a" (&tc));
562 	}
563 
564 	/* Is this to fool the optimizer?? */
565 	i = *(int *)proc0paddr;
566 	*(volatile int *)proc0paddr = i;
567 
568 	/*
569 	 * Initialize the "u-area" pages.
570 	 * Must initialize p_addr before autoconfig or the
571 	 * fault handler will get a NULL reference.
572 	 */
573 	bzero((u_char *)proc0paddr, USPACE);
574 	lwp0.l_addr = (struct user *)proc0paddr;
575 	curlwp = &lwp0;
576 	curpcb  = &((struct user *)proc0paddr)->u_pcb;
577 
578 	/*
579 	 * Get the hardware into a defined state
580 	 */
581 	atari_hwinit();
582 
583 	/*
584 	 * Initialize stmem allocator
585 	 */
586 	init_stmem();
587 
588 	/*
589 	 * Initialize the I/O mem extent map.
590 	 * Note: we don't have to check the return value since
591 	 * creation of a fixed extent map will never fail (since
592 	 * descriptor storage has already been allocated).
593 	 *
594 	 * N.B. The iomem extent manages _all_ physical addresses
595 	 * on the machine.  When the amount of RAM is found, all
596 	 * extents of RAM are allocated from the map.
597 	 */
598 	iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF,
599 	    (void *)iomem_ex_storage, sizeof(iomem_ex_storage),
600 	    EX_NOCOALESCE|EX_NOWAIT);
601 
602 	/*
603 	 * Allocate the physical RAM from the extent map
604 	 */
605 	for (i = 0; boot_segs[i].end != 0; i++) {
606 		if (extent_alloc_region(iomem_ex, boot_segs[i].start,
607 		    boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) {
608 			/* XXX: Ahum, should not happen ;-) */
609 			printf("Warning: Cannot allocate boot memory from"
610 			    " extent map!?\n");
611 		}
612 	}
613 
614 	/*
615 	 * Initialize interrupt mapping.
616 	 */
617 	intr_init();
618 }
619 
620 /*
621  * Try to figure out on what type of machine we are running
622  * Note: This module runs *before* the io-mapping is setup!
623  */
624 static void
625 set_machtype(void)
626 {
627 
628 #ifdef _MILANHW_
629 	machineid |= ATARI_MILAN;
630 
631 #else
632 	stio_addr = 0xff8000;	/* XXX: For TT & Falcon only */
633 	if (badbaddr((void *)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) {
634 		/*
635 		 * Watch out! We can also have a Hades with < 16Mb
636 		 * RAM here...
637 		 */
638 		if (!badbaddr((void *)__UNVOLATILE(&MFP->mf_gpip),
639 		    sizeof(char))) {
640 			machineid |= ATARI_FALCON;
641 			return;
642 		}
643 	}
644 	if (!badbaddr((void *)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char)))
645 		machineid |= ATARI_HADES;
646 	else
647 		machineid |= ATARI_TT;
648 #endif /* _MILANHW_ */
649 }
650 
651 static void
652 atari_hwinit(void)
653 {
654 
655 #if defined(_ATARIHW_)
656 	/*
657 	 * Initialize the sound chip
658 	 */
659 	ym2149_init();
660 
661 	/*
662 	 * Make sure that the midi acia will not generate an interrupt
663 	 * unless something attaches to it. We cannot do this for the
664 	 * keyboard acia because this breaks the '-d' option of the
665 	 * booter...
666 	 */
667 	MDI->ac_cs = 0;
668 #endif /* defined(_ATARIHW_) */
669 
670 	/*
671 	 * Initialize both MFP chips (if both present!) to generate
672 	 * auto-vectored interrupts with EOI. The active-edge registers are
673 	 * set up. The interrupt enable registers are set to disable all
674 	 * interrupts.
675 	 */
676 	MFP->mf_iera  = MFP->mf_ierb = 0;
677 	MFP->mf_imra  = MFP->mf_imrb = 0;
678 	MFP->mf_aer   = MFP->mf_ddr  = 0;
679 	MFP->mf_vr    = 0x40;
680 
681 #if defined(_ATARIHW_)
682 	if (machineid & (ATARI_TT|ATARI_HADES)) {
683 		MFP2->mf_iera = MFP2->mf_ierb = 0;
684 		MFP2->mf_imra = MFP2->mf_imrb = 0;
685 		MFP2->mf_aer  = 0x80;
686 		MFP2->mf_vr   = 0x50;
687 	}
688 
689 	if (machineid & ATARI_TT) {
690 		/*
691 		 * Initialize the SCU, to enable interrupts on the SCC (ipl5),
692 		 * MFP (ipl6) and softints (ipl1).
693 		 */
694 		SCU->sys_mask = SCU_SYS_SOFT;
695 		SCU->vme_mask = SCU_MFP | SCU_SCC;
696 #ifdef DDB
697 		/*
698 		 * This allows people with the correct hardware modification
699 		 * to drop into the debugger from an NMI.
700 		 */
701 		SCU->sys_mask |= SCU_IRQ7;
702 #endif
703 	}
704 #endif /* defined(_ATARIHW_) */
705 
706 #if NPCI > 0
707 	if (machineid & (ATARI_HADES|ATARI_MILAN)) {
708 		/*
709 		 * Configure PCI-bus
710 		 */
711 		init_pci_bus();
712 	}
713 #endif
714 
715 }
716 
717 /*
718  * Do the dull work of mapping the various I/O areas. They MUST be Cache
719  * inhibited!
720  * All I/O areas are virtually mapped at the end of the pt-table.
721  */
722 static void
723 map_io_areas(ptpa, ptsize, ptextra)
724 	paddr_t		ptpa;
725 	psize_t		ptsize;		/* Size of 'pt' in bytes	*/
726 	u_int		ptextra;	/* #of additional I/O pte's	*/
727 {
728 	extern void	bootm_init(vaddr_t, pt_entry_t *, u_long);
729 	vaddr_t		ioaddr;
730 	pt_entry_t	*pt, *pg, *epg;
731 	pt_entry_t	pg_proto;
732 	u_long		mask;
733 
734 	pt = (pt_entry_t *)ptpa;
735 	ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE;
736 
737 	/*
738 	 * Map ST-IO area
739 	 */
740 	stio_addr = ioaddr;
741 	ioaddr   += STIO_SIZE;
742 	pg        = &pt[stio_addr / PAGE_SIZE];
743 	epg       = &pg[btoc(STIO_SIZE)];
744 #ifdef _MILANHW_
745 	/*
746 	 * Turn on byte swaps in the ST I/O area. On the Milan, the
747 	 * U0 signal of the MMU controls the BigEndian signal
748 	 * of the PLX9080. We use this setting so we can read/write the
749 	 * PLX registers (and PCI-config space) in big-endian mode.
750 	 */
751 	pg_proto  = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100;
752 #else
753 	pg_proto  = STIO_PHYS | PG_RW | PG_CI | PG_V;
754 #endif
755 	while(pg < epg) {
756 		*pg++     = pg_proto;
757 		pg_proto += PAGE_SIZE;
758 	}
759 
760 	/*
761 	 * Map PCI areas
762 	 */
763 	if (machineid & ATARI_HADES) {
764 		/*
765 		 * Only Hades maps the PCI-config space!
766 		 */
767 		pci_conf_addr = ioaddr;
768 		ioaddr       += PCI_CONF_SIZE;
769 		pg            = &pt[pci_conf_addr / PAGE_SIZE];
770 		epg           = &pg[btoc(PCI_CONF_SIZE)];
771 		mask          = PCI_CONFM_PHYS;
772 		pg_proto      = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V;
773 		for (; pg < epg; mask <<= 1)
774 			*pg++ = pg_proto | mask;
775 	} else
776 		pci_conf_addr = 0; /* XXX: should crash */
777 
778 	if (machineid & (ATARI_HADES|ATARI_MILAN)) {
779 		pci_io_addr   = ioaddr;
780 		ioaddr       += PCI_IO_SIZE;
781 		pg	      = &pt[pci_io_addr / PAGE_SIZE];
782 		epg           = &pg[btoc(PCI_IO_SIZE)];
783 		pg_proto      = PCI_IO_PHYS | PG_RW | PG_CI | PG_V;
784 		while (pg < epg) {
785 			*pg++     = pg_proto;
786 			pg_proto += PAGE_SIZE;
787 		}
788 
789 		pci_mem_addr  = ioaddr;
790 		/* Provide an uncached PCI address for the MILAN */
791 		pci_mem_uncached = ioaddr;
792 		ioaddr       += PCI_MEM_SIZE;
793 		epg           = &pg[btoc(PCI_MEM_SIZE)];
794 		pg_proto      = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V;
795 		while (pg < epg) {
796 			*pg++     = pg_proto;
797 			pg_proto += PAGE_SIZE;
798 		}
799 	}
800 
801 	bootm_init(ioaddr, pg, BOOTM_VA_POOL);
802 	/*
803 	 * ioaddr += BOOTM_VA_POOL;
804 	 * pg = &pg[btoc(BOOTM_VA_POOL)];
805 	 */
806 }
807 
808 /*
809  * Used by dumpconf() to get the size of the machine-dependent panic-dump
810  * header in disk blocks.
811  */
812 
813 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t)))
814 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1))
815 
816 int
817 cpu_dumpsize(void)
818 {
819 
820 	return btodb(MDHDRSIZE);
821 }
822 
823 /*
824  * Called by dumpsys() to dump the machine-dependent header.
825  * XXX: Assumes that it will all fit in one diskblock.
826  */
827 int
828 cpu_dump(int (*dump)(dev_t, daddr_t, void *, size_t), daddr_t *p_blkno)
829 {
830 	int		buf[MDHDRSIZE/sizeof(int)];
831 	int		error;
832 	kcore_seg_t	*kseg_p;
833 	cpu_kcore_hdr_t	*chdr_p;
834 
835 	kseg_p = (kcore_seg_t *)buf;
836 	chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)];
837 
838 	/*
839 	 * Generate a segment header
840 	 */
841 	CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU);
842 	kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p));
843 
844 	/*
845 	 * Add the md header
846 	 */
847 	*chdr_p = cpu_kcore_hdr;
848 	error = dump(dumpdev, *p_blkno, (void *)buf, sizeof(buf));
849 	*p_blkno += btodb(sizeof(buf));
850 	return (error);
851 }
852 
853 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS)
854 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS"
855 #endif
856 /*
857  * Initialize the cpu_kcore_header.
858  */
859 static void
860 cpu_init_kcorehdr(kbase, sysseg_pa)
861 	paddr_t	kbase;
862 	paddr_t sysseg_pa;
863 {
864 	cpu_kcore_hdr_t *h = &cpu_kcore_hdr;
865 	struct m68k_kcore_hdr *m = &h->un._m68k;
866 	extern char end[];
867 	int	i;
868 
869 	bzero(&cpu_kcore_hdr, sizeof(cpu_kcore_hdr));
870 
871 	/*
872 	 * Initialize the `dispatcher' portion of the header.
873 	 */
874 	strcpy(h->name, machine);
875 	h->page_size = PAGE_SIZE;
876 	h->kernbase = KERNBASE;
877 
878 	/*
879 	 * Fill in information about our MMU configuration.
880 	 */
881 	m->mmutype	= mmutype;
882 	m->sg_v		= SG_V;
883 	m->sg_frame	= SG_FRAME;
884 	m->sg_ishift	= SG_ISHIFT;
885 	m->sg_pmask	= SG_PMASK;
886 	m->sg40_shift1	= SG4_SHIFT1;
887 	m->sg40_mask2	= SG4_MASK2;
888 	m->sg40_shift2	= SG4_SHIFT2;
889 	m->sg40_mask3	= SG4_MASK3;
890 	m->sg40_shift3	= SG4_SHIFT3;
891 	m->sg40_addr1	= SG4_ADDR1;
892 	m->sg40_addr2	= SG4_ADDR2;
893 	m->pg_v		= PG_V;
894 	m->pg_frame	= PG_FRAME;
895 
896 	/*
897 	 * Initialize pointer to kernel segment table.
898 	 */
899 	m->sysseg_pa = sysseg_pa;		/* PA after relocation */
900 
901 	/*
902 	 * Initialize relocation value such that:
903 	 *
904 	 *	pa = (va - KERNBASE) + reloc
905 	 */
906 	m->reloc = kbase;
907 
908 	/*
909 	 * Define the end of the relocatable range.
910 	 */
911 	m->relocend = (vaddr_t)end;
912 
913 	for (i = 0; i < NMEM_SEGS; i++) {
914 		m->ram_segs[i].start = boot_segs[i].start;
915 		m->ram_segs[i].size  = boot_segs[i].end -
916 		    boot_segs[i].start;
917 	}
918 }
919 
920 void
921 mmu030_setup(sysseg_pa, kstsize, ptpa, ptsize, sysptmap_pa, kbase)
922 	paddr_t		sysseg_pa;	/* System segment table		*/
923 	u_int		kstsize;	/* size of 'sysseg' in pages	*/
924 	paddr_t		ptpa;		/* Kernel page table		*/
925 	psize_t		ptsize;		/* size	of 'pt' in bytes	*/
926 	paddr_t		sysptmap_pa;	/* System page table		*/
927 	paddr_t		kbase;
928 {
929 	st_entry_t	sg_proto, *sg, *esg;
930 	pt_entry_t	pg_proto, *pg, *epg;
931 
932 	/*
933 	 * Map the page table pages in both the HW segment table
934 	 * and the software Sysptmap.
935 	 */
936 	sg  = (st_entry_t *)sysseg_pa;
937 	pg  = (pt_entry_t *)sysptmap_pa;
938 	epg = &pg[ptsize >> PGSHIFT];
939 	sg_proto = (ptpa + kbase) /* relocated PA */ | SG_RW | SG_V;
940 	pg_proto = (ptpa + kbase) /* relocated PA */ | PG_RW | PG_CI | PG_V;
941 	while (pg < epg) {
942 		*sg++ = sg_proto;
943 		*pg++ = pg_proto;
944 		sg_proto += PAGE_SIZE;
945 		pg_proto += PAGE_SIZE;
946 	}
947 
948 	/*
949 	 * Invalidate the remainder of the tables.
950 	 */
951 	esg = (st_entry_t *)sysseg_pa;
952 	esg = &esg[256];			/* XXX should be TIA_SIZE */
953 	while (sg < esg)
954 		*sg++ = SG_NV;
955 	epg = (pt_entry_t *)sysptmap_pa;
956 	epg = &epg[NPTEPG];			/* XXX should be TIB_SIZE */
957 	while (pg < epg)
958 		*pg++ = PG_NV;
959 
960 	/*
961 	 * Initialize the PTE for the last one to point Sysptmap.
962 	 */
963 	sg = (st_entry_t *)sysseg_pa;
964 	sg = &sg[256 - 1];			/* XXX should be TIA_SIZE */
965 	pg = (pt_entry_t *)sysptmap_pa;
966 	pg = &pg[256 - 1];			/* XXX should be TIA_SIZE */
967 	*sg = (sysptmap_pa + kbase) /* relocated PA */ | SG_RW | SG_V;
968 	*pg = (sysptmap_pa + kbase) /* relocated PA */ | PG_RW | PG_CI | PG_V;
969 }
970 
971 #if defined(M68040) || defined(M68060)
972 void
973 mmu040_setup(sysseg_pa, kstsize, ptpa, ptsize, sysptmap_pa, kbase)
974 	paddr_t		sysseg_pa;	/* System segment table		*/
975 	u_int		kstsize;	/* size of 'sysseg' in pages	*/
976 	paddr_t		ptpa;		/* Kernel page table		*/
977 	psize_t		ptsize;		/* size	of 'pt' in bytes	*/
978 	paddr_t		sysptmap_pa;	/* System page table		*/
979 	paddr_t		kbase;
980 {
981 	int		nl1desc, nl2desc, i;
982 	st_entry_t	sg_proto, *sg, *esg;
983 	pt_entry_t	pg_proto, *pg, *epg;
984 
985 	/*
986 	 * First invalidate the entire "segment table" pages
987 	 * (levels 1 and 2 have the same "invalid" values).
988 	 */
989 	sg  = (st_entry_t *)sysseg_pa;
990 	esg = &sg[kstsize * NPTEPG];
991 	while (sg < esg)
992 		*sg++ = SG_NV;
993 
994 	/*
995 	 * Initialize level 2 descriptors (which immediately
996 	 * follow the level 1 table).
997 	 * We need:
998 	 *	NPTEPG / SG4_LEV3SIZE
999 	 * level 2 descriptors to map each of the nptpages
1000 	 * pages of PTEs.  Note that we set the "used" bit
1001 	 * now to save the HW the expense of doing it.
1002 	 */
1003 	nl2desc = (ptsize >> PGSHIFT) * (NPTEPG / SG4_LEV3SIZE);
1004 	sg  = (st_entry_t *)sysseg_pa;
1005 	sg  = &sg[SG4_LEV1SIZE];
1006 	esg = &sg[nl2desc];
1007 	sg_proto = (ptpa + kbase) /* relocated PA */ | SG_U | SG_RW | SG_V;
1008 	while (sg < esg) {
1009 		*sg++     = sg_proto;
1010 		sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t));
1011 	}
1012 
1013 	/*
1014 	 * Initialize level 1 descriptors.  We need:
1015 	 *	howmany(nl2desc, SG4_LEV2SIZE)
1016 	 * level 1 descriptors to map the 'nl2desc' level 2's.
1017 	 */
1018 	nl1desc = howmany(nl2desc, SG4_LEV2SIZE);
1019 	sg  = (st_entry_t *)sysseg_pa;
1020 	esg = &sg[nl1desc];
1021 	sg_proto = ((paddr_t)&sg[SG4_LEV1SIZE] + kbase) /* relocated PA */
1022 	    | SG_U | SG_RW | SG_V;
1023 	while (sg < esg) {
1024 		*sg++     = sg_proto;
1025 		sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t));
1026 	}
1027 
1028 	/* Sysmap is last entry in level 1 */
1029 	sg  = (st_entry_t *)sysseg_pa;
1030 	sg  = &sg[SG4_LEV1SIZE - 1];
1031 	*sg = sg_proto;
1032 
1033 	/*
1034 	 * Kernel segment table at end of next level 2 table
1035 	 */
1036 	i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE);
1037 	sg  = (st_entry_t *)sysseg_pa;
1038 	sg  = &sg[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)];
1039 	esg = &sg[NPTEPG / SG4_LEV3SIZE];
1040 	sg_proto = (sysptmap_pa + kbase) /* relocated PA */
1041 	    | SG_U | SG_RW | SG_V;
1042 	while (sg < esg) {
1043 		*sg++ = sg_proto;
1044 		sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t));
1045 	}
1046 
1047 	/* Include additional level 2 table for Sysmap in protostfree */
1048 	protostfree = (~0 << (1 + nl1desc + 1)) /* & ~(~0 << MAXKL2SIZE) */;
1049 
1050 	/*
1051 	 * Initialize Sysptmap
1052 	 */
1053 	pg  = (pt_entry_t *)sysptmap_pa;
1054 	epg = &pg[ptsize >> PGSHIFT];
1055 	pg_proto = (ptpa + kbase) /* relocated PA */ | PG_RW | PG_CI | PG_V;
1056 	while (pg < epg) {
1057 		*pg++ = pg_proto;
1058 		pg_proto += PAGE_SIZE;
1059 	}
1060 
1061 	/*
1062 	 * Invalidate rest of Sysptmap page.
1063 	 */
1064 	epg = (pt_entry_t *)sysptmap_pa;
1065 	epg = &epg[NPTEPG];		/* XXX: should be TIB_SIZE */
1066 	while (pg < epg)
1067 		*pg++ = PG_NV;
1068 
1069 	/*
1070 	 * Initialize the PTE for the last one to point Sysptmap.
1071 	 */
1072 	pg = (pt_entry_t *)sysptmap_pa;
1073 	pg = &pg[256 - 1];		/* XXX: should be TIA_SIZE */
1074 	*pg = (sysptmap_pa + kbase) /* relocated PA */ | PG_RW | PG_CI | PG_V;
1075 }
1076 #endif /* M68040 */
1077 
1078 #if defined(M68060)
1079 int m68060_pcr_init = 0x21;	/* make this patchable */
1080 #endif
1081 
1082 static void
1083 initcpu(void)
1084 {
1085 	typedef void trapfun(void);
1086 
1087 	switch (cputype) {
1088 
1089 #if defined(M68060)
1090 	case CPU_68060:
1091 		{
1092 			extern trapfun	*vectab[256];
1093 			extern trapfun	buserr60, addrerr4060, fpfault;
1094 #if defined(M060SP)
1095 			extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[];
1096 #else
1097 			extern trapfun illinst;
1098 #endif
1099 
1100 			__asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : :
1101 					"d"(m68060_pcr_init):"d0" );
1102 
1103 			/* bus/addrerr vectors */
1104 			vectab[2] = buserr60;
1105 			vectab[3] = addrerr4060;
1106 
1107 #if defined(M060SP)
1108 			/* integer support */
1109 			vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00];
1110 
1111 			/* floating point support */
1112 			/*
1113 			 * XXX maybe we really should run-time check for the
1114 			 * stack frame format here:
1115 			 */
1116 			vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30];
1117 
1118 			vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38];
1119 			vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40];
1120 
1121 			vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00];
1122 			vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08];
1123 			vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10];
1124 			vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18];
1125 			vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20];
1126 			vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28];
1127 #else
1128 			vectab[61] = illinst;
1129 #endif
1130 			vectab[48] = fpfault;
1131 		}
1132 		break;
1133 #endif /* defined(M68060) */
1134 #if defined(M68040)
1135 	case CPU_68040:
1136 		{
1137 			extern trapfun	*vectab[256];
1138 			extern trapfun	buserr40, addrerr4060;
1139 
1140 			/* bus/addrerr vectors */
1141 			vectab[2] = buserr40;
1142 			vectab[3] = addrerr4060;
1143 		}
1144 		break;
1145 #endif /* defined(M68040) */
1146 #if defined(M68030) || defined(M68020)
1147 	case CPU_68030:
1148 	case CPU_68020:
1149 		{
1150 			extern trapfun	*vectab[256];
1151 			extern trapfun	buserr2030, addrerr2030;
1152 
1153 			/* bus/addrerr vectors */
1154 			vectab[2] = buserr2030;
1155 			vectab[3] = addrerr2030;
1156 		}
1157 		break;
1158 #endif /* defined(M68030) || defined(M68020) */
1159 	}
1160 
1161 	DCIS();
1162 }
1163 
1164 #ifdef DEBUG
1165 void dump_segtable(u_int *);
1166 void dump_pagetable(u_int *, u_int, u_int);
1167 u_int vmtophys(u_int *, u_int);
1168 
1169 void
1170 dump_segtable(stp)
1171 	u_int *stp;
1172 {
1173 	u_int *s, *es;
1174 	int shift, i;
1175 
1176 	s = stp;
1177 	{
1178 		es = s + (M68K_STSIZE >> 2);
1179 		shift = SG_ISHIFT;
1180 	}
1181 
1182 	/*
1183 	 * XXX need changes for 68040
1184 	 */
1185 	for (i = 0; s < es; s++, i++)
1186 		if (*s & SG_V)
1187 			printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME);
1188 	printf("\n");
1189 }
1190 
1191 void
1192 dump_pagetable(ptp, i, n)
1193 	u_int *ptp, i, n;
1194 {
1195 	u_int *p, *ep;
1196 
1197 	p = ptp + i;
1198 	ep = p + n;
1199 	for (; p < ep; p++, i++)
1200 		if (*p & PG_V)
1201 			printf("$%08x -> $%08x\t", i, *p & PG_FRAME);
1202 	printf("\n");
1203 }
1204 
1205 u_int
1206 vmtophys(ste, vm)
1207 	u_int *ste, vm;
1208 {
1209 
1210 	ste = (u_int *)(*(ste + (vm >> SEGSHIFT)) & SG_FRAME);
1211 	ste += (vm & SG_PMASK) >> PGSHIFT;
1212 	return (*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1));
1213 }
1214 
1215 #endif
1216