1 /* $NetBSD: atari_init.c,v 1.103 2021/12/12 13:05:13 andvar Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Leo Weppelman 5 * Copyright (c) 1994 Michael L. Hitch 6 * Copyright (c) 1993 Markus Wild 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Markus Wild. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.103 2021/12/12 13:05:13 andvar Exp $"); 37 38 #include "opt_ddb.h" 39 #include "opt_mbtype.h" 40 #include "opt_m060sp.h" 41 #include "opt_m68k_arch.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/ioctl.h> 46 #include <sys/select.h> 47 #include <sys/tty.h> 48 #include <sys/buf.h> 49 #include <sys/msgbuf.h> 50 #include <sys/mbuf.h> 51 #include <sys/extent.h> 52 #include <sys/protosw.h> 53 #include <sys/domain.h> 54 #include <sys/dkbad.h> 55 #include <sys/reboot.h> 56 #include <sys/exec.h> 57 #include <sys/exec_aout.h> 58 #include <sys/core.h> 59 #include <sys/kcore.h> 60 61 #include <uvm/uvm_extern.h> 62 63 #include <machine/vmparam.h> 64 #include <machine/pte.h> 65 #include <machine/cpu.h> 66 #include <machine/iomap.h> 67 #include <machine/mfp.h> 68 #include <machine/scu.h> 69 #include <machine/acia.h> 70 #include <machine/kcore.h> 71 #include <machine/intr.h> 72 73 #include <m68k/cpu.h> 74 #include <m68k/cacheops.h> 75 76 #include <atari/atari/stalloc.h> 77 #include <atari/dev/clockvar.h> 78 #include <atari/dev/ym2149reg.h> 79 80 #include "pci.h" 81 82 void start_c(int, u_int, u_int, u_int, char *); 83 static void atari_hwinit(void); 84 static void cpu_init_kcorehdr(paddr_t, paddr_t); 85 static void initcpu(void); 86 static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 87 static void map_io_areas(paddr_t, psize_t, u_int); 88 static void set_machtype(void); 89 90 #if defined(M68040) || defined(M68060) 91 static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 92 #endif 93 94 #if defined(_MILANHW_) 95 static u_int milan_probe_bank_1(paddr_t paddr); 96 static u_int milan_probe_bank(paddr_t paddr); 97 98 #define NBANK 2 99 #define NSLOT 4 100 101 #define MB(n) ((n) * 1024 * 1024) 102 #define MB_END(n) (MB(n) - 1) 103 #define MAGIC_4M (4 - 1) 104 #define MAGIC_4M_INV ((uint8_t)~MAGIC_4M) 105 #define MAGIC_8M (8 - 1) 106 #define MAGIC_16M (16 - 1) 107 #define MAGIC_32M (32 - 1) 108 #define MAGIC_64M (64 - 1) 109 #endif 110 111 /* 112 * Extent maps to manage all memory space, including I/O ranges. Allocate 113 * storage for 16 regions in each, initially. Later, iomem_malloc_safe 114 * will indicate that it's safe to use malloc() to dynamically allocate 115 * region descriptors. 116 * This means that the fixed static storage is only used for registrating 117 * the found memory regions and the bus-mapping of the console. 118 * 119 * The extent maps are not static! They are used for bus address space 120 * allocation. 121 */ 122 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(16) / sizeof(long)]; 123 struct extent *iomem_ex; 124 int iomem_malloc_safe; 125 126 /* 127 * All info needed to generate a panic dump. All fields are setup by 128 * start_c(). 129 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap 130 * here.... Also, the name is badly choosen. Phys_segs contains the 131 * segment descriptions _after_ reservations are made. 132 * XXX: 'lowram' is obsoleted by the new panicdump format 133 */ 134 static cpu_kcore_hdr_t cpu_kcore_hdr; 135 136 extern u_int lowram; 137 int machineid, mmutype, cputype, astpending; 138 139 extern char *esym; 140 extern struct pcb *curpcb; 141 142 /* 143 * This is the virtual address of physical page 0. Used by 'do_boot()'. 144 */ 145 vaddr_t page_zero; 146 147 /* 148 * Crude support for allocation in ST-ram. Currently only used to allocate 149 * video ram. 150 * The physical address is also returned because the video init needs it to 151 * setup the controller at the time the vm-system is not yet operational so 152 * 'kvtop()' cannot be used. 153 */ 154 #ifndef ST_POOL_SIZE 155 #define ST_POOL_SIZE 40 /* XXX: enough? */ 156 #endif 157 158 u_long st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable */ 159 u_long st_pool_virt, st_pool_phys; 160 161 /* I/O address space variables */ 162 vaddr_t stio_addr; /* Where the st io-area is mapped */ 163 vaddr_t pci_conf_addr; /* KVA base of PCI config space */ 164 vaddr_t pci_io_addr; /* KVA base of PCI io-space */ 165 vaddr_t pci_mem_addr; /* KVA base of PCI mem-space */ 166 vaddr_t pci_mem_uncached; /* KVA base of an uncached PCI mem-page */ 167 168 /* 169 * Are we relocating the kernel to TT-Ram if possible? It is faster, but 170 * it is also reported not to work on all TT's. So the default is NO. 171 */ 172 #ifndef RELOC_KERNEL 173 #define RELOC_KERNEL 0 174 #endif 175 int reloc_kernel = RELOC_KERNEL; /* Patchable */ 176 177 #define RELOC_PA(base, pa) ((base) + (pa)) /* used to set up PTE etc. */ 178 179 /* 180 * this is the C-level entry function, it's called from locore.s. 181 * Preconditions: 182 * Interrupts are disabled 183 * PA == VA, we don't have to relocate addresses before enabling 184 * the MMU 185 * Exec is no longer available (because we're loaded all over 186 * low memory, no ExecBase is available anymore) 187 * 188 * It's purpose is: 189 * Do the things that are done in locore.s in the hp300 version, 190 * this includes allocation of kernel maps and enabling the MMU. 191 * 192 * Some of the code in here is `stolen' from Amiga MACH, and was 193 * written by Bryan Ford and Niklas Hallqvist. 194 * 195 * Very crude 68040 support by Michael L. Hitch. 196 */ 197 int kernel_copyback = 1; 198 199 void 200 start_c(int id, u_int ttphystart, u_int ttphysize, u_int stphysize, 201 char *esym_addr) 202 /* id: Machine id */ 203 /* ttphystart, ttphysize: Start address and size of TT-ram */ 204 /* stphysize: Size of ST-ram */ 205 /* esym_addr: Address of kernel '_esym' symbol */ 206 { 207 extern char end[]; 208 extern void etext(void); 209 extern u_long protorp[2]; 210 paddr_t pstart; /* Next available physical address */ 211 vaddr_t vstart; /* Next available virtual address */ 212 vsize_t avail; 213 paddr_t ptpa; 214 psize_t ptsize; 215 u_int ptextra; 216 vaddr_t kva; 217 u_int tc, i; 218 pt_entry_t *pg, *epg; 219 pt_entry_t pg_proto; 220 vaddr_t end_loaded; 221 paddr_t kbase; 222 u_int kstsize; 223 paddr_t Sysptmap_pa; 224 #if defined(_MILANHW_) 225 /* 226 * The Milan Lies about the presence of TT-RAM. If you insert 227 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM, 228 * starting at address 16MB as the BIOS remapping memory using MMU. 229 * 230 * Milan actually has four SIMM slots and each slot has two banks, 231 * so it could have up to 8 memory segment regions. 232 */ 233 const paddr_t simm_base[NBANK][NSLOT] = { 234 /* slot 0-3, bank 0 */ 235 { 0x00000000, 0x04000000, 0x08000000, 0x0c000000 }, 236 /* slot 0-3, bank 1 */ 237 { 0x10000000, 0x14000000, 0x18000000, 0x1c000000 } 238 }; 239 int slot, bank, seg; 240 u_int mb; 241 242 /* On Milan, all RAMs are fast 32 bit so no need to reloc kernel */ 243 reloc_kernel = 0; 244 245 /* probe memory region in all SIMM slots and banks */ 246 seg = 0; 247 ttphysize = 0; 248 for (bank = 0; bank < 2; bank++) { 249 for (slot = 0; slot < 4; slot++) { 250 if (bank == 0 && slot == 0) { 251 /* 252 * The first bank has at least 16MB because 253 * the Milan's ROM bootloader requires it 254 * to allocate ST RAM. 255 */ 256 mb = milan_probe_bank_1(simm_base[bank][slot]); 257 boot_segs[0].start = 0; 258 boot_segs[0].end = MB(mb); 259 stphysize = MB(mb); 260 seg++; 261 } else { 262 /* 263 * The rest banks could be empty or 264 * have 4, 8, 16, 32, or 64MB. 265 */ 266 mb = milan_probe_bank(simm_base[bank][slot]); 267 if (mb > 0) { 268 boot_segs[seg].start = 269 simm_base[bank][slot]; 270 boot_segs[seg].end = 271 simm_base[bank][slot] + MB(mb); 272 ttphysize += MB(mb); 273 seg++; 274 } 275 } 276 } 277 } 278 #else /* _MILANHW_ */ 279 boot_segs[0].start = 0; 280 boot_segs[0].end = stphysize; 281 boot_segs[1].start = ttphystart; 282 boot_segs[1].end = ttphystart + ttphysize; 283 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */ 284 #endif 285 286 /* 287 * The following is a hack. We do not know how much ST memory we 288 * really need until after configuration has finished. At this 289 * time I have no idea how to grab ST memory at that time. 290 * The round_page() call is ment to correct errors made by 291 * binpatching! 292 */ 293 st_pool_size = m68k_round_page(st_pool_size); 294 st_pool_phys = stphysize - st_pool_size; 295 stphysize = st_pool_phys; 296 297 physmem = btoc(stphysize) + btoc(ttphysize); 298 machineid = id; 299 esym = esym_addr; 300 301 /* 302 * the kernel ends at end() or esym. 303 */ 304 if (esym == NULL) 305 end_loaded = (vaddr_t)&end; 306 else 307 end_loaded = (vaddr_t)esym; 308 309 /* 310 * If we have enough fast-memory to put the kernel in and the 311 * RELOC_KERNEL option is set, do it! 312 */ 313 if ((reloc_kernel != 0) && (ttphysize >= end_loaded)) 314 kbase = ttphystart; 315 else 316 kbase = 0; 317 318 /* 319 * Determine the type of machine we are running on. This needs 320 * to be done early (and before initcpu())! 321 */ 322 set_machtype(); 323 324 /* 325 * Initialize CPU specific stuff 326 */ 327 initcpu(); 328 329 /* 330 * We run the kernel from ST memory at the moment. 331 * The kernel segment table is put just behind the loaded image. 332 * pstart: start of usable ST memory 333 * avail : size of ST memory available. 334 */ 335 vstart = (vaddr_t)end_loaded; 336 vstart = m68k_round_page(vstart); 337 pstart = (paddr_t)vstart; /* pre-reloc PA == kernel VA here */ 338 avail = stphysize - pstart; 339 340 /* 341 * Save KVA of lwp0 uarea and allocate it. 342 */ 343 lwp0uarea = vstart; 344 pstart += USPACE; 345 vstart += USPACE; 346 avail -= USPACE; 347 348 /* 349 * Calculate the number of pages needed for Sysseg. 350 * For the 68030, we need 256 descriptors (segment-table-entries). 351 * This easily fits into one page. 352 * For the 68040, both the level-1 and level-2 descriptors are 353 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE 354 * level-1 & level-2 tables. 355 */ 356 #if defined(M68040) || defined(M68060) 357 if (mmutype == MMU_68040) 358 kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); 359 else 360 #endif 361 kstsize = 1; 362 /* 363 * allocate the kernel segment table 364 */ 365 Sysseg_pa = pstart; /* pre-reloc PA to init STEs */ 366 Sysseg = (st_entry_t *)vstart; 367 pstart += kstsize * PAGE_SIZE; 368 vstart += kstsize * PAGE_SIZE; 369 avail -= kstsize * PAGE_SIZE; 370 371 /* 372 * allocate kernel page table map 373 */ 374 Sysptmap_pa = pstart; /* pre-reloc PA to init PTEs */ 375 Sysptmap = (pt_entry_t *)vstart; 376 pstart += PAGE_SIZE; 377 vstart += PAGE_SIZE; 378 avail -= PAGE_SIZE; 379 380 /* 381 * Determine the number of pte's we need for extra's like 382 * ST I/O map's. 383 */ 384 ptextra = btoc(STIO_SIZE); 385 386 /* 387 * If present, add pci areas 388 */ 389 if (machineid & ATARI_HADES) 390 ptextra += btoc(PCI_CONFIG_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE); 391 if (machineid & ATARI_MILAN) 392 ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE); 393 ptextra += btoc(BOOTM_VA_POOL); 394 /* 395 * now need to account for the kmem area, which is allocated 396 * before pmap_init() is called. It is roughly the size of physical 397 * memory. 398 */ 399 ptextra += physmem; 400 401 /* 402 * The 'pt' (the initial kernel pagetable) has to map the kernel and 403 * the I/O areas. The various I/O areas are mapped (virtually) at 404 * the top of the address space mapped by 'pt' (ie. just below Sysmap). 405 */ 406 ptpa = pstart; /* pre-reloc PA to init PTEs */ 407 ptsize = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT; 408 pstart += ptsize; 409 vstart += ptsize; 410 avail -= ptsize; 411 412 /* 413 * Sysmap is now placed at the end of Supervisor virtual address space. 414 */ 415 Sysmap = (pt_entry_t *)SYSMAP_VA; 416 417 /* 418 * Initialize segment tables 419 */ 420 #if defined(M68040) || defined(M68060) 421 if (mmutype == MMU_68040) 422 mmu040_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 423 kbase); 424 else 425 #endif /* defined(M68040) || defined(M68060) */ 426 mmu030_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 427 kbase); 428 429 /* 430 * initialize kernel page table page(s). 431 * Assume load at VA 0. 432 * - Text pages are RO 433 * - Page zero is invalid 434 */ 435 pg_proto = RELOC_PA(kbase, 0) | PG_RO | PG_V; 436 pg = (pt_entry_t *)ptpa; 437 *pg++ = PG_NV; 438 439 pg_proto += PAGE_SIZE; 440 for (kva = PAGE_SIZE; kva < (vaddr_t)etext; kva += PAGE_SIZE) { 441 *pg++ = pg_proto; 442 pg_proto += PAGE_SIZE; 443 } 444 445 /* 446 * data, bss and dynamic tables are read/write 447 */ 448 pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V; 449 450 #if defined(M68040) || defined(M68060) 451 /* 452 * Map the kernel segment table cache invalidated for 68040/68060. 453 * (for the 68040 not strictly necessary, but recommended by Motorola; 454 * for the 68060 mandatory) 455 */ 456 if (mmutype == MMU_68040) { 457 458 if (kernel_copyback) 459 pg_proto |= PG_CCB; 460 461 for (; kva < (vaddr_t)Sysseg; kva += PAGE_SIZE) { 462 *pg++ = pg_proto; 463 pg_proto += PAGE_SIZE; 464 } 465 466 pg_proto = (pg_proto & ~PG_CCB) | PG_CI; 467 for (; kva < (vaddr_t)Sysptmap; kva += PAGE_SIZE) { 468 *pg++ = pg_proto; 469 pg_proto += PAGE_SIZE; 470 } 471 472 pg_proto = (pg_proto & ~PG_CI); 473 if (kernel_copyback) 474 pg_proto |= PG_CCB; 475 } 476 #endif /* defined(M68040) || defined(M68060) */ 477 478 /* 479 * go till end of data allocated so far 480 * plus lwp0 u-area (to be allocated) 481 */ 482 for (; kva < vstart; kva += PAGE_SIZE) { 483 *pg++ = pg_proto; 484 pg_proto += PAGE_SIZE; 485 } 486 487 /* 488 * invalidate remainder of kernel PT 489 */ 490 epg = (pt_entry_t *)ptpa; 491 epg = &epg[ptsize / sizeof(pt_entry_t)]; 492 while (pg < epg) 493 *pg++ = PG_NV; 494 495 /* 496 * Map various I/O areas 497 */ 498 map_io_areas(ptpa, ptsize, ptextra); 499 500 /* 501 * Map the allocated space in ST-ram now. In the contig-case, there 502 * is no need to make a distinction between virtual and physical 503 * addresses. But I make it anyway to be prepared. 504 * Physical space is already reserved! 505 */ 506 st_pool_virt = vstart; 507 pg = (pt_entry_t *)ptpa; 508 pg = &pg[vstart / PAGE_SIZE]; 509 pg_proto = st_pool_phys | PG_RW | PG_CI | PG_V; 510 vstart += st_pool_size; 511 while (pg_proto < (st_pool_phys + st_pool_size)) { 512 *pg++ = pg_proto; 513 pg_proto += PAGE_SIZE; 514 } 515 516 /* 517 * Map physical page_zero and page-zero+1 (First ST-ram page). We need 518 * to reference it in the reboot code. Two pages are mapped, because 519 * we must make sure 'doboot()' is contained in it (see the tricky 520 * copying there....). 521 */ 522 page_zero = vstart; 523 pg = (pt_entry_t *)ptpa; 524 pg = &pg[vstart / PAGE_SIZE]; 525 *pg++ = PG_RW | PG_CI | PG_V; 526 vstart += PAGE_SIZE; 527 *pg = PG_RW | PG_CI | PG_V | PAGE_SIZE; 528 vstart += PAGE_SIZE; 529 530 /* 531 * All necessary STEs and PTEs have been initialized. 532 * Update Sysseg_pa and Sysptmap_pa to point relocated PA. 533 */ 534 if (kbase) { 535 Sysseg_pa += kbase; 536 Sysptmap_pa += kbase; 537 } 538 539 lowram = 0 >> PGSHIFT; /* XXX */ 540 541 /* 542 * Fill in usable segments. The page indexes will be initialized 543 * later when all reservations are made. 544 */ 545 usable_segs[0].start = 0; 546 usable_segs[0].end = stphysize; 547 usable_segs[0].free_list = VM_FREELIST_STRAM; 548 #if defined(_MILANHW_) 549 for (i = 1; i < seg; i++) { 550 usable_segs[i].start = boot_segs[i].start; 551 usable_segs[i].end = boot_segs[i].end; 552 usable_segs[i].free_list = VM_FREELIST_TTRAM; 553 } 554 for (; i < NMEM_SEGS; i++) { 555 usable_segs[i].start = usable_segs[i].end = 0; 556 } 557 #else 558 usable_segs[1].start = ttphystart; 559 usable_segs[1].end = ttphystart + ttphysize; 560 usable_segs[1].free_list = VM_FREELIST_TTRAM; 561 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */ 562 #endif 563 564 if (kbase) { 565 /* 566 * First page of ST-ram is unusable, reserve the space 567 * for the kernel in the TT-ram segment. 568 * Note: Because physical page-zero is partially mapped to ROM 569 * by hardware, it is unusable. 570 */ 571 usable_segs[0].start = PAGE_SIZE; 572 usable_segs[1].start += pstart; 573 } else 574 usable_segs[0].start += pstart; 575 576 /* 577 * As all segment sizes are now valid, calculate page indexes and 578 * available physical memory. 579 */ 580 usable_segs[0].first_page = 0; 581 for (i = 1; i < NMEM_SEGS && usable_segs[i].start; i++) { 582 usable_segs[i].first_page = usable_segs[i-1].first_page; 583 usable_segs[i].first_page += 584 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE; 585 } 586 for (i = 0, physmem = 0; usable_segs[i].start; i++) 587 physmem += usable_segs[i].end - usable_segs[i].start; 588 physmem >>= PGSHIFT; 589 590 /* 591 * get the pmap module in sync with reality. 592 */ 593 pmap_bootstrap(vstart); 594 595 /* 596 * Prepare to enable the MMU. 597 * Setup and load SRP nolimit, share global, 4 byte PTE's 598 */ 599 protorp[0] = 0x80000202; 600 protorp[1] = Sysseg_pa; /* + segtable address */ 601 602 cpu_init_kcorehdr(kbase, Sysseg_pa); 603 604 /* 605 * copy over the kernel (and all now initialized variables) 606 * to fastram. DONT use bcopy(), this beast is much larger 607 * than 128k ! 608 */ 609 if (kbase) { 610 register paddr_t *lp, *le, *fp; 611 612 lp = (paddr_t *)0; 613 le = (paddr_t *)pstart; 614 fp = (paddr_t *)kbase; 615 while (lp < le) 616 *fp++ = *lp++; 617 } 618 #if defined(M68040) || defined(M68060) 619 if (mmutype == MMU_68040) { 620 /* 621 * movel Sysseg_pa,a0; 622 * movec a0,SRP; 623 * pflusha; 624 * movel #$0xc000,d0; 625 * movec d0,TC 626 */ 627 if (cputype == CPU_68060) { 628 /* XXX: Need the branch cache be cleared? */ 629 __asm volatile (".word 0x4e7a,0x0002;" 630 "orl #0x400000,%%d0;" 631 ".word 0x4e7b,0x0002" : : : "d0"); 632 } 633 __asm volatile ("movel %0,%%a0;" 634 ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0"); 635 __asm volatile (".word 0xf518" : : ); 636 __asm volatile ("movel #0xc000,%%d0;" 637 ".word 0x4e7b,0x0003" : : : "d0" ); 638 } else 639 #endif 640 { 641 __asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0])); 642 /* 643 * setup and load TC register. 644 * enable_cpr, enable_srp, pagesize=8k, 645 * A = 8 bits, B = 11 bits 646 */ 647 tc = 0x82d08b00; 648 __asm volatile ("pflusha" : : ); 649 __asm volatile ("pmove %0@,%%tc" : : "a" (&tc)); 650 } 651 652 /* 653 * Initialize the "u-area" pages etc. 654 */ 655 pmap_bootstrap_finalize(); 656 657 /* 658 * Get the hardware into a defined state 659 */ 660 atari_hwinit(); 661 662 /* 663 * Initialize stmem allocator 664 */ 665 init_stmem(); 666 667 /* 668 * Initialize the I/O mem extent map. 669 * Note: we don't have to check the return value since 670 * creation of a fixed extent map will never fail (since 671 * descriptor storage has already been allocated). 672 * 673 * N.B. The iomem extent manages _all_ physical addresses 674 * on the machine. When the amount of RAM is found, all 675 * extents of RAM are allocated from the map. 676 */ 677 iomem_ex = extent_create("iomem", 0x0, 0xffffffff, 678 (void *)iomem_ex_storage, sizeof(iomem_ex_storage), 679 EX_NOCOALESCE|EX_NOWAIT); 680 681 /* 682 * Allocate the physical RAM from the extent map 683 */ 684 for (i = 0; i < NMEM_SEGS && boot_segs[i].end != 0; i++) { 685 if (extent_alloc_region(iomem_ex, boot_segs[i].start, 686 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) { 687 /* XXX: Ahum, should not happen ;-) */ 688 printf("Warning: Cannot allocate boot memory from" 689 " extent map!?\n"); 690 } 691 } 692 693 /* 694 * Initialize interrupt mapping. 695 */ 696 intr_init(); 697 } 698 699 #if defined(_MILANHW_) 700 /* 701 * Probe and return available memory size in MB at specified address. 702 * The first slot SIMM have at least 16MB, so check if it has 32 or 64 MB. 703 * 704 * Note it seems Milan does not generate bus errors on accesses against 705 * address regions where memory doesn't exist, but it returns memory images 706 * of lower address of the bank. 707 */ 708 static u_int 709 milan_probe_bank_1(paddr_t start_paddr) 710 { 711 volatile uint8_t *base; 712 u_int mb; 713 uint8_t save_16, save_32, save_64; 714 715 /* Assume that this bank has at least 16MB */ 716 mb = 16; 717 718 base = (uint8_t *)start_paddr; 719 720 /* save and write a MAGIC at the end of 16MB region */ 721 save_16 = base[MB_END(16)]; 722 base[MB_END(16)] = MAGIC_16M; 723 724 /* check bus error at the end of 32MB region */ 725 if (badbaddr(__UNVOLATILE(base + MB_END(32)), sizeof(uint8_t))) { 726 /* bus error; assume no memory there */ 727 goto out16; 728 } 729 730 /* check if the 32MB region is not image of the prior 16MB region */ 731 save_32 = base[MB_END(32)]; 732 base[MB_END(32)] = MAGIC_32M; 733 if (base[MB_END(32)] != MAGIC_32M || base[MB_END(16)] != MAGIC_16M) { 734 /* no memory or image at the 32MB region */ 735 goto out16; 736 } 737 /* we have at least 32MB */ 738 mb = 32; 739 740 /* check bus error at the end of 64MB region */ 741 if (badbaddr(__UNVOLATILE(base + MB_END(64)), sizeof(uint8_t))) { 742 /* bus error; assume no memory there */ 743 goto out32; 744 } 745 746 /* check if the 64MB region is not image of the prior 32MB region */ 747 save_64 = base[MB_END(64)]; 748 base[MB_END(64)] = MAGIC_64M; 749 if (base[MB_END(64)] != MAGIC_64M || base[MB_END(32)] != MAGIC_32M) { 750 /* no memory or image at the 64MB region */ 751 goto out32; 752 } 753 /* we have 64MB */ 754 mb = 64; 755 base[MB_END(64)] = save_64; 756 out32: 757 base[MB_END(32)] = save_32; 758 out16: 759 base[MB_END(16)] = save_16; 760 761 return mb; 762 } 763 764 /* 765 * Probe and return available memory size in MB at specified address. 766 * The rest slot could be empty so check all possible size. 767 */ 768 static u_int 769 milan_probe_bank(paddr_t start_paddr) 770 { 771 volatile uint8_t *base; 772 u_int mb; 773 uint8_t save_4, save_8, save_16; 774 775 /* The rest banks might have no memory */ 776 mb = 0; 777 778 base = (uint8_t *)start_paddr; 779 780 /* check bus error at the end of 4MB region */ 781 if (badbaddr(__UNVOLATILE(base + MB_END(4)), sizeof(uint8_t))) { 782 /* bus error; assume no memory there */ 783 goto out; 784 } 785 786 /* check if the 4MB region has memory */ 787 save_4 = base[MB_END(4)]; 788 base[MB_END(4)] = MAGIC_4M_INV; 789 if (base[MB_END(4)] != MAGIC_4M_INV) { 790 /* no memory */ 791 goto out; 792 } 793 base[MB_END(4)] = MAGIC_4M; 794 if (base[MB_END(4)] != MAGIC_4M) { 795 /* no memory */ 796 goto out; 797 } 798 /* we have at least 4MB */ 799 mb = 4; 800 801 /* check bus error at the end of 8MB region */ 802 if (badbaddr(__UNVOLATILE(base + MB_END(8)), sizeof(uint8_t))) { 803 /* bus error; assume no memory there */ 804 goto out4; 805 } 806 807 /* check if the 8MB region is not image of the prior 4MB region */ 808 save_8 = base[MB_END(8)]; 809 base[MB_END(8)] = MAGIC_8M; 810 if (base[MB_END(8)] != MAGIC_8M || base[MB_END(4)] != MAGIC_4M) { 811 /* no memory or image at the 8MB region */ 812 goto out4; 813 } 814 /* we have at least 8MB */ 815 mb = 8; 816 817 /* check bus error at the end of 16MB region */ 818 if (badbaddr(__UNVOLATILE(base + MB_END(16)), sizeof(uint8_t))) { 819 /* bus error; assume no memory there */ 820 goto out8; 821 } 822 823 /* check if the 16MB region is not image of the prior 8MB region */ 824 save_16 = base[MB_END(16)]; 825 base[MB_END(16)] = MAGIC_16M; 826 if (base[MB_END(16)] != MAGIC_16M || base[MB_END(8)] != MAGIC_8M) { 827 /* no memory or image at the 32MB region */ 828 goto out8; 829 } 830 /* we have at least 16MB, so check more region as the first bank */ 831 mb = milan_probe_bank_1(start_paddr); 832 833 base[MB_END(16)] = save_16; 834 out8: 835 base[MB_END(8)] = save_8; 836 out4: 837 base[MB_END(4)] = save_4; 838 out: 839 840 return mb; 841 } 842 #endif /* _MILANHW_ */ 843 844 /* 845 * Try to figure out on what type of machine we are running 846 * Note: This module runs *before* the io-mapping is setup! 847 */ 848 static void 849 set_machtype(void) 850 { 851 852 #ifdef _MILANHW_ 853 machineid |= ATARI_MILAN; 854 855 #else 856 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */ 857 if (badbaddr((void *)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) { 858 /* 859 * Watch out! We can also have a Hades with < 16Mb 860 * RAM here... 861 */ 862 if (!badbaddr((void *)__UNVOLATILE(&MFP->mf_gpip), 863 sizeof(char))) { 864 machineid |= ATARI_FALCON; 865 return; 866 } 867 } 868 if (!badbaddr((void *)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char))) 869 machineid |= ATARI_HADES; 870 else 871 machineid |= ATARI_TT; 872 #endif /* _MILANHW_ */ 873 } 874 875 static void 876 atari_hwinit(void) 877 { 878 879 #if defined(_ATARIHW_) 880 /* 881 * Initialize the sound chip 882 */ 883 ym2149_init(); 884 885 /* 886 * Make sure that the midi acia will not generate an interrupt 887 * unless something attaches to it. We cannot do this for the 888 * keyboard acia because this breaks the '-d' option of the 889 * booter... 890 */ 891 MDI->ac_cs = 0; 892 #endif /* defined(_ATARIHW_) */ 893 894 /* 895 * Initialize both MFP chips (if both present!) to generate 896 * auto-vectored interrupts with EOI. The active-edge registers are 897 * set up. The interrupt enable registers are set to disable all 898 * interrupts. 899 */ 900 MFP->mf_iera = MFP->mf_ierb = 0; 901 MFP->mf_imra = MFP->mf_imrb = 0; 902 MFP->mf_aer = MFP->mf_ddr = 0; 903 MFP->mf_vr = 0x40; 904 905 #if defined(_ATARIHW_) 906 if (machineid & (ATARI_TT|ATARI_HADES)) { 907 MFP2->mf_iera = MFP2->mf_ierb = 0; 908 MFP2->mf_imra = MFP2->mf_imrb = 0; 909 MFP2->mf_aer = 0x80; 910 MFP2->mf_vr = 0x50; 911 } 912 913 if (machineid & ATARI_TT) { 914 /* 915 * Initialize the SCU, to enable interrupts on the SCC (ipl5), 916 * MFP (ipl6) and softints (ipl1). 917 */ 918 SCU->sys_mask = SCU_SYS_SOFT; 919 SCU->vme_mask = SCU_MFP | SCU_SCC; 920 #ifdef DDB 921 /* 922 * This allows people with the correct hardware modification 923 * to drop into the debugger from an NMI. 924 */ 925 SCU->sys_mask |= SCU_IRQ7; 926 #endif 927 } 928 #endif /* defined(_ATARIHW_) */ 929 930 /* 931 * Initialize a timer for delay(9). 932 */ 933 init_delay(); 934 935 #if NPCI > 0 936 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 937 /* 938 * Configure PCI-bus 939 */ 940 init_pci_bus(); 941 } 942 #endif 943 944 } 945 946 /* 947 * Do the dull work of mapping the various I/O areas. They MUST be Cache 948 * inhibited! 949 * All I/O areas are virtually mapped at the end of the pt-table. 950 */ 951 static void 952 map_io_areas(paddr_t ptpa, psize_t ptsize, u_int ptextra) 953 /* ptsize: Size of 'pt' in bytes */ 954 /* ptextra: #of additional I/O pte's */ 955 { 956 extern void bootm_init(vaddr_t, pt_entry_t *, u_long); 957 vaddr_t ioaddr; 958 pt_entry_t *pt, *pg, *epg; 959 pt_entry_t pg_proto; 960 u_long mask; 961 962 pt = (pt_entry_t *)ptpa; 963 ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE; 964 965 /* 966 * Map ST-IO area 967 */ 968 stio_addr = ioaddr; 969 ioaddr += STIO_SIZE; 970 pg = &pt[stio_addr / PAGE_SIZE]; 971 epg = &pg[btoc(STIO_SIZE)]; 972 #ifdef _MILANHW_ 973 /* 974 * Turn on byte swaps in the ST I/O area. On the Milan, the 975 * U0 signal of the MMU controls the BigEndian signal 976 * of the PLX9080. We use this setting so we can read/write the 977 * PLX registers (and PCI-config space) in big-endian mode. 978 */ 979 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100; 980 #else 981 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V; 982 #endif 983 while (pg < epg) { 984 *pg++ = pg_proto; 985 pg_proto += PAGE_SIZE; 986 } 987 988 /* 989 * Map PCI areas 990 */ 991 if (machineid & ATARI_HADES) { 992 /* 993 * Only Hades maps the PCI-config space! 994 */ 995 pci_conf_addr = ioaddr; 996 ioaddr += PCI_CONFIG_SIZE; 997 pg = &pt[pci_conf_addr / PAGE_SIZE]; 998 epg = &pg[btoc(PCI_CONFIG_SIZE)]; 999 mask = PCI_CONFM_PHYS; 1000 pg_proto = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V; 1001 for (; pg < epg; mask <<= 1) 1002 *pg++ = pg_proto | mask; 1003 } else 1004 pci_conf_addr = 0; /* XXX: should crash */ 1005 1006 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 1007 pci_io_addr = ioaddr; 1008 ioaddr += PCI_IO_SIZE; 1009 pg = &pt[pci_io_addr / PAGE_SIZE]; 1010 epg = &pg[btoc(PCI_IO_SIZE)]; 1011 pg_proto = PCI_IO_PHYS | PG_RW | PG_CI | PG_V; 1012 while (pg < epg) { 1013 *pg++ = pg_proto; 1014 pg_proto += PAGE_SIZE; 1015 } 1016 1017 pci_mem_addr = ioaddr; 1018 /* Provide an uncached PCI address for the MILAN */ 1019 pci_mem_uncached = ioaddr; 1020 ioaddr += PCI_MEM_SIZE; 1021 epg = &pg[btoc(PCI_MEM_SIZE)]; 1022 pg_proto = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V; 1023 while (pg < epg) { 1024 *pg++ = pg_proto; 1025 pg_proto += PAGE_SIZE; 1026 } 1027 } 1028 1029 bootm_init(ioaddr, pg, BOOTM_VA_POOL); 1030 /* 1031 * ioaddr += BOOTM_VA_POOL; 1032 * pg = &pg[btoc(BOOTM_VA_POOL)]; 1033 */ 1034 } 1035 1036 /* 1037 * Used by dumpconf() to get the size of the machine-dependent panic-dump 1038 * header in disk blocks. 1039 */ 1040 1041 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t))) 1042 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1)) 1043 1044 int 1045 cpu_dumpsize(void) 1046 { 1047 1048 return btodb(MDHDRSIZE); 1049 } 1050 1051 /* 1052 * Called by dumpsys() to dump the machine-dependent header. 1053 * XXX: Assumes that it will all fit in one diskblock. 1054 */ 1055 int 1056 cpu_dump(int (*dump)(dev_t, daddr_t, void *, size_t), daddr_t *p_blkno) 1057 { 1058 int buf[MDHDRSIZE/sizeof(int)]; 1059 int error; 1060 kcore_seg_t *kseg_p; 1061 cpu_kcore_hdr_t *chdr_p; 1062 1063 kseg_p = (kcore_seg_t *)buf; 1064 chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)]; 1065 1066 /* 1067 * Generate a segment header 1068 */ 1069 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU); 1070 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p)); 1071 1072 /* 1073 * Add the md header 1074 */ 1075 *chdr_p = cpu_kcore_hdr; 1076 error = dump(dumpdev, *p_blkno, (void *)buf, sizeof(buf)); 1077 *p_blkno += btodb(sizeof(buf)); 1078 return (error); 1079 } 1080 1081 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS) 1082 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS" 1083 #endif 1084 /* 1085 * Initialize the cpu_kcore_header. 1086 */ 1087 static void 1088 cpu_init_kcorehdr(paddr_t kbase, paddr_t sysseg_pa) 1089 { 1090 cpu_kcore_hdr_t *h = &cpu_kcore_hdr; 1091 struct m68k_kcore_hdr *m = &h->un._m68k; 1092 extern char end[]; 1093 int i; 1094 1095 memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr)); 1096 1097 /* 1098 * Initialize the `dispatcher' portion of the header. 1099 */ 1100 strcpy(h->name, machine); 1101 h->page_size = PAGE_SIZE; 1102 h->kernbase = KERNBASE; 1103 1104 /* 1105 * Fill in information about our MMU configuration. 1106 */ 1107 m->mmutype = mmutype; 1108 m->sg_v = SG_V; 1109 m->sg_frame = SG_FRAME; 1110 m->sg_ishift = SG_ISHIFT; 1111 m->sg_pmask = SG_PMASK; 1112 m->sg40_shift1 = SG4_SHIFT1; 1113 m->sg40_mask2 = SG4_MASK2; 1114 m->sg40_shift2 = SG4_SHIFT2; 1115 m->sg40_mask3 = SG4_MASK3; 1116 m->sg40_shift3 = SG4_SHIFT3; 1117 m->sg40_addr1 = SG4_ADDR1; 1118 m->sg40_addr2 = SG4_ADDR2; 1119 m->pg_v = PG_V; 1120 m->pg_frame = PG_FRAME; 1121 1122 /* 1123 * Initialize pointer to kernel segment table. 1124 */ 1125 m->sysseg_pa = sysseg_pa; /* PA after relocation */ 1126 1127 /* 1128 * Initialize relocation value such that: 1129 * 1130 * pa = (va - KERNBASE) + reloc 1131 */ 1132 m->reloc = kbase; 1133 1134 /* 1135 * Define the end of the relocatable range. 1136 */ 1137 m->relocend = (vaddr_t)end; 1138 1139 for (i = 0; i < NMEM_SEGS; i++) { 1140 m->ram_segs[i].start = boot_segs[i].start; 1141 m->ram_segs[i].size = boot_segs[i].end - 1142 boot_segs[i].start; 1143 } 1144 } 1145 1146 void 1147 mmu030_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 1148 paddr_t sysptmap_pa, paddr_t kbase) 1149 /* sysseg_pa: System segment table */ 1150 /* kstsize: size of 'sysseg' in pages */ 1151 /* ptpa: Kernel page table */ 1152 /* ptsize: size of 'pt' in bytes */ 1153 /* sysptmap_pa: System page table */ 1154 { 1155 st_entry_t sg_proto, *sg, *esg; 1156 pt_entry_t pg_proto, *pg, *epg; 1157 1158 /* 1159 * Map the page table pages in both the HW segment table 1160 * and the software Sysptmap. 1161 */ 1162 sg = (st_entry_t *)sysseg_pa; 1163 pg = (pt_entry_t *)sysptmap_pa; 1164 epg = &pg[ptsize >> PGSHIFT]; 1165 sg_proto = RELOC_PA(kbase, ptpa) | SG_RW | SG_V; 1166 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 1167 while (pg < epg) { 1168 *sg++ = sg_proto; 1169 *pg++ = pg_proto; 1170 sg_proto += PAGE_SIZE; 1171 pg_proto += PAGE_SIZE; 1172 } 1173 1174 /* 1175 * Invalidate the remainder of the tables. 1176 */ 1177 esg = (st_entry_t *)sysseg_pa; 1178 esg = &esg[TIA_SIZE]; 1179 while (sg < esg) 1180 *sg++ = SG_NV; 1181 epg = (pt_entry_t *)sysptmap_pa; 1182 epg = &epg[TIB_SIZE]; 1183 while (pg < epg) 1184 *pg++ = PG_NV; 1185 1186 /* 1187 * Initialize the PTE for the last one to point Sysptmap. 1188 */ 1189 sg = (st_entry_t *)sysseg_pa; 1190 sg = &sg[SYSMAP_VA >> SEGSHIFT]; 1191 pg = (pt_entry_t *)sysptmap_pa; 1192 pg = &pg[SYSMAP_VA >> SEGSHIFT]; 1193 *sg = RELOC_PA(kbase, sysptmap_pa) | SG_RW | SG_V; 1194 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 1195 } 1196 1197 #if defined(M68040) || defined(M68060) 1198 void 1199 mmu040_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 1200 paddr_t sysptmap_pa, paddr_t kbase) 1201 /* sysseg_pa: System segment table */ 1202 /* kstsize: size of 'sysseg' in pages */ 1203 /* ptpa: Kernel page table */ 1204 /* ptsize: size of 'pt' in bytes */ 1205 /* sysptmap_pa: System page table */ 1206 { 1207 int nl1desc, nl2desc, i; 1208 st_entry_t sg_proto, *sg, *esg; 1209 pt_entry_t pg_proto, *pg, *epg; 1210 1211 /* 1212 * First invalidate the entire "segment table" pages 1213 * (levels 1 and 2 have the same "invalid" values). 1214 */ 1215 sg = (st_entry_t *)sysseg_pa; 1216 esg = &sg[kstsize * NPTEPG]; 1217 while (sg < esg) 1218 *sg++ = SG_NV; 1219 1220 /* 1221 * Initialize level 2 descriptors (which immediately 1222 * follow the level 1 table). 1223 * We need: 1224 * NPTEPG / SG4_LEV3SIZE 1225 * level 2 descriptors to map each of the nptpages 1226 * pages of PTEs. Note that we set the "used" bit 1227 * now to save the HW the expense of doing it. 1228 */ 1229 nl2desc = (ptsize >> PGSHIFT) * (NPTEPG / SG4_LEV3SIZE); 1230 sg = (st_entry_t *)sysseg_pa; 1231 sg = &sg[SG4_LEV1SIZE]; 1232 esg = &sg[nl2desc]; 1233 sg_proto = RELOC_PA(kbase, ptpa) | SG_U | SG_RW | SG_V; 1234 while (sg < esg) { 1235 *sg++ = sg_proto; 1236 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1237 } 1238 1239 /* 1240 * Initialize level 1 descriptors. We need: 1241 * howmany(nl2desc, SG4_LEV2SIZE) 1242 * level 1 descriptors to map the 'nl2desc' level 2's. 1243 */ 1244 nl1desc = howmany(nl2desc, SG4_LEV2SIZE); 1245 sg = (st_entry_t *)sysseg_pa; 1246 esg = &sg[nl1desc]; 1247 sg_proto = RELOC_PA(kbase, (paddr_t)&sg[SG4_LEV1SIZE]) 1248 | SG_U | SG_RW | SG_V; 1249 while (sg < esg) { 1250 *sg++ = sg_proto; 1251 sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t)); 1252 } 1253 1254 /* Sysmap is last entry in level 1 */ 1255 sg = (st_entry_t *)sysseg_pa; 1256 sg = &sg[SG4_LEV1SIZE - 1]; 1257 *sg = sg_proto; 1258 1259 /* 1260 * Kernel segment table at end of next level 2 table 1261 */ 1262 i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE); 1263 sg = (st_entry_t *)sysseg_pa; 1264 sg = &sg[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)]; 1265 esg = &sg[NPTEPG / SG4_LEV3SIZE]; 1266 sg_proto = RELOC_PA(kbase, sysptmap_pa) | SG_U | SG_RW | SG_V; 1267 while (sg < esg) { 1268 *sg++ = sg_proto; 1269 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1270 } 1271 1272 /* Include additional level 2 table for Sysmap in protostfree */ 1273 protostfree = (~0 << (1 + nl1desc + 1)) /* & ~(~0 << MAXKL2SIZE) */; 1274 1275 /* 1276 * Initialize Sysptmap 1277 */ 1278 pg = (pt_entry_t *)sysptmap_pa; 1279 epg = &pg[ptsize >> PGSHIFT]; 1280 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 1281 while (pg < epg) { 1282 *pg++ = pg_proto; 1283 pg_proto += PAGE_SIZE; 1284 } 1285 1286 /* 1287 * Invalidate rest of Sysptmap page. 1288 */ 1289 epg = (pt_entry_t *)sysptmap_pa; 1290 epg = &epg[TIB_SIZE]; 1291 while (pg < epg) 1292 *pg++ = PG_NV; 1293 1294 /* 1295 * Initialize the PTE for the last one to point Sysptmap. 1296 */ 1297 pg = (pt_entry_t *)sysptmap_pa; 1298 pg = &pg[SYSMAP_VA >> SEGSHIFT]; 1299 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 1300 } 1301 #endif /* M68040 */ 1302 1303 #if defined(M68060) 1304 int m68060_pcr_init = 0x21; /* make this patchable */ 1305 #endif 1306 1307 static void 1308 initcpu(void) 1309 { 1310 typedef void trapfun(void); 1311 1312 switch (cputype) { 1313 1314 #if defined(M68060) 1315 case CPU_68060: 1316 { 1317 extern trapfun *vectab[256]; 1318 extern trapfun buserr60, addrerr4060, fpfault; 1319 #if defined(M060SP) 1320 extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[]; 1321 #else 1322 extern trapfun illinst; 1323 #endif 1324 1325 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : : 1326 "d"(m68060_pcr_init):"d0" ); 1327 1328 /* bus/addrerr vectors */ 1329 vectab[2] = buserr60; 1330 vectab[3] = addrerr4060; 1331 1332 #if defined(M060SP) 1333 /* integer support */ 1334 vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00]; 1335 1336 /* floating point support */ 1337 /* 1338 * XXX maybe we really should run-time check for the 1339 * stack frame format here: 1340 */ 1341 vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30]; 1342 1343 vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38]; 1344 vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40]; 1345 1346 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; 1347 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; 1348 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; 1349 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; 1350 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; 1351 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; 1352 #else 1353 vectab[61] = illinst; 1354 #endif 1355 vectab[48] = fpfault; 1356 } 1357 break; 1358 #endif /* defined(M68060) */ 1359 #if defined(M68040) 1360 case CPU_68040: 1361 { 1362 extern trapfun *vectab[256]; 1363 extern trapfun buserr40, addrerr4060; 1364 1365 /* bus/addrerr vectors */ 1366 vectab[2] = buserr40; 1367 vectab[3] = addrerr4060; 1368 } 1369 break; 1370 #endif /* defined(M68040) */ 1371 #if defined(M68030) || defined(M68020) 1372 case CPU_68030: 1373 case CPU_68020: 1374 { 1375 extern trapfun *vectab[256]; 1376 extern trapfun buserr2030, addrerr2030; 1377 1378 /* bus/addrerr vectors */ 1379 vectab[2] = buserr2030; 1380 vectab[3] = addrerr2030; 1381 } 1382 break; 1383 #endif /* defined(M68030) || defined(M68020) */ 1384 } 1385 1386 DCIS(); 1387 } 1388 1389 #ifdef DEBUG 1390 void dump_segtable(u_int *); 1391 void dump_pagetable(u_int *, u_int, u_int); 1392 u_int vmtophys(u_int *, u_int); 1393 1394 void 1395 dump_segtable(u_int *stp) 1396 { 1397 u_int *s, *es; 1398 int shift, i; 1399 1400 s = stp; 1401 { 1402 es = s + (M68K_STSIZE >> 2); 1403 shift = SG_ISHIFT; 1404 } 1405 1406 /* 1407 * XXX need changes for 68040 1408 */ 1409 for (i = 0; s < es; s++, i++) 1410 if (*s & SG_V) 1411 printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME); 1412 printf("\n"); 1413 } 1414 1415 void 1416 dump_pagetable(u_int *ptp, u_int i, u_int n) 1417 { 1418 u_int *p, *ep; 1419 1420 p = ptp + i; 1421 ep = p + n; 1422 for (; p < ep; p++, i++) 1423 if (*p & PG_V) 1424 printf("$%08x -> $%08x\t", i, *p & PG_FRAME); 1425 printf("\n"); 1426 } 1427 1428 u_int 1429 vmtophys(u_int *ste, u_int vm) 1430 { 1431 1432 ste = (u_int *)(*(ste + (vm >> SEGSHIFT)) & SG_FRAME); 1433 ste += (vm & SG_PMASK) >> PGSHIFT; 1434 return (*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1)); 1435 } 1436 1437 #endif 1438