1 /* $NetBSD: atari_init.c,v 1.92 2009/12/11 22:23:08 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Leo Weppelman 5 * Copyright (c) 1994 Michael L. Hitch 6 * Copyright (c) 1993 Markus Wild 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Markus Wild. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.92 2009/12/11 22:23:08 tsutsui Exp $"); 37 38 #include "opt_ddb.h" 39 #include "opt_mbtype.h" 40 #include "opt_m060sp.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/ioctl.h> 45 #include <sys/select.h> 46 #include <sys/tty.h> 47 #include <sys/buf.h> 48 #include <sys/msgbuf.h> 49 #include <sys/mbuf.h> 50 #include <sys/extent.h> 51 #include <sys/protosw.h> 52 #include <sys/domain.h> 53 #include <sys/dkbad.h> 54 #include <sys/reboot.h> 55 #include <sys/exec.h> 56 #include <sys/exec_aout.h> 57 #include <sys/core.h> 58 #include <sys/kcore.h> 59 60 #include <uvm/uvm_extern.h> 61 62 #include <machine/vmparam.h> 63 #include <machine/pte.h> 64 #include <machine/cpu.h> 65 #include <machine/iomap.h> 66 #include <machine/mfp.h> 67 #include <machine/scu.h> 68 #include <machine/acia.h> 69 #include <machine/kcore.h> 70 #include <machine/intr.h> 71 72 #include <m68k/cpu.h> 73 #include <m68k/cacheops.h> 74 75 #include <atari/atari/stalloc.h> 76 #include <atari/dev/clockvar.h> 77 #include <atari/dev/ym2149reg.h> 78 79 #include "pci.h" 80 81 void start_c(int, u_int, u_int, u_int, char *); 82 static void atari_hwinit(void); 83 static void cpu_init_kcorehdr(paddr_t, paddr_t); 84 static void initcpu(void); 85 static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 86 static void map_io_areas(paddr_t, psize_t, u_int); 87 static void set_machtype(void); 88 89 #if defined(M68040) || defined(M68060) 90 static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 91 #endif 92 93 /* 94 * Extent maps to manage all memory space, including I/O ranges. Allocate 95 * storage for 8 regions in each, initially. Later, iomem_malloc_safe 96 * will indicate that it's safe to use malloc() to dynamically allocate 97 * region descriptors. 98 * This means that the fixed static storage is only used for registrating 99 * the found memory regions and the bus-mapping of the console. 100 * 101 * The extent maps are not static! They are used for bus address space 102 * allocation. 103 */ 104 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 105 struct extent *iomem_ex; 106 int iomem_malloc_safe; 107 108 /* 109 * All info needed to generate a panic dump. All fields are setup by 110 * start_c(). 111 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap 112 * here.... Also, the name is badly choosen. Phys_segs contains the 113 * segment descriptions _after_ reservations are made. 114 * XXX: 'lowram' is obsoleted by the new panicdump format 115 */ 116 static cpu_kcore_hdr_t cpu_kcore_hdr; 117 118 extern u_int lowram; 119 int machineid, mmutype, cputype, astpending; 120 121 extern char *esym; 122 extern struct pcb *curpcb; 123 124 /* 125 * This is the virtual address of physical page 0. Used by 'do_boot()'. 126 */ 127 vaddr_t page_zero; 128 129 /* 130 * Crude support for allocation in ST-ram. Currently only used to allocate 131 * video ram. 132 * The physical address is also returned because the video init needs it to 133 * setup the controller at the time the vm-system is not yet operational so 134 * 'kvtop()' cannot be used. 135 */ 136 #ifndef ST_POOL_SIZE 137 #define ST_POOL_SIZE 40 /* XXX: enough? */ 138 #endif 139 140 u_long st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable */ 141 u_long st_pool_virt, st_pool_phys; 142 143 /* 144 * Are we relocating the kernel to TT-Ram if possible? It is faster, but 145 * it is also reported not to work on all TT's. So the default is NO. 146 */ 147 #ifndef RELOC_KERNEL 148 #define RELOC_KERNEL 0 149 #endif 150 int reloc_kernel = RELOC_KERNEL; /* Patchable */ 151 152 #define RELOC_PA(base, pa) ((base) + (pa)) /* used to set up PTE etc. */ 153 154 /* 155 * this is the C-level entry function, it's called from locore.s. 156 * Preconditions: 157 * Interrupts are disabled 158 * PA == VA, we don't have to relocate addresses before enabling 159 * the MMU 160 * Exec is no longer available (because we're loaded all over 161 * low memory, no ExecBase is available anymore) 162 * 163 * It's purpose is: 164 * Do the things that are done in locore.s in the hp300 version, 165 * this includes allocation of kernel maps and enabling the MMU. 166 * 167 * Some of the code in here is `stolen' from Amiga MACH, and was 168 * written by Bryan Ford and Niklas Hallqvist. 169 * 170 * Very crude 68040 support by Michael L. Hitch. 171 */ 172 int kernel_copyback = 1; 173 174 void 175 start_c(int id, u_int ttphystart, u_int ttphysize, u_int stphysize, 176 char *esym_addr) 177 /* id: Machine id */ 178 /* ttphystart, ttphysize: Start address and size of TT-ram */ 179 /* stphysize: Size of ST-ram */ 180 /* esym_addr: Address of kernel '_esym' symbol */ 181 { 182 extern char end[]; 183 extern void etext(void); 184 extern u_long protorp[2]; 185 paddr_t pstart; /* Next available physical address */ 186 vaddr_t vstart; /* Next available virtual address */ 187 vsize_t avail; 188 paddr_t ptpa; 189 psize_t ptsize; 190 u_int ptextra; 191 vaddr_t kva; 192 u_int tc, i; 193 pt_entry_t *pg, *epg; 194 pt_entry_t pg_proto; 195 vaddr_t end_loaded; 196 paddr_t kbase; 197 u_int kstsize; 198 paddr_t Sysptmap_pa; 199 200 #if defined(_MILANHW_) 201 /* XXX 202 * XXX The right place todo this is probably the booter (Leo) 203 * XXX More than 16MB memory is not yet supported on the Milan! 204 * The Milan Lies about the presence of TT-RAM. If you insert 205 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM, 206 * starting at address 16MB. 207 */ 208 stphysize += ttphysize; 209 ttphysize = ttphystart = 0; 210 #endif 211 boot_segs[0].start = 0; 212 boot_segs[0].end = stphysize; 213 boot_segs[1].start = ttphystart; 214 boot_segs[1].end = ttphystart + ttphysize; 215 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */ 216 217 /* 218 * The following is a hack. We do not know how much ST memory we 219 * really need until after configuration has finished. At this 220 * time I have no idea how to grab ST memory at that time. 221 * The round_page() call is ment to correct errors made by 222 * binpatching! 223 */ 224 st_pool_size = m68k_round_page(st_pool_size); 225 st_pool_phys = stphysize - st_pool_size; 226 stphysize = st_pool_phys; 227 228 machineid = id; 229 esym = esym_addr; 230 231 /* 232 * the kernel ends at end() or esym. 233 */ 234 if (esym == NULL) 235 end_loaded = (vaddr_t)&end; 236 else 237 end_loaded = (vaddr_t)esym; 238 239 /* 240 * If we have enough fast-memory to put the kernel in and the 241 * RELOC_KERNEL option is set, do it! 242 */ 243 if ((reloc_kernel != 0) && (ttphysize >= end_loaded)) 244 kbase = ttphystart; 245 else 246 kbase = 0; 247 248 /* 249 * Determine the type of machine we are running on. This needs 250 * to be done early (and before initcpu())! 251 */ 252 set_machtype(); 253 254 /* 255 * Initialize CPU specific stuff 256 */ 257 initcpu(); 258 259 /* 260 * We run the kernel from ST memory at the moment. 261 * The kernel segment table is put just behind the loaded image. 262 * pstart: start of usable ST memory 263 * avail : size of ST memory available. 264 */ 265 vstart = (vaddr_t)end_loaded; 266 vstart = m68k_round_page(vstart); 267 pstart = (paddr_t)vstart; /* pre-reloc PA == kernel VA here */ 268 avail = stphysize - pstart; 269 270 /* 271 * Save KVA of lwp0 uarea and allocate it. 272 */ 273 lwp0uarea = vstart; 274 pstart += USPACE; 275 vstart += USPACE; 276 avail -= USPACE; 277 278 /* 279 * Calculate the number of pages needed for Sysseg. 280 * For the 68030, we need 256 descriptors (segment-table-entries). 281 * This easily fits into one page. 282 * For the 68040, both the level-1 and level-2 descriptors are 283 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE 284 * level-1 & level-2 tables. 285 */ 286 #if defined(M68040) || defined(M68060) 287 if (mmutype == MMU_68040) 288 kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); 289 else 290 #endif 291 kstsize = 1; 292 /* 293 * allocate the kernel segment table 294 */ 295 Sysseg_pa = pstart; /* pre-reloc PA to init STEs */ 296 Sysseg = (st_entry_t *)vstart; 297 pstart += kstsize * PAGE_SIZE; 298 vstart += kstsize * PAGE_SIZE; 299 avail -= kstsize * PAGE_SIZE; 300 301 /* 302 * allocate kernel page table map 303 */ 304 Sysptmap_pa = pstart; /* pre-reloc PA to init PTEs */ 305 Sysptmap = (pt_entry_t *)vstart; 306 pstart += PAGE_SIZE; 307 vstart += PAGE_SIZE; 308 avail -= PAGE_SIZE; 309 310 /* 311 * Determine the number of pte's we need for extra's like 312 * ST I/O map's. 313 */ 314 ptextra = btoc(STIO_SIZE); 315 316 /* 317 * If present, add pci areas 318 */ 319 if (machineid & ATARI_HADES) 320 ptextra += btoc(PCI_CONFIG_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE); 321 if (machineid & ATARI_MILAN) 322 ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE); 323 ptextra += btoc(BOOTM_VA_POOL); 324 325 /* 326 * The 'pt' (the initial kernel pagetable) has to map the kernel and 327 * the I/O areas. The various I/O areas are mapped (virtually) at 328 * the top of the address space mapped by 'pt' (ie. just below Sysmap). 329 */ 330 ptpa = pstart; /* pre-reloc PA to init PTEs */ 331 ptsize = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT; 332 pstart += ptsize; 333 vstart += ptsize; 334 avail -= ptsize; 335 336 /* 337 * Sysmap is now placed at the end of Supervisor virtual address space. 338 */ 339 Sysmap = (pt_entry_t *)SYSMAP_VA; 340 341 /* 342 * Initialize segment tables 343 */ 344 #if defined(M68040) || defined(M68060) 345 if (mmutype == MMU_68040) 346 mmu040_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 347 kbase); 348 else 349 #endif /* defined(M68040) || defined(M68060) */ 350 mmu030_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 351 kbase); 352 353 /* 354 * initialize kernel page table page(s). 355 * Assume load at VA 0. 356 * - Text pages are RO 357 * - Page zero is invalid 358 */ 359 pg_proto = RELOC_PA(kbase, 0) | PG_RO | PG_V; 360 pg = (pt_entry_t *)ptpa; 361 *pg++ = PG_NV; 362 363 pg_proto += PAGE_SIZE; 364 for (kva = PAGE_SIZE; kva < (vaddr_t)etext; kva += PAGE_SIZE) { 365 *pg++ = pg_proto; 366 pg_proto += PAGE_SIZE; 367 } 368 369 /* 370 * data, bss and dynamic tables are read/write 371 */ 372 pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V; 373 374 #if defined(M68040) || defined(M68060) 375 /* 376 * Map the kernel segment table cache invalidated for 377 * these machines (for the 68040 not strictly necessary, but 378 * recommended by Motorola; for the 68060 mandatory) 379 */ 380 if (mmutype == MMU_68040) { 381 382 if (kernel_copyback) 383 pg_proto |= PG_CCB; 384 385 for (; kva < (vaddr_t)Sysseg; kva += PAGE_SIZE) { 386 *pg++ = pg_proto; 387 pg_proto += PAGE_SIZE; 388 } 389 390 pg_proto = (pg_proto & ~PG_CCB) | PG_CI; 391 for (; kva < (vaddr_t)Sysptmap; kva += PAGE_SIZE) { 392 *pg++ = pg_proto; 393 pg_proto += PAGE_SIZE; 394 } 395 396 pg_proto = (pg_proto & ~PG_CI); 397 if (kernel_copyback) 398 pg_proto |= PG_CCB; 399 } 400 #endif /* defined(M68040) || defined(M68060) */ 401 402 /* 403 * go till end of data allocated so far 404 * plus lwp0 u-area (to be allocated) 405 */ 406 for (; kva < vstart; kva += PAGE_SIZE) { 407 *pg++ = pg_proto; 408 pg_proto += PAGE_SIZE; 409 } 410 411 /* 412 * invalidate remainder of kernel PT 413 */ 414 epg = (pt_entry_t *)ptpa; 415 epg = &epg[ptsize / sizeof(pt_entry_t)]; 416 while (pg < epg) 417 *pg++ = PG_NV; 418 419 /* 420 * Map various I/O areas 421 */ 422 map_io_areas(ptpa, ptsize, ptextra); 423 424 /* 425 * Map the allocated space in ST-ram now. In the contig-case, there 426 * is no need to make a distinction between virtual and physical 427 * addresses. But I make it anyway to be prepared. 428 * Physcal space is already reserved! 429 */ 430 st_pool_virt = vstart; 431 pg = (pt_entry_t *)ptpa; 432 pg = &pg[vstart / PAGE_SIZE]; 433 pg_proto = st_pool_phys | PG_RW | PG_CI | PG_V; 434 vstart += st_pool_size; 435 while (pg_proto < (st_pool_phys + st_pool_size)) { 436 *pg++ = pg_proto; 437 pg_proto += PAGE_SIZE; 438 } 439 440 /* 441 * Map physical page_zero and page-zero+1 (First ST-ram page). We need 442 * to reference it in the reboot code. Two pages are mapped, because 443 * we must make sure 'doboot()' is contained in it (see the tricky 444 * copying there....). 445 */ 446 page_zero = vstart; 447 pg = (pt_entry_t *)ptpa; 448 pg = &pg[vstart / PAGE_SIZE]; 449 *pg++ = PG_RW | PG_CI | PG_V; 450 vstart += PAGE_SIZE; 451 *pg = PG_RW | PG_CI | PG_V | PAGE_SIZE; 452 vstart += PAGE_SIZE; 453 454 /* 455 * All necessary STEs and PTEs have been initialized. 456 * Update Sysseg_pa and Sysptmap_pa to point relocated PA. 457 */ 458 if (kbase) { 459 Sysseg_pa += kbase; 460 Sysptmap_pa += kbase; 461 } 462 463 lowram = 0 >> PGSHIFT; /* XXX */ 464 465 /* 466 * Fill in usable segments. The page indexes will be initialized 467 * later when all reservations are made. 468 */ 469 usable_segs[0].start = 0; 470 usable_segs[0].end = stphysize; 471 usable_segs[0].free_list = VM_FREELIST_STRAM; 472 usable_segs[1].start = ttphystart; 473 usable_segs[1].end = ttphystart + ttphysize; 474 usable_segs[1].free_list = VM_FREELIST_TTRAM; 475 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */ 476 477 if (kbase) { 478 /* 479 * First page of ST-ram is unusable, reserve the space 480 * for the kernel in the TT-ram segment. 481 * Note: Because physical page-zero is partially mapped to ROM 482 * by hardware, it is unusable. 483 */ 484 usable_segs[0].start = PAGE_SIZE; 485 usable_segs[1].start += pstart; 486 } else 487 usable_segs[0].start += pstart; 488 489 /* 490 * As all segment sizes are now valid, calculate page indexes and 491 * available physical memory. 492 */ 493 usable_segs[0].first_page = 0; 494 for (i = 1; usable_segs[i].start; i++) { 495 usable_segs[i].first_page = usable_segs[i-1].first_page; 496 usable_segs[i].first_page += 497 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE; 498 } 499 for (i = 0, physmem = 0; usable_segs[i].start; i++) 500 physmem += usable_segs[i].end - usable_segs[i].start; 501 physmem >>= PGSHIFT; 502 503 /* 504 * get the pmap module in sync with reality. 505 */ 506 pmap_bootstrap(vstart); 507 508 /* 509 * Prepare to enable the MMU. 510 * Setup and load SRP nolimit, share global, 4 byte PTE's 511 */ 512 protorp[0] = 0x80000202; 513 protorp[1] = Sysseg_pa; /* + segtable address */ 514 515 cpu_init_kcorehdr(kbase, Sysseg_pa); 516 517 /* 518 * copy over the kernel (and all now initialized variables) 519 * to fastram. DONT use bcopy(), this beast is much larger 520 * than 128k ! 521 */ 522 if (kbase) { 523 register paddr_t *lp, *le, *fp; 524 525 lp = (paddr_t *)0; 526 le = (paddr_t *)pstart; 527 fp = (paddr_t *)kbase; 528 while(lp < le) 529 *fp++ = *lp++; 530 } 531 #if defined(M68040) || defined(M68060) 532 if (mmutype == MMU_68040) { 533 /* 534 * movel Sysseg_pa,a0; 535 * movec a0,SRP; 536 * pflusha; 537 * movel #$0xc000,d0; 538 * movec d0,TC 539 */ 540 if (cputype == CPU_68060) { 541 /* XXX: Need the branch cache be cleared? */ 542 __asm volatile (".word 0x4e7a,0x0002;" 543 "orl #0x400000,%%d0;" 544 ".word 0x4e7b,0x0002" : : : "d0"); 545 } 546 __asm volatile ("movel %0,%%a0;" 547 ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0"); 548 __asm volatile (".word 0xf518" : : ); 549 __asm volatile ("movel #0xc000,%%d0;" 550 ".word 0x4e7b,0x0003" : : : "d0" ); 551 } else 552 #endif 553 { 554 __asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0])); 555 /* 556 * setup and load TC register. 557 * enable_cpr, enable_srp, pagesize=8k, 558 * A = 8 bits, B = 11 bits 559 */ 560 tc = 0x82d08b00; 561 __asm volatile ("pmove %0@,%%tc" : : "a" (&tc)); 562 } 563 564 /* 565 * Initialize the "u-area" pages etc. 566 */ 567 pmap_bootstrap_finalize(); 568 569 /* 570 * Get the hardware into a defined state 571 */ 572 atari_hwinit(); 573 574 /* 575 * Initialize stmem allocator 576 */ 577 init_stmem(); 578 579 /* 580 * Initialize the I/O mem extent map. 581 * Note: we don't have to check the return value since 582 * creation of a fixed extent map will never fail (since 583 * descriptor storage has already been allocated). 584 * 585 * N.B. The iomem extent manages _all_ physical addresses 586 * on the machine. When the amount of RAM is found, all 587 * extents of RAM are allocated from the map. 588 */ 589 iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF, 590 (void *)iomem_ex_storage, sizeof(iomem_ex_storage), 591 EX_NOCOALESCE|EX_NOWAIT); 592 593 /* 594 * Allocate the physical RAM from the extent map 595 */ 596 for (i = 0; boot_segs[i].end != 0; i++) { 597 if (extent_alloc_region(iomem_ex, boot_segs[i].start, 598 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) { 599 /* XXX: Ahum, should not happen ;-) */ 600 printf("Warning: Cannot allocate boot memory from" 601 " extent map!?\n"); 602 } 603 } 604 605 /* 606 * Initialize interrupt mapping. 607 */ 608 intr_init(); 609 } 610 611 /* 612 * Try to figure out on what type of machine we are running 613 * Note: This module runs *before* the io-mapping is setup! 614 */ 615 static void 616 set_machtype(void) 617 { 618 619 #ifdef _MILANHW_ 620 machineid |= ATARI_MILAN; 621 622 #else 623 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */ 624 if (badbaddr((void *)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) { 625 /* 626 * Watch out! We can also have a Hades with < 16Mb 627 * RAM here... 628 */ 629 if (!badbaddr((void *)__UNVOLATILE(&MFP->mf_gpip), 630 sizeof(char))) { 631 machineid |= ATARI_FALCON; 632 return; 633 } 634 } 635 if (!badbaddr((void *)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char))) 636 machineid |= ATARI_HADES; 637 else 638 machineid |= ATARI_TT; 639 #endif /* _MILANHW_ */ 640 } 641 642 static void 643 atari_hwinit(void) 644 { 645 646 #if defined(_ATARIHW_) 647 /* 648 * Initialize the sound chip 649 */ 650 ym2149_init(); 651 652 /* 653 * Make sure that the midi acia will not generate an interrupt 654 * unless something attaches to it. We cannot do this for the 655 * keyboard acia because this breaks the '-d' option of the 656 * booter... 657 */ 658 MDI->ac_cs = 0; 659 #endif /* defined(_ATARIHW_) */ 660 661 /* 662 * Initialize both MFP chips (if both present!) to generate 663 * auto-vectored interrupts with EOI. The active-edge registers are 664 * set up. The interrupt enable registers are set to disable all 665 * interrupts. 666 */ 667 MFP->mf_iera = MFP->mf_ierb = 0; 668 MFP->mf_imra = MFP->mf_imrb = 0; 669 MFP->mf_aer = MFP->mf_ddr = 0; 670 MFP->mf_vr = 0x40; 671 672 #if defined(_ATARIHW_) 673 if (machineid & (ATARI_TT|ATARI_HADES)) { 674 MFP2->mf_iera = MFP2->mf_ierb = 0; 675 MFP2->mf_imra = MFP2->mf_imrb = 0; 676 MFP2->mf_aer = 0x80; 677 MFP2->mf_vr = 0x50; 678 } 679 680 if (machineid & ATARI_TT) { 681 /* 682 * Initialize the SCU, to enable interrupts on the SCC (ipl5), 683 * MFP (ipl6) and softints (ipl1). 684 */ 685 SCU->sys_mask = SCU_SYS_SOFT; 686 SCU->vme_mask = SCU_MFP | SCU_SCC; 687 #ifdef DDB 688 /* 689 * This allows people with the correct hardware modification 690 * to drop into the debugger from an NMI. 691 */ 692 SCU->sys_mask |= SCU_IRQ7; 693 #endif 694 } 695 #endif /* defined(_ATARIHW_) */ 696 697 /* 698 * Initialize a timer for delay(9). 699 */ 700 init_delay(); 701 702 #if NPCI > 0 703 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 704 /* 705 * Configure PCI-bus 706 */ 707 init_pci_bus(); 708 } 709 #endif 710 711 } 712 713 /* 714 * Do the dull work of mapping the various I/O areas. They MUST be Cache 715 * inhibited! 716 * All I/O areas are virtually mapped at the end of the pt-table. 717 */ 718 static void 719 map_io_areas(paddr_t ptpa, psize_t ptsize, u_int ptextra) 720 /* ptsize: Size of 'pt' in bytes */ 721 /* ptextra: #of additional I/O pte's */ 722 { 723 extern void bootm_init(vaddr_t, pt_entry_t *, u_long); 724 vaddr_t ioaddr; 725 pt_entry_t *pt, *pg, *epg; 726 pt_entry_t pg_proto; 727 u_long mask; 728 729 pt = (pt_entry_t *)ptpa; 730 ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE; 731 732 /* 733 * Map ST-IO area 734 */ 735 stio_addr = ioaddr; 736 ioaddr += STIO_SIZE; 737 pg = &pt[stio_addr / PAGE_SIZE]; 738 epg = &pg[btoc(STIO_SIZE)]; 739 #ifdef _MILANHW_ 740 /* 741 * Turn on byte swaps in the ST I/O area. On the Milan, the 742 * U0 signal of the MMU controls the BigEndian signal 743 * of the PLX9080. We use this setting so we can read/write the 744 * PLX registers (and PCI-config space) in big-endian mode. 745 */ 746 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100; 747 #else 748 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V; 749 #endif 750 while(pg < epg) { 751 *pg++ = pg_proto; 752 pg_proto += PAGE_SIZE; 753 } 754 755 /* 756 * Map PCI areas 757 */ 758 if (machineid & ATARI_HADES) { 759 /* 760 * Only Hades maps the PCI-config space! 761 */ 762 pci_conf_addr = ioaddr; 763 ioaddr += PCI_CONFIG_SIZE; 764 pg = &pt[pci_conf_addr / PAGE_SIZE]; 765 epg = &pg[btoc(PCI_CONFIG_SIZE)]; 766 mask = PCI_CONFM_PHYS; 767 pg_proto = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V; 768 for (; pg < epg; mask <<= 1) 769 *pg++ = pg_proto | mask; 770 } else 771 pci_conf_addr = 0; /* XXX: should crash */ 772 773 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 774 pci_io_addr = ioaddr; 775 ioaddr += PCI_IO_SIZE; 776 pg = &pt[pci_io_addr / PAGE_SIZE]; 777 epg = &pg[btoc(PCI_IO_SIZE)]; 778 pg_proto = PCI_IO_PHYS | PG_RW | PG_CI | PG_V; 779 while (pg < epg) { 780 *pg++ = pg_proto; 781 pg_proto += PAGE_SIZE; 782 } 783 784 pci_mem_addr = ioaddr; 785 /* Provide an uncached PCI address for the MILAN */ 786 pci_mem_uncached = ioaddr; 787 ioaddr += PCI_MEM_SIZE; 788 epg = &pg[btoc(PCI_MEM_SIZE)]; 789 pg_proto = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V; 790 while (pg < epg) { 791 *pg++ = pg_proto; 792 pg_proto += PAGE_SIZE; 793 } 794 } 795 796 bootm_init(ioaddr, pg, BOOTM_VA_POOL); 797 /* 798 * ioaddr += BOOTM_VA_POOL; 799 * pg = &pg[btoc(BOOTM_VA_POOL)]; 800 */ 801 } 802 803 /* 804 * Used by dumpconf() to get the size of the machine-dependent panic-dump 805 * header in disk blocks. 806 */ 807 808 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t))) 809 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1)) 810 811 int 812 cpu_dumpsize(void) 813 { 814 815 return btodb(MDHDRSIZE); 816 } 817 818 /* 819 * Called by dumpsys() to dump the machine-dependent header. 820 * XXX: Assumes that it will all fit in one diskblock. 821 */ 822 int 823 cpu_dump(int (*dump)(dev_t, daddr_t, void *, size_t), daddr_t *p_blkno) 824 { 825 int buf[MDHDRSIZE/sizeof(int)]; 826 int error; 827 kcore_seg_t *kseg_p; 828 cpu_kcore_hdr_t *chdr_p; 829 830 kseg_p = (kcore_seg_t *)buf; 831 chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)]; 832 833 /* 834 * Generate a segment header 835 */ 836 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU); 837 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p)); 838 839 /* 840 * Add the md header 841 */ 842 *chdr_p = cpu_kcore_hdr; 843 error = dump(dumpdev, *p_blkno, (void *)buf, sizeof(buf)); 844 *p_blkno += btodb(sizeof(buf)); 845 return (error); 846 } 847 848 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS) 849 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS" 850 #endif 851 /* 852 * Initialize the cpu_kcore_header. 853 */ 854 static void 855 cpu_init_kcorehdr(paddr_t kbase, paddr_t sysseg_pa) 856 { 857 cpu_kcore_hdr_t *h = &cpu_kcore_hdr; 858 struct m68k_kcore_hdr *m = &h->un._m68k; 859 extern char end[]; 860 int i; 861 862 memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr)); 863 864 /* 865 * Initialize the `dispatcher' portion of the header. 866 */ 867 strcpy(h->name, machine); 868 h->page_size = PAGE_SIZE; 869 h->kernbase = KERNBASE; 870 871 /* 872 * Fill in information about our MMU configuration. 873 */ 874 m->mmutype = mmutype; 875 m->sg_v = SG_V; 876 m->sg_frame = SG_FRAME; 877 m->sg_ishift = SG_ISHIFT; 878 m->sg_pmask = SG_PMASK; 879 m->sg40_shift1 = SG4_SHIFT1; 880 m->sg40_mask2 = SG4_MASK2; 881 m->sg40_shift2 = SG4_SHIFT2; 882 m->sg40_mask3 = SG4_MASK3; 883 m->sg40_shift3 = SG4_SHIFT3; 884 m->sg40_addr1 = SG4_ADDR1; 885 m->sg40_addr2 = SG4_ADDR2; 886 m->pg_v = PG_V; 887 m->pg_frame = PG_FRAME; 888 889 /* 890 * Initialize pointer to kernel segment table. 891 */ 892 m->sysseg_pa = sysseg_pa; /* PA after relocation */ 893 894 /* 895 * Initialize relocation value such that: 896 * 897 * pa = (va - KERNBASE) + reloc 898 */ 899 m->reloc = kbase; 900 901 /* 902 * Define the end of the relocatable range. 903 */ 904 m->relocend = (vaddr_t)end; 905 906 for (i = 0; i < NMEM_SEGS; i++) { 907 m->ram_segs[i].start = boot_segs[i].start; 908 m->ram_segs[i].size = boot_segs[i].end - 909 boot_segs[i].start; 910 } 911 } 912 913 void 914 mmu030_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 915 paddr_t sysptmap_pa, paddr_t kbase) 916 /* sysseg_pa: System segment table */ 917 /* kstsize: size of 'sysseg' in pages */ 918 /* ptpa: Kernel page table */ 919 /* ptsize: size of 'pt' in bytes */ 920 /* sysptmap_pa: System page table */ 921 { 922 st_entry_t sg_proto, *sg, *esg; 923 pt_entry_t pg_proto, *pg, *epg; 924 925 /* 926 * Map the page table pages in both the HW segment table 927 * and the software Sysptmap. 928 */ 929 sg = (st_entry_t *)sysseg_pa; 930 pg = (pt_entry_t *)sysptmap_pa; 931 epg = &pg[ptsize >> PGSHIFT]; 932 sg_proto = RELOC_PA(kbase, ptpa) | SG_RW | SG_V; 933 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 934 while (pg < epg) { 935 *sg++ = sg_proto; 936 *pg++ = pg_proto; 937 sg_proto += PAGE_SIZE; 938 pg_proto += PAGE_SIZE; 939 } 940 941 /* 942 * Invalidate the remainder of the tables. 943 */ 944 esg = (st_entry_t *)sysseg_pa; 945 esg = &esg[TIA_SIZE]; 946 while (sg < esg) 947 *sg++ = SG_NV; 948 epg = (pt_entry_t *)sysptmap_pa; 949 epg = &epg[TIB_SIZE]; 950 while (pg < epg) 951 *pg++ = PG_NV; 952 953 /* 954 * Initialize the PTE for the last one to point Sysptmap. 955 */ 956 sg = (st_entry_t *)sysseg_pa; 957 sg = &sg[SYSMAP_VA >> SEGSHIFT]; 958 pg = (pt_entry_t *)sysptmap_pa; 959 pg = &pg[SYSMAP_VA >> SEGSHIFT]; 960 *sg = RELOC_PA(kbase, sysptmap_pa) | SG_RW | SG_V; 961 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 962 } 963 964 #if defined(M68040) || defined(M68060) 965 void 966 mmu040_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, 967 paddr_t sysptmap_pa, paddr_t kbase) 968 /* sysseg_pa: System segment table */ 969 /* kstsize: size of 'sysseg' in pages */ 970 /* ptpa: Kernel page table */ 971 /* ptsize: size of 'pt' in bytes */ 972 /* sysptmap_pa: System page table */ 973 { 974 int nl1desc, nl2desc, i; 975 st_entry_t sg_proto, *sg, *esg; 976 pt_entry_t pg_proto, *pg, *epg; 977 978 /* 979 * First invalidate the entire "segment table" pages 980 * (levels 1 and 2 have the same "invalid" values). 981 */ 982 sg = (st_entry_t *)sysseg_pa; 983 esg = &sg[kstsize * NPTEPG]; 984 while (sg < esg) 985 *sg++ = SG_NV; 986 987 /* 988 * Initialize level 2 descriptors (which immediately 989 * follow the level 1 table). 990 * We need: 991 * NPTEPG / SG4_LEV3SIZE 992 * level 2 descriptors to map each of the nptpages 993 * pages of PTEs. Note that we set the "used" bit 994 * now to save the HW the expense of doing it. 995 */ 996 nl2desc = (ptsize >> PGSHIFT) * (NPTEPG / SG4_LEV3SIZE); 997 sg = (st_entry_t *)sysseg_pa; 998 sg = &sg[SG4_LEV1SIZE]; 999 esg = &sg[nl2desc]; 1000 sg_proto = RELOC_PA(kbase, ptpa) | SG_U | SG_RW | SG_V; 1001 while (sg < esg) { 1002 *sg++ = sg_proto; 1003 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1004 } 1005 1006 /* 1007 * Initialize level 1 descriptors. We need: 1008 * howmany(nl2desc, SG4_LEV2SIZE) 1009 * level 1 descriptors to map the 'nl2desc' level 2's. 1010 */ 1011 nl1desc = howmany(nl2desc, SG4_LEV2SIZE); 1012 sg = (st_entry_t *)sysseg_pa; 1013 esg = &sg[nl1desc]; 1014 sg_proto = RELOC_PA(kbase, (paddr_t)&sg[SG4_LEV1SIZE]) 1015 | SG_U | SG_RW | SG_V; 1016 while (sg < esg) { 1017 *sg++ = sg_proto; 1018 sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t)); 1019 } 1020 1021 /* Sysmap is last entry in level 1 */ 1022 sg = (st_entry_t *)sysseg_pa; 1023 sg = &sg[SG4_LEV1SIZE - 1]; 1024 *sg = sg_proto; 1025 1026 /* 1027 * Kernel segment table at end of next level 2 table 1028 */ 1029 i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE); 1030 sg = (st_entry_t *)sysseg_pa; 1031 sg = &sg[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)]; 1032 esg = &sg[NPTEPG / SG4_LEV3SIZE]; 1033 sg_proto = RELOC_PA(kbase, sysptmap_pa) | SG_U | SG_RW | SG_V; 1034 while (sg < esg) { 1035 *sg++ = sg_proto; 1036 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1037 } 1038 1039 /* Include additional level 2 table for Sysmap in protostfree */ 1040 protostfree = (~0 << (1 + nl1desc + 1)) /* & ~(~0 << MAXKL2SIZE) */; 1041 1042 /* 1043 * Initialize Sysptmap 1044 */ 1045 pg = (pt_entry_t *)sysptmap_pa; 1046 epg = &pg[ptsize >> PGSHIFT]; 1047 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 1048 while (pg < epg) { 1049 *pg++ = pg_proto; 1050 pg_proto += PAGE_SIZE; 1051 } 1052 1053 /* 1054 * Invalidate rest of Sysptmap page. 1055 */ 1056 epg = (pt_entry_t *)sysptmap_pa; 1057 epg = &epg[TIB_SIZE]; 1058 while (pg < epg) 1059 *pg++ = PG_NV; 1060 1061 /* 1062 * Initialize the PTE for the last one to point Sysptmap. 1063 */ 1064 pg = (pt_entry_t *)sysptmap_pa; 1065 pg = &pg[SYSMAP_VA >> SEGSHIFT]; 1066 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 1067 } 1068 #endif /* M68040 */ 1069 1070 #if defined(M68060) 1071 int m68060_pcr_init = 0x21; /* make this patchable */ 1072 #endif 1073 1074 static void 1075 initcpu(void) 1076 { 1077 typedef void trapfun(void); 1078 1079 switch (cputype) { 1080 1081 #if defined(M68060) 1082 case CPU_68060: 1083 { 1084 extern trapfun *vectab[256]; 1085 extern trapfun buserr60, addrerr4060, fpfault; 1086 #if defined(M060SP) 1087 extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[]; 1088 #else 1089 extern trapfun illinst; 1090 #endif 1091 1092 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : : 1093 "d"(m68060_pcr_init):"d0" ); 1094 1095 /* bus/addrerr vectors */ 1096 vectab[2] = buserr60; 1097 vectab[3] = addrerr4060; 1098 1099 #if defined(M060SP) 1100 /* integer support */ 1101 vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00]; 1102 1103 /* floating point support */ 1104 /* 1105 * XXX maybe we really should run-time check for the 1106 * stack frame format here: 1107 */ 1108 vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30]; 1109 1110 vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38]; 1111 vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40]; 1112 1113 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; 1114 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; 1115 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; 1116 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; 1117 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; 1118 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; 1119 #else 1120 vectab[61] = illinst; 1121 #endif 1122 vectab[48] = fpfault; 1123 } 1124 break; 1125 #endif /* defined(M68060) */ 1126 #if defined(M68040) 1127 case CPU_68040: 1128 { 1129 extern trapfun *vectab[256]; 1130 extern trapfun buserr40, addrerr4060; 1131 1132 /* bus/addrerr vectors */ 1133 vectab[2] = buserr40; 1134 vectab[3] = addrerr4060; 1135 } 1136 break; 1137 #endif /* defined(M68040) */ 1138 #if defined(M68030) || defined(M68020) 1139 case CPU_68030: 1140 case CPU_68020: 1141 { 1142 extern trapfun *vectab[256]; 1143 extern trapfun buserr2030, addrerr2030; 1144 1145 /* bus/addrerr vectors */ 1146 vectab[2] = buserr2030; 1147 vectab[3] = addrerr2030; 1148 } 1149 break; 1150 #endif /* defined(M68030) || defined(M68020) */ 1151 } 1152 1153 DCIS(); 1154 } 1155 1156 #ifdef DEBUG 1157 void dump_segtable(u_int *); 1158 void dump_pagetable(u_int *, u_int, u_int); 1159 u_int vmtophys(u_int *, u_int); 1160 1161 void 1162 dump_segtable(u_int *stp) 1163 { 1164 u_int *s, *es; 1165 int shift, i; 1166 1167 s = stp; 1168 { 1169 es = s + (M68K_STSIZE >> 2); 1170 shift = SG_ISHIFT; 1171 } 1172 1173 /* 1174 * XXX need changes for 68040 1175 */ 1176 for (i = 0; s < es; s++, i++) 1177 if (*s & SG_V) 1178 printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME); 1179 printf("\n"); 1180 } 1181 1182 void 1183 dump_pagetable(u_int *ptp, u_int i, u_int n) 1184 { 1185 u_int *p, *ep; 1186 1187 p = ptp + i; 1188 ep = p + n; 1189 for (; p < ep; p++, i++) 1190 if (*p & PG_V) 1191 printf("$%08x -> $%08x\t", i, *p & PG_FRAME); 1192 printf("\n"); 1193 } 1194 1195 u_int 1196 vmtophys(u_int *ste, u_int vm) 1197 { 1198 1199 ste = (u_int *)(*(ste + (vm >> SEGSHIFT)) & SG_FRAME); 1200 ste += (vm & SG_PMASK) >> PGSHIFT; 1201 return (*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1)); 1202 } 1203 1204 #endif 1205