xref: /netbsd-src/sys/arch/atari/atari/atari_init.c (revision 1394f01b4a9e99092957ca5d824d67219565d9b5)
1 /*	$NetBSD: atari_init.c,v 1.32 1997/07/05 20:50:41 leo Exp $	*/
2 
3 /*
4  * Copyright (c) 1995 Leo Weppelman
5  * Copyright (c) 1994 Michael L. Hitch
6  * Copyright (c) 1993 Markus Wild
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed by Markus Wild.
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/proc.h>
38 #include <vm/vm.h>
39 #include <sys/user.h>
40 #include <sys/ioctl.h>
41 #include <sys/select.h>
42 #include <sys/tty.h>
43 #include <sys/proc.h>
44 #include <sys/buf.h>
45 #include <sys/msgbuf.h>
46 #include <sys/mbuf.h>
47 #include <sys/protosw.h>
48 #include <sys/domain.h>
49 #include <sys/dkbad.h>
50 #include <sys/reboot.h>
51 #include <sys/exec.h>
52 #include <sys/core.h>
53 #include <sys/kcore.h>
54 #include <vm/pmap.h>
55 
56 #include <machine/vmparam.h>
57 #include <machine/pte.h>
58 #include <machine/cpu.h>
59 #include <machine/iomap.h>
60 #include <machine/mfp.h>
61 #include <machine/scu.h>
62 #include <machine/acia.h>
63 #include <machine/kcore.h>
64 
65 #include <m68k/cpu.h>
66 #include <m68k/cacheops.h>
67 
68 #include <atari/atari/intr.h>
69 #include <atari/atari/stalloc.h>
70 #include <atari/dev/ym2149reg.h>
71 
72 void start_c __P((int, u_int, u_int, u_int, char *));
73 static void atari_hwinit __P((void));
74 static void cpu_init_kcorehdr __P((u_long));
75 static void initcpu __P((void));
76 static void mmu030_setup __P((st_entry_t *, u_int, pt_entry_t *, u_int,
77 			      pt_entry_t *, u_int, u_int));
78 static void map_io_areas __P((pt_entry_t *, u_int, u_int));
79 static void set_machtype __P((void));
80 
81 #if defined(M68040) || defined(M68060)
82 static void mmu040_setup __P((st_entry_t *, u_int, pt_entry_t *, u_int,
83 			      pt_entry_t *, u_int, u_int));
84 #endif
85 
86 /*
87  * All info needed to generate a panic dump. All fields are setup by
88  * start_c().
89  * XXX: Should sheck usage of phys_segs. There is some unwanted overlap
90  *      here.... Also, the name is badly choosen. Phys_segs contains the
91  *      segment descriptions _after_ reservations are made.
92  * XXX: 'lowram' is obsoleted by the new panicdump format
93  */
94 static cpu_kcore_hdr_t cpu_kcore_hdr;
95 
96 extern u_int 	lowram;
97 extern u_int	Sysptsize, Sysseg_pa, proc0paddr;
98 extern pt_entry_t *Sysptmap;
99 extern st_entry_t *Sysseg;
100 u_int		*Sysmap;
101 int		machineid, mmutype, cputype, astpending;
102 char		*vmmap;
103 pv_entry_t	pv_table;
104 #if defined(M68040) || defined(M68060)
105 extern int	protostfree;
106 #endif
107 
108 extern char		*esym;
109 extern struct pcb	*curpcb;
110 
111 /*
112  * This is the virtual address of physical page 0. Used by 'do_boot()'.
113  */
114 vm_offset_t	page_zero;
115 
116 /*
117  * Crude support for allocation in ST-ram. Currently only used to allocate
118  * video ram.
119  * The physical address is also returned because the video init needs it to
120  * setup the controller at the time the vm-system is not yet operational so
121  * 'kvtop()' cannot be used.
122  */
123 #ifndef ST_POOL_SIZE
124 #define	ST_POOL_SIZE	40			/* XXX: enough? */
125 #endif
126 
127 u_long	st_pool_size = ST_POOL_SIZE * NBPG;	/* Patchable	*/
128 u_long	st_pool_virt, st_pool_phys;
129 
130 /*
131  * this is the C-level entry function, it's called from locore.s.
132  * Preconditions:
133  *	Interrupts are disabled
134  *	PA == VA, we don't have to relocate addresses before enabling
135  *		the MMU
136  * 	Exec is no longer available (because we're loaded all over
137  *		low memory, no ExecBase is available anymore)
138  *
139  * It's purpose is:
140  *	Do the things that are done in locore.s in the hp300 version,
141  *		this includes allocation of kernel maps and enabling the MMU.
142  *
143  * Some of the code in here is `stolen' from Amiga MACH, and was
144  * written by Bryan Ford and Niklas Hallqvist.
145  *
146  * Very crude 68040 support by Michael L. Hitch.
147  */
148 
149 void
150 start_c(id, ttphystart, ttphysize, stphysize, esym_addr)
151 int	id;			/* Machine id				*/
152 u_int	ttphystart, ttphysize;	/* Start address and size of TT-ram	*/
153 u_int	stphysize;		/* Size of ST-ram	 		*/
154 char	*esym_addr;		/* Address of kernel '_esym' symbol	*/
155 {
156 	extern char	end[];
157 	extern void	etext __P((void));
158 	extern u_long	protorp[2];
159 	u_int		pstart;		/* Next available physical address*/
160 	u_int		vstart;		/* Next available virtual address */
161 	u_int		avail;
162 	pt_entry_t	*pt;
163 	u_int		ptsize, ptextra;
164 	u_int		tc, i;
165 	u_int		*pg;
166 	u_int		pg_proto;
167 	u_int		end_loaded;
168 	u_long		kbase;
169 	u_int		kstsize;
170 
171 	boot_segs[0].start       = 0;
172 	boot_segs[0].end         = stphysize;
173 	boot_segs[1].start       = ttphystart;
174 	boot_segs[1].end         = ttphystart + ttphysize;
175 	boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */
176 
177 	/*
178 	 * The following is a hack. We do not know how much ST memory we
179 	 * really need until after configuration has finished. At this
180 	 * time I have no idea how to grab ST memory at that time.
181 	 * The round_page() call is ment to correct errors made by
182 	 * binpatching!
183 	 */
184 	st_pool_size   = m68k_round_page(st_pool_size);
185 	st_pool_phys   = stphysize - st_pool_size;
186 	stphysize      = st_pool_phys;
187 
188 	machineid      = id;
189 	esym           = esym_addr;
190 
191 	/*
192 	 * the kernel ends at end() or esym.
193 	 */
194 	if(esym == NULL)
195 		end_loaded = (u_int)end;
196 	else end_loaded = (u_int)esym;
197 
198 	/*
199 	 * If we have enough fast-memory to put the kernel in, do it!
200 	 */
201 	if(ttphysize >= end_loaded)
202 		kbase = ttphystart;
203 	else kbase = 0;
204 
205 	/*
206 	 * update these as soon as possible!
207 	 */
208 	PAGE_SIZE  = NBPG;
209 	PAGE_MASK  = NBPG-1;
210 	PAGE_SHIFT = PG_SHIFT;
211 
212 	/*
213 	 * Initialize cpu specific stuff
214 	 */
215 	initcpu();
216 
217 	/*
218 	 * Determine the type of machine we are running on. This needs
219 	 * to be done early!
220 	 */
221 	set_machtype();
222 
223 	/*
224 	 * We run the kernel from ST memory at the moment.
225 	 * The kernel segment table is put just behind the loaded image.
226 	 * pstart: start of usable ST memory
227 	 * avail : size of ST memory available.
228 	 */
229 	pstart = (u_int)end_loaded;
230 	pstart = m68k_round_page(pstart);
231 	avail  = stphysize - pstart;
232 
233 	/*
234 	 * Calculate the number of pages needed for Sysseg.
235 	 * For the 68030, we need 256 descriptors (segment-table-entries).
236 	 * This easily fits into one page.
237 	 * For the 68040, both the level-1 and level-2 descriptors are
238 	 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE
239 	 * level-1 & level-2 tables.
240 	 */
241 #if defined(M68040) || defined(M68060)
242 	if (mmutype == MMU_68040)
243 		kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
244 	else
245 #endif
246 		kstsize = 1;
247 	/*
248 	 * allocate the kernel segment table
249 	 */
250 	Sysseg     = (st_entry_t *)pstart;
251 	Sysseg_pa  = (u_int)Sysseg + kbase;
252 	pstart    += kstsize * NBPG;
253 	avail     -= kstsize * NBPG;
254 
255 	/*
256 	 * Determine the number of pte's we need for extra's like
257 	 * ST I/O map's.
258 	 */
259 	ptextra = btoc(STIO_SIZE);
260 
261 	/*
262 	 * If present, add pci areas
263 	 */
264 	if (machineid & ATARI_HADES)
265 		ptextra += btoc(PCI_CONF_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE);
266 
267 	/*
268 	 * The 'pt' (the initial kernel pagetable) has to map the kernel and
269 	 * the I/O areas. The various I/O areas are mapped (virtually) at
270 	 * the top of the address space mapped by 'pt' (ie. just below Sysmap).
271 	 */
272 	pt      = (pt_entry_t *)pstart;
273 	ptsize  = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT;
274 	pstart += ptsize;
275 	avail  -= ptsize;
276 
277 	/*
278 	 * allocate kernel page table map
279 	 */
280 	Sysptmap = (pt_entry_t *)pstart;
281 	pstart  += NBPG;
282 	avail   -= NBPG;
283 
284 	/*
285 	 * Set Sysmap; mapped after page table pages. Because I too (LWP)
286 	 * didn't understand the reason for this, I borrowed the following
287 	 * (sligthly modified) comment from mac68k/locore.s:
288 	 * LAK:  There seems to be some confusion here about the next line,
289 	 * so I'll explain.  The kernel needs some way of dynamically modifying
290 	 * the page tables for its own virtual memory.  What it does is that it
291 	 * has a page table map.  This page table map is mapped right after the
292 	 * kernel itself (in our implementation; in HP's it was after the I/O
293 	 * space). Therefore, the first three (or so) entries in the segment
294 	 * table point to the first three pages of the page tables (which
295 	 * point to the kernel) and the next entry in the segment table points
296 	 * to the page table map (this is done later).  Therefore, the value
297 	 * of the pointer "Sysmap" will be something like 16M*3 = 48M.  When
298 	 * the kernel addresses this pointer (e.g., Sysmap[0]), it will get
299 	 * the first longword of the first page map (== pt[0]).  Since the
300 	 * page map mirrors the segment table, addressing any index of Sysmap
301 	 * will give you a PTE of the page maps which map the kernel.
302 	 */
303 	Sysmap = (u_int *)(ptsize << (SEGSHIFT - PGSHIFT));
304 
305 	/*
306 	 * Initialize segment tables
307 	 */
308 #if defined(M68040) || defined(M68060)
309 	if (mmutype == MMU_68040)
310 		mmu040_setup(Sysseg, kstsize, pt, ptsize, Sysptmap, 1, kbase);
311 	else
312 #endif /* defined(M68040) || defined(M68060) */
313 		mmu030_setup(Sysseg, kstsize, pt, ptsize, Sysptmap, 1, kbase);
314 
315 	/*
316 	 * initialize kernel page table page(s).
317 	 * Assume load at VA 0.
318 	 * - Text pages are RO
319 	 * - Page zero is invalid
320 	 */
321 	pg_proto = (0 + kbase) | PG_RO | PG_V;
322 	pg       = pt;
323 	*pg++ = PG_NV; pg_proto += NBPG;
324 	for(i = NBPG; i < (u_int)etext; i += NBPG, pg_proto += NBPG)
325 		*pg++ = pg_proto;
326 
327 	/*
328 	 * data, bss and dynamic tables are read/write
329 	 */
330 	pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V;
331 
332 #if defined(M68040) || defined(M68060)
333 	/*
334 	 * Map the kernel segment table cache invalidated for
335 	 * these machines (for the 68040 not strictly necessary, but
336 	 * recommended by Motorola; for the 68060 mandatory)
337 	 */
338 	if (mmutype == MMU_68040) {
339 	    for (; i < (u_int)Sysseg; i += NBPG, pg_proto += NBPG)
340 		*pg++ = pg_proto;
341 	    pg_proto = (pg_proto & ~PG_CCB) | PG_CI;
342 	    for (; i < (u_int)&Sysseg[kstsize * NPTEPG]; i += NBPG,
343 							 pg_proto += NBPG)
344 		*pg++ = pg_proto;
345 	    pg_proto = (pg_proto & ~PG_CI) | PG_CCB;
346 	}
347 #endif /* defined(M68040) || defined(M68060) */
348 
349 	/*
350 	 * go till end of data allocated so far
351 	 * plus proc0 u-area (to be allocated)
352 	 */
353 	for(; i < pstart + USPACE; i += NBPG, pg_proto += NBPG)
354 		*pg++ = pg_proto;
355 
356 	/*
357 	 * invalidate remainder of kernel PT
358 	 */
359 	while(pg < &pt[ptsize/sizeof(pt_entry_t)])
360 		*pg++ = PG_NV;
361 
362 	/*
363 	 * Map various I/O areas
364 	 */
365 	map_io_areas(pt, ptsize, ptextra);
366 
367 	/*
368 	 * Save KVA of proc0 user-area and allocate it
369 	 */
370 	proc0paddr = pstart;
371 	pstart    += USPACE;
372 	avail     -= USPACE;
373 
374 	/*
375 	 * At this point, virtual and physical allocation starts to divert.
376 	 */
377 	vstart     = pstart;
378 
379 	/*
380 	 * Map the allocated space in ST-ram now. In the contig-case, there
381 	 * is no need to make a distinction between virtual and physical
382 	 * adresses. But I make it anyway to be prepared.
383 	 * Physcal space is already reserved!
384 	 */
385 	st_pool_virt = vstart;
386 	pg           = &pt[vstart / NBPG];
387 	pg_proto     = st_pool_phys | PG_RW | PG_CI | PG_V;
388 	vstart      += st_pool_size;
389 	while(pg_proto < (st_pool_phys + st_pool_size)) {
390 		*pg++     = pg_proto;
391 		pg_proto += NBPG;
392 	}
393 
394 	/*
395 	 * Map physical page_zero and page-zero+1 (First ST-ram page). We need
396 	 * to reference it in the reboot code. Two pages are mapped, because
397 	 * we must make sure 'doboot()' is contained in it (see the tricky
398 	 * copying there....).
399 	 */
400 	page_zero  = vstart;
401 	pg         = &pt[vstart / NBPG];
402 	*pg++      = PG_RW | PG_CI | PG_V;
403 	vstart    += NBPG;
404 	*pg        = PG_RW | PG_CI | PG_V | NBPG;
405 	vstart    += NBPG;
406 
407 	lowram  = 0 >> PGSHIFT; /* XXX */
408 
409 	/*
410 	 * Fill in usable segments. The page indexes will be initialized
411 	 * later when all reservations are made.
412 	 */
413 	usable_segs[0].start = 0;
414 	usable_segs[0].end   = stphysize;
415 	usable_segs[1].start = ttphystart;
416 	usable_segs[1].end   = ttphystart + ttphysize;
417 	usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */
418 
419 	if(kbase) {
420 		/*
421 		 * First page of ST-ram is unusable, reserve the space
422 		 * for the kernel in the TT-ram segment.
423 		 * Note: Because physical page-zero is partially mapped to ROM
424 		 *       by hardware, it is unusable.
425 		 */
426 		usable_segs[0].start  = NBPG;
427 		usable_segs[1].start += pstart;
428 	}
429 	else usable_segs[0].start += pstart;
430 
431 	/*
432 	 * As all segment sizes are now valid, calculate page indexes and
433 	 * available physical memory.
434 	 */
435 	usable_segs[0].first_page = 0;
436 	for (i = 1; usable_segs[i].start; i++) {
437 		usable_segs[i].first_page  = usable_segs[i-1].first_page;
438 		usable_segs[i].first_page +=
439 			(usable_segs[i-1].end - usable_segs[i-1].start) / NBPG;
440 	}
441 	for (i = 0, physmem = 0; usable_segs[i].start; i++)
442 		physmem += usable_segs[i].end - usable_segs[i].start;
443 	physmem >>= PGSHIFT;
444 
445 	/*
446 	 * get the pmap module in sync with reality.
447 	 */
448 	pmap_bootstrap(vstart, stio_addr, ptextra);
449 
450 	/*
451 	 * Prepare to enable the MMU.
452 	 * Setup and load SRP nolimit, share global, 4 byte PTE's
453 	 */
454 	protorp[0] = 0x80000202;
455 	protorp[1] = (u_int)Sysseg + kbase;	/* + segtable address */
456 	Sysseg_pa  = (u_int)Sysseg + kbase;
457 
458 	cpu_init_kcorehdr(kbase);
459 
460 	/*
461 	 * copy over the kernel (and all now initialized variables)
462 	 * to fastram.  DONT use bcopy(), this beast is much larger
463 	 * than 128k !
464 	 */
465 	if(kbase) {
466 		register u_long	*lp, *le, *fp;
467 
468 		lp = (u_long *)0;
469 		le = (u_long *)pstart;
470 		fp = (u_long *)kbase;
471 		while(lp < le)
472 			*fp++ = *lp++;
473 	}
474 #if defined(M68040) || defined(M68060)
475 	if (mmutype == MMU_68040) {
476 		/*
477 		 * movel Sysseg_pa,a0;
478 		 * movec a0,SRP;
479 		 * pflusha;
480 		 * movel #$0xc000,d0;
481 		 * movec d0,TC
482 		 */
483 		if (cputype == CPU_68060) {
484 			/* XXX: Need the branch cache be cleared? */
485 			asm volatile (".word 0x4e7a,0x0002;"
486 				      "orl #0x400000,d0;"
487 				      ".word 0x4e7b,0x0002" : : : "d0");
488 		}
489 		asm volatile ("movel %0,a0;"
490 			      ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0");
491 		asm volatile (".word 0xf518" : : );
492 		asm volatile ("movel #0xc000,d0;"
493 			      ".word 0x4e7b,0x0003" : : : "d0" );
494 	} else
495 #endif
496 	{
497 		asm volatile ("pmove %0@,srp" : : "a" (&protorp[0]));
498 		/*
499 		 * setup and load TC register.
500 		 * enable_cpr, enable_srp, pagesize=8k,
501 		 * A = 8 bits, B = 11 bits
502 		 */
503 		tc = 0x82d08b00;
504 		asm volatile ("pmove %0@,tc" : : "a" (&tc));
505 	}
506 
507 	/* Is this to fool the optimizer?? */
508 	i = *(int *)proc0paddr;
509 	*(volatile int *)proc0paddr = i;
510 
511 	/*
512 	 * Initialize the "u-area" pages.
513 	 * Must initialize p_addr before autoconfig or the
514 	 * fault handler will get a NULL reference.
515 	 */
516 	bzero((u_char *)proc0paddr, USPACE);
517 	proc0.p_addr = (struct user *)proc0paddr;
518 	curproc = &proc0;
519 	curpcb  = &((struct user *)proc0paddr)->u_pcb;
520 
521 	/*
522 	 * Get the hardware into a defined state
523 	 */
524 	atari_hwinit();
525 
526 	/*
527 	 * Initialize stmem allocator
528 	 */
529 	init_stmem();
530 
531 	/*
532 	 * Initialize interrupt mapping.
533 	 */
534 	intr_init();
535 }
536 
537 /*
538  * Try to figure out on what type of machine we are running
539  * Note: This module runs *before* the io-mapping is setup!
540  */
541 static void
542 set_machtype()
543 {
544 	stio_addr = 0xff8000;	/* XXX: For TT & Falcon only */
545 	if(badbaddr((caddr_t)&MFP2->mf_gpip, sizeof(char))) {
546 		/*
547 		 * Watch out! We can also have a Hades with < 16Mb
548 		 * RAM here...
549 		 */
550 		if(!badbaddr((caddr_t)&MFP->mf_gpip, sizeof(char))) {
551 			machineid |= ATARI_FALCON;
552 			return;
553 		}
554 	}
555 	if(!badbaddr((caddr_t)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char)))
556 		machineid |= ATARI_HADES;
557 	else machineid |= ATARI_TT;
558 }
559 
560 static void
561 atari_hwinit()
562 {
563 	/*
564 	 * Initialize the sound chip
565 	 */
566 	ym2149_init();
567 
568 	/*
569 	 * Make sure that the midi acia will not generate an interrupt
570 	 * unless something attaches to it. We cannot do this for the
571 	 * keyboard acia because this breaks the '-d' option of the
572 	 * booter...
573 	 */
574 	MDI->ac_cs = 0;
575 
576 	/*
577 	 * Initialize both MFP chips (if both present!) to generate
578 	 * auto-vectored interrupts with EOI. The active-edge registers are
579 	 * set up. The interrupt enable registers are set to disable all
580 	 * interrupts.
581 	 */
582 	MFP->mf_iera  = MFP->mf_ierb = 0;
583 	MFP->mf_imra  = MFP->mf_imrb = 0;
584 	MFP->mf_aer   = MFP->mf_ddr  = 0;
585 	MFP->mf_vr    = 0x40;
586 	if(machineid & (ATARI_TT|ATARI_HADES)) {
587 		MFP2->mf_iera = MFP2->mf_ierb = 0;
588 		MFP2->mf_imra = MFP2->mf_imrb = 0;
589 		MFP2->mf_aer  = 0x80;
590 		MFP2->mf_vr   = 0x50;
591 	}
592 	if(machineid & ATARI_TT) {
593 		/*
594 		 * Initialize the SCU, to enable interrupts on the SCC (ipl5),
595 		 * MFP (ipl6) and softints (ipl1).
596 		 */
597 		SCU->sys_mask = SCU_SYS_SOFT;
598 		SCU->vme_mask = SCU_MFP | SCU_SCC;
599 #ifdef DDB
600 		/*
601 		 * This allows people with the correct hardware modification
602 		 * to drop into the debugger from an NMI.
603 		 */
604 		SCU->sys_mask |= SCU_IRQ7;
605 #endif
606 	}
607 }
608 
609 /*
610  * Do the dull work of mapping the various I/O areas. They MUST be Cache
611  * inhibited!
612  * All I/O areas are virtually mapped at the end of the pt-table.
613  */
614 static void
615 map_io_areas(pt, ptsize, ptextra)
616 pt_entry_t	*pt;
617 u_int		ptsize;		/* Size of 'pt' in bytes	*/
618 u_int		ptextra;	/* #of additional I/O pte's	*/
619 {
620 	vm_offset_t	ioaddr;
621 	pt_entry_t	*pg, *epg;
622 	pt_entry_t	pg_proto;
623 	u_long		mask;
624 
625 	ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * NBPG;
626 
627 	/*
628 	 * Map ST-IO area
629 	 */
630 	stio_addr = ioaddr;
631 	ioaddr   += STIO_SIZE;
632 	pg        = &pt[stio_addr / NBPG];
633 	epg       = &pg[btoc(STIO_SIZE)];
634 	pg_proto  = STIO_PHYS | PG_RW | PG_CI | PG_V;
635 	while(pg < epg) {
636 		*pg++     = pg_proto;
637 		pg_proto += NBPG;
638 	}
639 
640 	/*
641 	 * Map PCI areas
642 	 */
643 	if (machineid & ATARI_HADES) {
644 
645 		pci_conf_addr = ioaddr;
646 		ioaddr       += PCI_CONF_SIZE;
647 		pg            = &pt[pci_conf_addr / NBPG];
648 		epg           = &pg[btoc(PCI_CONF_SIZE)];
649 		mask          = PCI_CONFM_PHYS;
650 		pg_proto      = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V;
651 		for(; pg < epg; mask >>= 1)
652 			*pg++ = pg_proto | mask;
653 
654 		pci_io_addr   = ioaddr;
655 		ioaddr       += PCI_IO_SIZE;
656 		epg           = &pg[btoc(PCI_IO_SIZE)];
657 		pg_proto      = PCI_IO_PHYS | PG_RW | PG_CI | PG_V;
658 		while(pg < epg) {
659 			*pg++     = pg_proto;
660 			pg_proto += NBPG;
661 		}
662 
663 		pci_mem_addr  = ioaddr;
664 		ioaddr       += PCI_MEM_SIZE;
665 		epg           = &pg[btoc(PCI_MEM_SIZE)];
666 		pg_proto      = PCI_MEM_PHYS | PG_RW | PG_CI | PG_V;
667 		while(pg < epg) {
668 			*pg++     = pg_proto;
669 			pg_proto += NBPG;
670 		}
671 	}
672 }
673 
674 /*
675  * Used by dumpconf() to get the size of the machine-dependent panic-dump
676  * header in disk blocks.
677  */
678 int
679 cpu_dumpsize()
680 {
681 	int	size;
682 
683 	size = ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t));
684 	return (btodb(roundup(size, dbtob(1))));
685 }
686 
687 /*
688  * Called by dumpsys() to dump the machine-dependent header.
689  * XXX: Assumes that it will all fit in one diskblock.
690  */
691 int
692 cpu_dump(dump, p_blkno)
693 int	(*dump) __P((dev_t, daddr_t, caddr_t, size_t));
694 daddr_t	*p_blkno;
695 {
696 	int		buf[dbtob(1)/sizeof(int)];
697 	int		error;
698 	kcore_seg_t	*kseg_p;
699 	cpu_kcore_hdr_t	*chdr_p;
700 
701 	kseg_p = (kcore_seg_t *)buf;
702 	chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)];
703 
704 	/*
705 	 * Generate a segment header
706 	 */
707 	CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU);
708 	kseg_p->c_size = dbtob(1) - ALIGN(sizeof(*kseg_p));
709 
710 	/*
711 	 * Add the md header
712 	 */
713 	*chdr_p = cpu_kcore_hdr;
714 	error = dump(dumpdev, *p_blkno, (caddr_t)buf, dbtob(1));
715 	*p_blkno += 1;
716 	return (error);
717 }
718 
719 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS)
720 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS"
721 #endif
722 /*
723  * Initialize the cpu_kcore_header.
724  */
725 static void
726 cpu_init_kcorehdr(kbase)
727 u_long	kbase;
728 {
729 	cpu_kcore_hdr_t *h = &cpu_kcore_hdr;
730 	struct m68k_kcore_hdr *m = &h->un._m68k;
731 	extern char end[];
732 	extern char machine[];
733 	int	i;
734 
735 	bzero(&cpu_kcore_hdr, sizeof(cpu_kcore_hdr));
736 
737 	/*
738 	 * Initialize the `dispatcher' portion of the header.
739 	 */
740 	strcpy(h->name, machine);
741 	h->page_size = NBPG;
742 	h->kernbase = KERNBASE;
743 
744 	/*
745 	 * Fill in information about our MMU configuration.
746 	 */
747 	m->mmutype	= mmutype;
748 	m->sg_v		= SG_V;
749 	m->sg_frame	= SG_FRAME;
750 	m->sg_ishift	= SG_ISHIFT;
751 	m->sg_pmask	= SG_PMASK;
752 	m->sg40_shift1	= SG4_SHIFT1;
753 	m->sg40_mask2	= SG4_MASK2;
754 	m->sg40_shift2	= SG4_SHIFT2;
755 	m->sg40_mask3	= SG4_MASK3;
756 	m->sg40_shift3	= SG4_SHIFT3;
757 	m->sg40_addr1	= SG4_ADDR1;
758 	m->sg40_addr2	= SG4_ADDR2;
759 	m->pg_v		= PG_V;
760 	m->pg_frame	= PG_FRAME;
761 
762 	/*
763 	 * Initialize pointer to kernel segment table.
764 	 */
765 	m->sysseg_pa = (u_int)Sysseg + kbase;
766 
767 	/*
768 	 * Initialize relocation value such that:
769 	 *
770 	 *	pa = (va - KERNBASE) + reloc
771 	 */
772 	m->reloc = kbase;
773 
774 	/*
775 	 * Define the end of the relocatable range.
776 	 */
777 	m->relocend = (u_int32_t)end;
778 
779 	for (i = 0; i < NMEM_SEGS; i++) {
780 		m->ram_segs[i].start = boot_segs[i].start;
781 		m->ram_segs[i].size  = boot_segs[i].end -
782 		    boot_segs[i].start;
783 	}
784 }
785 
786 void
787 mmu030_setup(sysseg, kstsize, pt, ptsize, sysptmap, sysptsize, kbase)
788 	st_entry_t	*sysseg;	/* System segment table		*/
789 	u_int		kstsize;	/* size of 'sysseg' in pages	*/
790 	pt_entry_t	*pt;		/* Kernel page table		*/
791 	u_int		ptsize;		/* size	of 'pt' in bytes	*/
792 	pt_entry_t	*sysptmap;	/* System page table		*/
793 	u_int		sysptsize;	/* size of 'sysptmap' in pages	*/
794 	u_int		kbase;
795 {
796 	st_entry_t	sg_proto, *sg;
797 	pt_entry_t	pg_proto, *pg, *epg;
798 
799 	sg_proto = ((u_int)pt + kbase) | SG_RW | SG_V;
800 	pg_proto = ((u_int)pt + kbase) | PG_RW | PG_CI | PG_V;
801 
802 	/*
803 	 * Map the page table pages in both the HW segment table
804 	 * and the software Sysptmap.  Note that Sysptmap is also
805 	 * considered a PT page, hence the +sysptsize.
806 	 */
807 	sg  = sysseg;
808 	pg  = sysptmap;
809 	epg = &pg[(ptsize >> PGSHIFT) + sysptsize];
810 	while(pg < epg) {
811 		*sg++ = sg_proto;
812 		*pg++ = pg_proto;
813 		sg_proto += NBPG;
814 		pg_proto += NBPG;
815 	}
816 
817 	/*
818 	 * invalidate the remainder of the tables
819 	 */
820 	epg = &sysptmap[sysptsize * NPTEPG];
821 	while(pg < epg) {
822 		*sg++ = SG_NV;
823 		*pg++ = PG_NV;
824 	}
825 }
826 
827 #if defined(M68040) || defined(M68060)
828 void
829 mmu040_setup(sysseg, kstsize, pt, ptsize, sysptmap, sysptsize, kbase)
830 	st_entry_t	*sysseg;	/* System segment table		*/
831 	u_int		kstsize;	/* size of 'sysseg' in pages	*/
832 	pt_entry_t	*pt;		/* Kernel page table		*/
833 	u_int		ptsize;		/* size	of 'pt' in bytes	*/
834 	pt_entry_t	*sysptmap;	/* System page table		*/
835 	u_int		sysptsize;	/* size of 'sysptmap' in pages	*/
836 	u_int		kbase;
837 {
838 	int		i;
839 	st_entry_t	sg_proto, *sg, *esg;
840 	pt_entry_t	pg_proto;
841 
842 	/*
843 	 * First invalidate the entire "segment table" pages
844 	 * (levels 1 and 2 have the same "invalid" values).
845 	 */
846 	sg  = sysseg;
847 	esg = &sg[kstsize * NPTEPG];
848 	while (sg < esg)
849 		*sg++ = SG_NV;
850 
851 	/*
852 	 * Initialize level 2 descriptors (which immediately
853 	 * follow the level 1 table). These should map 'pt' + 'sysptmap'.
854 	 * We need:
855 	 *	NPTEPG / SG4_LEV3SIZE
856 	 * level 2 descriptors to map each of the nptpages + 1
857 	 * pages of PTEs.  Note that we set the "used" bit
858 	 * now to save the HW the expense of doing it.
859 	 */
860 	i   = ((ptsize >> PGSHIFT) + sysptsize) * (NPTEPG / SG4_LEV3SIZE);
861 	sg  = &sysseg[SG4_LEV1SIZE];
862 	esg = &sg[i];
863 	sg_proto = ((u_int)pt + kbase) | SG_U | SG_RW | SG_V;
864 	while (sg < esg) {
865 		*sg++     = sg_proto;
866 		sg_proto += (SG4_LEV3SIZE * sizeof (st_entry_t));
867 	}
868 
869 	/*
870 	 * Initialize level 1 descriptors.  We need:
871 	 *	roundup(num, SG4_LEV2SIZE) / SG4_LEVEL2SIZE
872 	 * level 1 descriptors to map the 'num' level 2's.
873 	 */
874 	i = roundup(i, SG4_LEV2SIZE) / SG4_LEV2SIZE;
875 	protostfree = (-1 << (i + 1)) /* & ~(-1 << MAXKL2SIZE) */;
876 	sg  = sysseg;
877 	esg = &sg[i];
878 	sg_proto = ((u_int)&sg[SG4_LEV1SIZE] + kbase) | SG_U | SG_RW |SG_V;
879 	while (sg < esg) {
880 		*sg++     = sg_proto;
881 		sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t));
882 	}
883 
884 	/*
885 	 * Initialize sysptmap
886 	 */
887 	sg  = sysptmap;
888 	esg = &sg[(ptsize >> PGSHIFT) + sysptsize];
889 	pg_proto = ((u_int)pt + kbase) | PG_RW | PG_CI | PG_V;
890 	while (sg < esg) {
891 		*sg++     = pg_proto;
892 		pg_proto += NBPG;
893 	}
894 	/*
895 	 * Invalidate rest of Sysptmap page
896 	 */
897 	esg = &sysptmap[sysptsize * NPTEPG];
898 	while (sg < esg)
899 		*sg++ = SG_NV;
900 }
901 #endif /* M68040 */
902 
903 #if defined(M68060)
904 int m68060_pcr_init = 0x21;	/* make this patchable */
905 #endif
906 
907 static void
908 initcpu()
909 {
910 	typedef void trapfun __P((void));
911 
912 	switch (cputype) {
913 
914 #if defined(M68060)
915 	case CPU_68060:
916 		{
917 			extern trapfun	*vectab[256];
918 			extern trapfun	buserr60, addrerr4060, fpfault;
919 #if defined(M060SP)
920 			extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[];
921 #else
922 			extern trapfun illinst;
923 #endif
924 
925 			asm volatile ("movl %0,d0; .word 0x4e7b,0x0808" : :
926 					"d"(m68060_pcr_init):"d0" );
927 
928 			/* bus/addrerr vectors */
929 			vectab[2] = buserr60;
930 			vectab[3] = addrerr4060;
931 
932 #if defined(M060SP)
933 			/* integer support */
934 			vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00];
935 
936 			/* floating point support */
937 			/*
938 			 * XXX maybe we really should run-time check for the
939 			 * stack frame format here:
940 			 */
941 			vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30];
942 
943 			vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38];
944 			vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40];
945 
946 			vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00];
947 			vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08];
948 			vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10];
949 			vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18];
950 			vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20];
951 			vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28];
952 #else
953 			vectab[61] = illinst;
954 #endif
955 			vectab[48] = fpfault;
956 		}
957 		break;
958 #endif /* defined(M68060) */
959 #if defined(M68040)
960 	case CPU_68040:
961 		{
962 			extern trapfun	*vectab[256];
963 			extern trapfun	buserr40, addrerr4060;
964 
965 			/* bus/addrerr vectors */
966 			vectab[2] = buserr40;
967 			vectab[3] = addrerr4060;
968 		}
969 		break;
970 #endif /* defined(M68040) */
971 	}
972 
973 	DCIS();
974 }
975 
976 #ifdef DEBUG
977 void
978 dump_segtable(stp)
979 	u_int *stp;
980 {
981 	u_int *s, *es;
982 	int shift, i;
983 
984 	s = stp;
985 	{
986 		es = s + (ATARI_STSIZE >> 2);
987 		shift = SG_ISHIFT;
988 	}
989 
990 	/*
991 	 * XXX need changes for 68040
992 	 */
993 	for (i = 0; s < es; s++, i++)
994 		if (*s & SG_V)
995 			printf("$%08lx: $%08lx\t", i << shift, *s & SG_FRAME);
996 	printf("\n");
997 }
998 
999 void
1000 dump_pagetable(ptp, i, n)
1001 	u_int *ptp, i, n;
1002 {
1003 	u_int *p, *ep;
1004 
1005 	p = ptp + i;
1006 	ep = p + n;
1007 	for (; p < ep; p++, i++)
1008 		if (*p & PG_V)
1009 			printf("$%08lx -> $%08lx\t", i, *p & PG_FRAME);
1010 	printf("\n");
1011 }
1012 
1013 u_int
1014 vmtophys(ste, vm)
1015 	u_int *ste, vm;
1016 {
1017 	ste = (u_int *) (*(ste + (vm >> SEGSHIFT)) & SG_FRAME);
1018 		ste += (vm & SG_PMASK) >> PGSHIFT;
1019 	return((*ste & -NBPG) | (vm & (NBPG - 1)));
1020 }
1021 
1022 #endif
1023