1 /* $NetBSD: atari_init.c,v 1.83 2009/07/08 12:23:09 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Leo Weppelman 5 * Copyright (c) 1994 Michael L. Hitch 6 * Copyright (c) 1993 Markus Wild 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Markus Wild. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atari_init.c,v 1.83 2009/07/08 12:23:09 tsutsui Exp $"); 37 38 #include "opt_ddb.h" 39 #include "opt_mbtype.h" 40 #include "opt_m060sp.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/proc.h> 45 #include <sys/user.h> 46 #include <sys/ioctl.h> 47 #include <sys/select.h> 48 #include <sys/tty.h> 49 #include <sys/buf.h> 50 #include <sys/msgbuf.h> 51 #include <sys/mbuf.h> 52 #include <sys/extent.h> 53 #include <sys/protosw.h> 54 #include <sys/domain.h> 55 #include <sys/dkbad.h> 56 #include <sys/reboot.h> 57 #include <sys/exec.h> 58 #include <sys/core.h> 59 #include <sys/kcore.h> 60 61 #include <uvm/uvm_extern.h> 62 63 #include <machine/vmparam.h> 64 #include <machine/pte.h> 65 #include <machine/cpu.h> 66 #include <machine/iomap.h> 67 #include <machine/mfp.h> 68 #include <machine/scu.h> 69 #include <machine/acia.h> 70 #include <machine/kcore.h> 71 #include <machine/intr.h> 72 73 #include <m68k/cpu.h> 74 #include <m68k/cacheops.h> 75 76 #include <atari/atari/stalloc.h> 77 #include <atari/dev/clockvar.h> 78 #include <atari/dev/ym2149reg.h> 79 80 #include "pci.h" 81 82 void start_c(int, u_int, u_int, u_int, char *); 83 static void atari_hwinit(void); 84 static void cpu_init_kcorehdr(paddr_t, paddr_t); 85 static void initcpu(void); 86 static void mmu030_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 87 static void map_io_areas(paddr_t, psize_t, u_int); 88 static void set_machtype(void); 89 90 #if defined(M68040) || defined(M68060) 91 static void mmu040_setup(paddr_t, u_int, paddr_t, psize_t, paddr_t, paddr_t); 92 #endif 93 94 /* 95 * Extent maps to manage all memory space, including I/O ranges. Allocate 96 * storage for 8 regions in each, initially. Later, iomem_malloc_safe 97 * will indicate that it's safe to use malloc() to dynamically allocate 98 * region descriptors. 99 * This means that the fixed static storage is only used for registrating 100 * the found memory regions and the bus-mapping of the console. 101 * 102 * The extent maps are not static! They are used for bus address space 103 * allocation. 104 */ 105 static long iomem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)]; 106 struct extent *iomem_ex; 107 int iomem_malloc_safe; 108 109 /* 110 * All info needed to generate a panic dump. All fields are setup by 111 * start_c(). 112 * XXX: Should sheck usage of phys_segs. There is some unwanted overlap 113 * here.... Also, the name is badly choosen. Phys_segs contains the 114 * segment descriptions _after_ reservations are made. 115 * XXX: 'lowram' is obsoleted by the new panicdump format 116 */ 117 static cpu_kcore_hdr_t cpu_kcore_hdr; 118 119 extern u_int lowram; 120 extern u_int proc0paddr; 121 int machineid, mmutype, cputype, astpending; 122 #if defined(M68040) || defined(M68060) 123 extern int protostfree; 124 #endif 125 126 extern char *esym; 127 extern struct pcb *curpcb; 128 129 /* 130 * This is the virtual address of physical page 0. Used by 'do_boot()'. 131 */ 132 vaddr_t page_zero; 133 134 /* 135 * Crude support for allocation in ST-ram. Currently only used to allocate 136 * video ram. 137 * The physical address is also returned because the video init needs it to 138 * setup the controller at the time the vm-system is not yet operational so 139 * 'kvtop()' cannot be used. 140 */ 141 #ifndef ST_POOL_SIZE 142 #define ST_POOL_SIZE 40 /* XXX: enough? */ 143 #endif 144 145 u_long st_pool_size = ST_POOL_SIZE * PAGE_SIZE; /* Patchable */ 146 u_long st_pool_virt, st_pool_phys; 147 148 /* 149 * Are we relocating the kernel to TT-Ram if possible? It is faster, but 150 * it is also reported not to work on all TT's. So the default is NO. 151 */ 152 #ifndef RELOC_KERNEL 153 #define RELOC_KERNEL 0 154 #endif 155 int reloc_kernel = RELOC_KERNEL; /* Patchable */ 156 157 #define RELOC_PA(base, pa) ((base) + (pa)) /* used to set up PTE etc. */ 158 159 /* 160 * this is the C-level entry function, it's called from locore.s. 161 * Preconditions: 162 * Interrupts are disabled 163 * PA == VA, we don't have to relocate addresses before enabling 164 * the MMU 165 * Exec is no longer available (because we're loaded all over 166 * low memory, no ExecBase is available anymore) 167 * 168 * It's purpose is: 169 * Do the things that are done in locore.s in the hp300 version, 170 * this includes allocation of kernel maps and enabling the MMU. 171 * 172 * Some of the code in here is `stolen' from Amiga MACH, and was 173 * written by Bryan Ford and Niklas Hallqvist. 174 * 175 * Very crude 68040 support by Michael L. Hitch. 176 */ 177 int kernel_copyback = 1; 178 179 void 180 start_c(int id, u_int ttphystart, u_int ttphysize, u_int stphysize, char *esym_addr) 181 /* id: Machine id */ 182 /* ttphystart, ttphysize: Start address and size of TT-ram */ 183 /* stphysize: Size of ST-ram */ 184 /* esym_addr: Address of kernel '_esym' symbol */ 185 { 186 extern char end[]; 187 extern void etext(void); 188 extern u_long protorp[2]; 189 paddr_t pstart; /* Next available physical address */ 190 vaddr_t vstart; /* Next available virtual address */ 191 vsize_t avail; 192 paddr_t ptpa; 193 psize_t ptsize; 194 u_int ptextra; 195 vaddr_t kva; 196 u_int tc, i; 197 pt_entry_t *pg, *epg; 198 pt_entry_t pg_proto; 199 vaddr_t end_loaded; 200 paddr_t kbase; 201 u_int kstsize; 202 paddr_t Sysseg_pa; 203 paddr_t Sysptmap_pa; 204 205 #if defined(_MILANHW_) 206 /* XXX 207 * XXX The right place todo this is probably the booter (Leo) 208 * XXX More than 16MB memory is not yet supported on the Milan! 209 * The Milan Lies about the presence of TT-RAM. If you insert 210 * 16MB it is split in 14MB ST starting at address 0 and 2MB TT RAM, 211 * starting at address 16MB. 212 */ 213 stphysize += ttphysize; 214 ttphysize = ttphystart = 0; 215 #endif 216 boot_segs[0].start = 0; 217 boot_segs[0].end = stphysize; 218 boot_segs[1].start = ttphystart; 219 boot_segs[1].end = ttphystart + ttphysize; 220 boot_segs[2].start = boot_segs[2].end = 0; /* End of segments! */ 221 222 /* 223 * The following is a hack. We do not know how much ST memory we 224 * really need until after configuration has finished. At this 225 * time I have no idea how to grab ST memory at that time. 226 * The round_page() call is ment to correct errors made by 227 * binpatching! 228 */ 229 st_pool_size = m68k_round_page(st_pool_size); 230 st_pool_phys = stphysize - st_pool_size; 231 stphysize = st_pool_phys; 232 233 machineid = id; 234 esym = esym_addr; 235 236 /* 237 * the kernel ends at end() or esym. 238 */ 239 if (esym == NULL) 240 end_loaded = (vaddr_t)&end; 241 else 242 end_loaded = (vaddr_t)esym; 243 244 /* 245 * If we have enough fast-memory to put the kernel in and the 246 * RELOC_KERNEL option is set, do it! 247 */ 248 if ((reloc_kernel != 0) && (ttphysize >= end_loaded)) 249 kbase = ttphystart; 250 else 251 kbase = 0; 252 253 /* 254 * Determine the type of machine we are running on. This needs 255 * to be done early (and before initcpu())! 256 */ 257 set_machtype(); 258 259 /* 260 * Initialize CPU specific stuff 261 */ 262 initcpu(); 263 264 /* 265 * We run the kernel from ST memory at the moment. 266 * The kernel segment table is put just behind the loaded image. 267 * pstart: start of usable ST memory 268 * avail : size of ST memory available. 269 */ 270 vstart = (vaddr_t)end_loaded; 271 vstart = m68k_round_page(vstart); 272 pstart = (paddr_t)vstart; /* pre-reloc PA == kernel VA here */ 273 avail = stphysize - pstart; 274 275 /* 276 * Save KVA of proc0 user-area and allocate it 277 */ 278 proc0paddr = vstart; 279 pstart += USPACE; 280 vstart += USPACE; 281 avail -= USPACE; 282 283 /* 284 * Calculate the number of pages needed for Sysseg. 285 * For the 68030, we need 256 descriptors (segment-table-entries). 286 * This easily fits into one page. 287 * For the 68040, both the level-1 and level-2 descriptors are 288 * stored into Sysseg. We currently handle a maximum sum of MAXKL2SIZE 289 * level-1 & level-2 tables. 290 */ 291 #if defined(M68040) || defined(M68060) 292 if (mmutype == MMU_68040) 293 kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE); 294 else 295 #endif 296 kstsize = 1; 297 /* 298 * allocate the kernel segment table 299 */ 300 Sysseg_pa = pstart; /* pre-reloc PA to init STEs */ 301 Sysseg = (st_entry_t *)vstart; 302 pstart += kstsize * PAGE_SIZE; 303 vstart += kstsize * PAGE_SIZE; 304 avail -= kstsize * PAGE_SIZE; 305 306 /* 307 * allocate kernel page table map 308 */ 309 Sysptmap_pa = pstart; /* pre-reloc PA to init PTEs */ 310 Sysptmap = (pt_entry_t *)vstart; 311 pstart += PAGE_SIZE; 312 vstart += PAGE_SIZE; 313 avail -= PAGE_SIZE; 314 315 /* 316 * Determine the number of pte's we need for extra's like 317 * ST I/O map's. 318 */ 319 ptextra = btoc(STIO_SIZE); 320 321 /* 322 * If present, add pci areas 323 */ 324 if (machineid & ATARI_HADES) 325 ptextra += btoc(PCI_CONF_SIZE + PCI_IO_SIZE + PCI_MEM_SIZE); 326 if (machineid & ATARI_MILAN) 327 ptextra += btoc(PCI_IO_SIZE + PCI_MEM_SIZE); 328 ptextra += btoc(BOOTM_VA_POOL); 329 330 /* 331 * The 'pt' (the initial kernel pagetable) has to map the kernel and 332 * the I/O areas. The various I/O areas are mapped (virtually) at 333 * the top of the address space mapped by 'pt' (ie. just below Sysmap). 334 */ 335 ptpa = pstart; /* pre-reloc PA to init PTEs */ 336 ptsize = (Sysptsize + howmany(ptextra, NPTEPG)) << PGSHIFT; 337 pstart += ptsize; 338 vstart += ptsize; 339 avail -= ptsize; 340 341 /* 342 * Sysmap is now placed at the end of Supervisor virtual address space. 343 */ 344 Sysmap = (pt_entry_t *)-(NPTEPG * PAGE_SIZE); 345 346 /* 347 * Initialize segment tables 348 */ 349 #if defined(M68040) || defined(M68060) 350 if (mmutype == MMU_68040) 351 mmu040_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 352 kbase); 353 else 354 #endif /* defined(M68040) || defined(M68060) */ 355 mmu030_setup(Sysseg_pa, kstsize, ptpa, ptsize, Sysptmap_pa, 356 kbase); 357 358 /* 359 * initialize kernel page table page(s). 360 * Assume load at VA 0. 361 * - Text pages are RO 362 * - Page zero is invalid 363 */ 364 pg_proto = RELOC_PA(kbase, 0) | PG_RO | PG_V; 365 pg = (pt_entry_t *)ptpa; 366 *pg++ = PG_NV; 367 368 pg_proto += PAGE_SIZE; 369 for (kva = PAGE_SIZE; kva < (vaddr_t)etext; kva += PAGE_SIZE) { 370 *pg++ = pg_proto; 371 pg_proto += PAGE_SIZE; 372 } 373 374 /* 375 * data, bss and dynamic tables are read/write 376 */ 377 pg_proto = (pg_proto & PG_FRAME) | PG_RW | PG_V; 378 379 #if defined(M68040) || defined(M68060) 380 /* 381 * Map the kernel segment table cache invalidated for 382 * these machines (for the 68040 not strictly necessary, but 383 * recommended by Motorola; for the 68060 mandatory) 384 */ 385 if (mmutype == MMU_68040) { 386 387 if (kernel_copyback) 388 pg_proto |= PG_CCB; 389 390 for (; kva < (vaddr_t)Sysseg; kva += PAGE_SIZE) { 391 *pg++ = pg_proto; 392 pg_proto += PAGE_SIZE; 393 } 394 395 pg_proto = (pg_proto & ~PG_CCB) | PG_CI; 396 for (; kva < (vaddr_t)Sysptmap; kva += PAGE_SIZE) { 397 *pg++ = pg_proto; 398 pg_proto += PAGE_SIZE; 399 } 400 401 pg_proto = (pg_proto & ~PG_CI); 402 if (kernel_copyback) 403 pg_proto |= PG_CCB; 404 } 405 #endif /* defined(M68040) || defined(M68060) */ 406 407 /* 408 * go till end of data allocated so far 409 * plus proc0 u-area (to be allocated) 410 */ 411 for (; kva < vstart; kva += PAGE_SIZE) { 412 *pg++ = pg_proto; 413 pg_proto += PAGE_SIZE; 414 } 415 416 /* 417 * invalidate remainder of kernel PT 418 */ 419 epg = (pt_entry_t *)ptpa; 420 epg = &epg[ptsize / sizeof(pt_entry_t)]; 421 while (pg < epg) 422 *pg++ = PG_NV; 423 424 /* 425 * Map various I/O areas 426 */ 427 map_io_areas(ptpa, ptsize, ptextra); 428 429 /* 430 * Map the allocated space in ST-ram now. In the contig-case, there 431 * is no need to make a distinction between virtual and physical 432 * addresses. But I make it anyway to be prepared. 433 * Physcal space is already reserved! 434 */ 435 st_pool_virt = vstart; 436 pg = (pt_entry_t *)ptpa; 437 pg = &pg[vstart / PAGE_SIZE]; 438 pg_proto = st_pool_phys | PG_RW | PG_CI | PG_V; 439 vstart += st_pool_size; 440 while (pg_proto < (st_pool_phys + st_pool_size)) { 441 *pg++ = pg_proto; 442 pg_proto += PAGE_SIZE; 443 } 444 445 /* 446 * Map physical page_zero and page-zero+1 (First ST-ram page). We need 447 * to reference it in the reboot code. Two pages are mapped, because 448 * we must make sure 'doboot()' is contained in it (see the tricky 449 * copying there....). 450 */ 451 page_zero = vstart; 452 pg = (pt_entry_t *)ptpa; 453 pg = &pg[vstart / PAGE_SIZE]; 454 *pg++ = PG_RW | PG_CI | PG_V; 455 vstart += PAGE_SIZE; 456 *pg = PG_RW | PG_CI | PG_V | PAGE_SIZE; 457 vstart += PAGE_SIZE; 458 459 /* 460 * All necessary STEs and PTEs have been initialized. 461 * Update Sysseg_pa and Sysptmap_pa to point relocated PA. 462 */ 463 if (kbase) { 464 Sysseg_pa += kbase; 465 Sysptmap_pa += kbase; 466 } 467 468 lowram = 0 >> PGSHIFT; /* XXX */ 469 470 /* 471 * Fill in usable segments. The page indexes will be initialized 472 * later when all reservations are made. 473 */ 474 usable_segs[0].start = 0; 475 usable_segs[0].end = stphysize; 476 usable_segs[0].free_list = VM_FREELIST_STRAM; 477 usable_segs[1].start = ttphystart; 478 usable_segs[1].end = ttphystart + ttphysize; 479 usable_segs[1].free_list = VM_FREELIST_TTRAM; 480 usable_segs[2].start = usable_segs[2].end = 0; /* End of segments! */ 481 482 if (kbase) { 483 /* 484 * First page of ST-ram is unusable, reserve the space 485 * for the kernel in the TT-ram segment. 486 * Note: Because physical page-zero is partially mapped to ROM 487 * by hardware, it is unusable. 488 */ 489 usable_segs[0].start = PAGE_SIZE; 490 usable_segs[1].start += pstart; 491 } else 492 usable_segs[0].start += pstart; 493 494 /* 495 * As all segment sizes are now valid, calculate page indexes and 496 * available physical memory. 497 */ 498 usable_segs[0].first_page = 0; 499 for (i = 1; usable_segs[i].start; i++) { 500 usable_segs[i].first_page = usable_segs[i-1].first_page; 501 usable_segs[i].first_page += 502 (usable_segs[i-1].end - usable_segs[i-1].start) / PAGE_SIZE; 503 } 504 for (i = 0, physmem = 0; usable_segs[i].start; i++) 505 physmem += usable_segs[i].end - usable_segs[i].start; 506 physmem >>= PGSHIFT; 507 508 /* 509 * get the pmap module in sync with reality. 510 */ 511 pmap_bootstrap(vstart, Sysseg_pa); 512 513 /* 514 * Prepare to enable the MMU. 515 * Setup and load SRP nolimit, share global, 4 byte PTE's 516 */ 517 protorp[0] = 0x80000202; 518 protorp[1] = Sysseg_pa; /* + segtable address */ 519 520 cpu_init_kcorehdr(kbase, Sysseg_pa); 521 522 /* 523 * copy over the kernel (and all now initialized variables) 524 * to fastram. DONT use bcopy(), this beast is much larger 525 * than 128k ! 526 */ 527 if (kbase) { 528 register paddr_t *lp, *le, *fp; 529 530 lp = (paddr_t *)0; 531 le = (paddr_t *)pstart; 532 fp = (paddr_t *)kbase; 533 while(lp < le) 534 *fp++ = *lp++; 535 } 536 #if defined(M68040) || defined(M68060) 537 if (mmutype == MMU_68040) { 538 /* 539 * movel Sysseg_pa,a0; 540 * movec a0,SRP; 541 * pflusha; 542 * movel #$0xc000,d0; 543 * movec d0,TC 544 */ 545 if (cputype == CPU_68060) { 546 /* XXX: Need the branch cache be cleared? */ 547 __asm volatile (".word 0x4e7a,0x0002;" 548 "orl #0x400000,%%d0;" 549 ".word 0x4e7b,0x0002" : : : "d0"); 550 } 551 __asm volatile ("movel %0,%%a0;" 552 ".word 0x4e7b,0x8807" : : "a" (Sysseg_pa) : "a0"); 553 __asm volatile (".word 0xf518" : : ); 554 __asm volatile ("movel #0xc000,%%d0;" 555 ".word 0x4e7b,0x0003" : : : "d0" ); 556 } else 557 #endif 558 { 559 __asm volatile ("pmove %0@,%%srp" : : "a" (&protorp[0])); 560 /* 561 * setup and load TC register. 562 * enable_cpr, enable_srp, pagesize=8k, 563 * A = 8 bits, B = 11 bits 564 */ 565 tc = 0x82d08b00; 566 __asm volatile ("pmove %0@,%%tc" : : "a" (&tc)); 567 } 568 569 /* Is this to fool the optimizer?? */ 570 i = *(int *)proc0paddr; 571 *(volatile int *)proc0paddr = i; 572 573 /* 574 * Initialize the "u-area" pages. 575 * Must initialize p_addr before autoconfig or the 576 * fault handler will get a NULL reference. 577 */ 578 memset((u_char *)proc0paddr, 0, USPACE); 579 lwp0.l_addr = (struct user *)proc0paddr; 580 curlwp = &lwp0; 581 curpcb = &((struct user *)proc0paddr)->u_pcb; 582 583 /* 584 * Get the hardware into a defined state 585 */ 586 atari_hwinit(); 587 588 /* 589 * Initialize stmem allocator 590 */ 591 init_stmem(); 592 593 /* 594 * Initialize the I/O mem extent map. 595 * Note: we don't have to check the return value since 596 * creation of a fixed extent map will never fail (since 597 * descriptor storage has already been allocated). 598 * 599 * N.B. The iomem extent manages _all_ physical addresses 600 * on the machine. When the amount of RAM is found, all 601 * extents of RAM are allocated from the map. 602 */ 603 iomem_ex = extent_create("iomem", 0x0, 0xffffffff, M_DEVBUF, 604 (void *)iomem_ex_storage, sizeof(iomem_ex_storage), 605 EX_NOCOALESCE|EX_NOWAIT); 606 607 /* 608 * Allocate the physical RAM from the extent map 609 */ 610 for (i = 0; boot_segs[i].end != 0; i++) { 611 if (extent_alloc_region(iomem_ex, boot_segs[i].start, 612 boot_segs[i].end - boot_segs[i].start, EX_NOWAIT)) { 613 /* XXX: Ahum, should not happen ;-) */ 614 printf("Warning: Cannot allocate boot memory from" 615 " extent map!?\n"); 616 } 617 } 618 619 /* 620 * Initialize interrupt mapping. 621 */ 622 intr_init(); 623 } 624 625 /* 626 * Try to figure out on what type of machine we are running 627 * Note: This module runs *before* the io-mapping is setup! 628 */ 629 static void 630 set_machtype(void) 631 { 632 633 #ifdef _MILANHW_ 634 machineid |= ATARI_MILAN; 635 636 #else 637 stio_addr = 0xff8000; /* XXX: For TT & Falcon only */ 638 if (badbaddr((void *)__UNVOLATILE(&MFP2->mf_gpip), sizeof(char))) { 639 /* 640 * Watch out! We can also have a Hades with < 16Mb 641 * RAM here... 642 */ 643 if (!badbaddr((void *)__UNVOLATILE(&MFP->mf_gpip), 644 sizeof(char))) { 645 machineid |= ATARI_FALCON; 646 return; 647 } 648 } 649 if (!badbaddr((void *)(PCI_CONFB_PHYS + PCI_CONFM_PHYS), sizeof(char))) 650 machineid |= ATARI_HADES; 651 else 652 machineid |= ATARI_TT; 653 #endif /* _MILANHW_ */ 654 } 655 656 static void 657 atari_hwinit(void) 658 { 659 660 #if defined(_ATARIHW_) 661 /* 662 * Initialize the sound chip 663 */ 664 ym2149_init(); 665 666 /* 667 * Make sure that the midi acia will not generate an interrupt 668 * unless something attaches to it. We cannot do this for the 669 * keyboard acia because this breaks the '-d' option of the 670 * booter... 671 */ 672 MDI->ac_cs = 0; 673 #endif /* defined(_ATARIHW_) */ 674 675 /* 676 * Initialize both MFP chips (if both present!) to generate 677 * auto-vectored interrupts with EOI. The active-edge registers are 678 * set up. The interrupt enable registers are set to disable all 679 * interrupts. 680 */ 681 MFP->mf_iera = MFP->mf_ierb = 0; 682 MFP->mf_imra = MFP->mf_imrb = 0; 683 MFP->mf_aer = MFP->mf_ddr = 0; 684 MFP->mf_vr = 0x40; 685 686 #if defined(_ATARIHW_) 687 if (machineid & (ATARI_TT|ATARI_HADES)) { 688 MFP2->mf_iera = MFP2->mf_ierb = 0; 689 MFP2->mf_imra = MFP2->mf_imrb = 0; 690 MFP2->mf_aer = 0x80; 691 MFP2->mf_vr = 0x50; 692 } 693 694 if (machineid & ATARI_TT) { 695 /* 696 * Initialize the SCU, to enable interrupts on the SCC (ipl5), 697 * MFP (ipl6) and softints (ipl1). 698 */ 699 SCU->sys_mask = SCU_SYS_SOFT; 700 SCU->vme_mask = SCU_MFP | SCU_SCC; 701 #ifdef DDB 702 /* 703 * This allows people with the correct hardware modification 704 * to drop into the debugger from an NMI. 705 */ 706 SCU->sys_mask |= SCU_IRQ7; 707 #endif 708 } 709 #endif /* defined(_ATARIHW_) */ 710 711 /* 712 * Initialize a timer for delay(9). 713 */ 714 init_delay(); 715 716 #if NPCI > 0 717 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 718 /* 719 * Configure PCI-bus 720 */ 721 init_pci_bus(); 722 } 723 #endif 724 725 } 726 727 /* 728 * Do the dull work of mapping the various I/O areas. They MUST be Cache 729 * inhibited! 730 * All I/O areas are virtually mapped at the end of the pt-table. 731 */ 732 static void 733 map_io_areas(paddr_t ptpa, psize_t ptsize, u_int ptextra) 734 /* ptsize: Size of 'pt' in bytes */ 735 /* ptextra: #of additional I/O pte's */ 736 { 737 extern void bootm_init(vaddr_t, pt_entry_t *, u_long); 738 vaddr_t ioaddr; 739 pt_entry_t *pt, *pg, *epg; 740 pt_entry_t pg_proto; 741 u_long mask; 742 743 pt = (pt_entry_t *)ptpa; 744 ioaddr = ((ptsize / sizeof(pt_entry_t)) - ptextra) * PAGE_SIZE; 745 746 /* 747 * Map ST-IO area 748 */ 749 stio_addr = ioaddr; 750 ioaddr += STIO_SIZE; 751 pg = &pt[stio_addr / PAGE_SIZE]; 752 epg = &pg[btoc(STIO_SIZE)]; 753 #ifdef _MILANHW_ 754 /* 755 * Turn on byte swaps in the ST I/O area. On the Milan, the 756 * U0 signal of the MMU controls the BigEndian signal 757 * of the PLX9080. We use this setting so we can read/write the 758 * PLX registers (and PCI-config space) in big-endian mode. 759 */ 760 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V | 0x100; 761 #else 762 pg_proto = STIO_PHYS | PG_RW | PG_CI | PG_V; 763 #endif 764 while(pg < epg) { 765 *pg++ = pg_proto; 766 pg_proto += PAGE_SIZE; 767 } 768 769 /* 770 * Map PCI areas 771 */ 772 if (machineid & ATARI_HADES) { 773 /* 774 * Only Hades maps the PCI-config space! 775 */ 776 pci_conf_addr = ioaddr; 777 ioaddr += PCI_CONF_SIZE; 778 pg = &pt[pci_conf_addr / PAGE_SIZE]; 779 epg = &pg[btoc(PCI_CONF_SIZE)]; 780 mask = PCI_CONFM_PHYS; 781 pg_proto = PCI_CONFB_PHYS | PG_RW | PG_CI | PG_V; 782 for (; pg < epg; mask <<= 1) 783 *pg++ = pg_proto | mask; 784 } else 785 pci_conf_addr = 0; /* XXX: should crash */ 786 787 if (machineid & (ATARI_HADES|ATARI_MILAN)) { 788 pci_io_addr = ioaddr; 789 ioaddr += PCI_IO_SIZE; 790 pg = &pt[pci_io_addr / PAGE_SIZE]; 791 epg = &pg[btoc(PCI_IO_SIZE)]; 792 pg_proto = PCI_IO_PHYS | PG_RW | PG_CI | PG_V; 793 while (pg < epg) { 794 *pg++ = pg_proto; 795 pg_proto += PAGE_SIZE; 796 } 797 798 pci_mem_addr = ioaddr; 799 /* Provide an uncached PCI address for the MILAN */ 800 pci_mem_uncached = ioaddr; 801 ioaddr += PCI_MEM_SIZE; 802 epg = &pg[btoc(PCI_MEM_SIZE)]; 803 pg_proto = PCI_VGA_PHYS | PG_RW | PG_CI | PG_V; 804 while (pg < epg) { 805 *pg++ = pg_proto; 806 pg_proto += PAGE_SIZE; 807 } 808 } 809 810 bootm_init(ioaddr, pg, BOOTM_VA_POOL); 811 /* 812 * ioaddr += BOOTM_VA_POOL; 813 * pg = &pg[btoc(BOOTM_VA_POOL)]; 814 */ 815 } 816 817 /* 818 * Used by dumpconf() to get the size of the machine-dependent panic-dump 819 * header in disk blocks. 820 */ 821 822 #define CHDRSIZE (ALIGN(sizeof(kcore_seg_t)) + ALIGN(sizeof(cpu_kcore_hdr_t))) 823 #define MDHDRSIZE roundup(CHDRSIZE, dbtob(1)) 824 825 int 826 cpu_dumpsize(void) 827 { 828 829 return btodb(MDHDRSIZE); 830 } 831 832 /* 833 * Called by dumpsys() to dump the machine-dependent header. 834 * XXX: Assumes that it will all fit in one diskblock. 835 */ 836 int 837 cpu_dump(int (*dump)(dev_t, daddr_t, void *, size_t), daddr_t *p_blkno) 838 { 839 int buf[MDHDRSIZE/sizeof(int)]; 840 int error; 841 kcore_seg_t *kseg_p; 842 cpu_kcore_hdr_t *chdr_p; 843 844 kseg_p = (kcore_seg_t *)buf; 845 chdr_p = (cpu_kcore_hdr_t *)&buf[ALIGN(sizeof(*kseg_p)) / sizeof(int)]; 846 847 /* 848 * Generate a segment header 849 */ 850 CORE_SETMAGIC(*kseg_p, KCORE_MAGIC, MID_MACHINE, CORE_CPU); 851 kseg_p->c_size = MDHDRSIZE - ALIGN(sizeof(*kseg_p)); 852 853 /* 854 * Add the md header 855 */ 856 *chdr_p = cpu_kcore_hdr; 857 error = dump(dumpdev, *p_blkno, (void *)buf, sizeof(buf)); 858 *p_blkno += btodb(sizeof(buf)); 859 return (error); 860 } 861 862 #if (M68K_NPHYS_RAM_SEGS < NMEM_SEGS) 863 #error "Configuration error: M68K_NPHYS_RAM_SEGS < NMEM_SEGS" 864 #endif 865 /* 866 * Initialize the cpu_kcore_header. 867 */ 868 static void 869 cpu_init_kcorehdr(paddr_t kbase, paddr_t sysseg_pa) 870 { 871 cpu_kcore_hdr_t *h = &cpu_kcore_hdr; 872 struct m68k_kcore_hdr *m = &h->un._m68k; 873 extern char end[]; 874 int i; 875 876 memset(&cpu_kcore_hdr, 0, sizeof(cpu_kcore_hdr)); 877 878 /* 879 * Initialize the `dispatcher' portion of the header. 880 */ 881 strcpy(h->name, machine); 882 h->page_size = PAGE_SIZE; 883 h->kernbase = KERNBASE; 884 885 /* 886 * Fill in information about our MMU configuration. 887 */ 888 m->mmutype = mmutype; 889 m->sg_v = SG_V; 890 m->sg_frame = SG_FRAME; 891 m->sg_ishift = SG_ISHIFT; 892 m->sg_pmask = SG_PMASK; 893 m->sg40_shift1 = SG4_SHIFT1; 894 m->sg40_mask2 = SG4_MASK2; 895 m->sg40_shift2 = SG4_SHIFT2; 896 m->sg40_mask3 = SG4_MASK3; 897 m->sg40_shift3 = SG4_SHIFT3; 898 m->sg40_addr1 = SG4_ADDR1; 899 m->sg40_addr2 = SG4_ADDR2; 900 m->pg_v = PG_V; 901 m->pg_frame = PG_FRAME; 902 903 /* 904 * Initialize pointer to kernel segment table. 905 */ 906 m->sysseg_pa = sysseg_pa; /* PA after relocation */ 907 908 /* 909 * Initialize relocation value such that: 910 * 911 * pa = (va - KERNBASE) + reloc 912 */ 913 m->reloc = kbase; 914 915 /* 916 * Define the end of the relocatable range. 917 */ 918 m->relocend = (vaddr_t)end; 919 920 for (i = 0; i < NMEM_SEGS; i++) { 921 m->ram_segs[i].start = boot_segs[i].start; 922 m->ram_segs[i].size = boot_segs[i].end - 923 boot_segs[i].start; 924 } 925 } 926 927 void 928 mmu030_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, paddr_t sysptmap_pa, paddr_t kbase) 929 /* sysseg_pa: System segment table */ 930 /* kstsize: size of 'sysseg' in pages */ 931 /* ptpa: Kernel page table */ 932 /* ptsize: size of 'pt' in bytes */ 933 /* sysptmap_pa: System page table */ 934 { 935 st_entry_t sg_proto, *sg, *esg; 936 pt_entry_t pg_proto, *pg, *epg; 937 938 /* 939 * Map the page table pages in both the HW segment table 940 * and the software Sysptmap. 941 */ 942 sg = (st_entry_t *)sysseg_pa; 943 pg = (pt_entry_t *)sysptmap_pa; 944 epg = &pg[ptsize >> PGSHIFT]; 945 sg_proto = RELOC_PA(kbase, ptpa) | SG_RW | SG_V; 946 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 947 while (pg < epg) { 948 *sg++ = sg_proto; 949 *pg++ = pg_proto; 950 sg_proto += PAGE_SIZE; 951 pg_proto += PAGE_SIZE; 952 } 953 954 /* 955 * Invalidate the remainder of the tables. 956 */ 957 esg = (st_entry_t *)sysseg_pa; 958 esg = &esg[256]; /* XXX should be TIA_SIZE */ 959 while (sg < esg) 960 *sg++ = SG_NV; 961 epg = (pt_entry_t *)sysptmap_pa; 962 epg = &epg[NPTEPG]; /* XXX should be TIB_SIZE */ 963 while (pg < epg) 964 *pg++ = PG_NV; 965 966 /* 967 * Initialize the PTE for the last one to point Sysptmap. 968 */ 969 sg = (st_entry_t *)sysseg_pa; 970 sg = &sg[256 - 1]; /* XXX should be TIA_SIZE */ 971 pg = (pt_entry_t *)sysptmap_pa; 972 pg = &pg[256 - 1]; /* XXX should be TIA_SIZE */ 973 *sg = RELOC_PA(kbase, sysptmap_pa) | SG_RW | SG_V; 974 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 975 } 976 977 #if defined(M68040) || defined(M68060) 978 void 979 mmu040_setup(paddr_t sysseg_pa, u_int kstsize, paddr_t ptpa, psize_t ptsize, paddr_t sysptmap_pa, paddr_t kbase) 980 /* sysseg_pa: System segment table */ 981 /* kstsize: size of 'sysseg' in pages */ 982 /* ptpa: Kernel page table */ 983 /* ptsize: size of 'pt' in bytes */ 984 /* sysptmap_pa: System page table */ 985 { 986 int nl1desc, nl2desc, i; 987 st_entry_t sg_proto, *sg, *esg; 988 pt_entry_t pg_proto, *pg, *epg; 989 990 /* 991 * First invalidate the entire "segment table" pages 992 * (levels 1 and 2 have the same "invalid" values). 993 */ 994 sg = (st_entry_t *)sysseg_pa; 995 esg = &sg[kstsize * NPTEPG]; 996 while (sg < esg) 997 *sg++ = SG_NV; 998 999 /* 1000 * Initialize level 2 descriptors (which immediately 1001 * follow the level 1 table). 1002 * We need: 1003 * NPTEPG / SG4_LEV3SIZE 1004 * level 2 descriptors to map each of the nptpages 1005 * pages of PTEs. Note that we set the "used" bit 1006 * now to save the HW the expense of doing it. 1007 */ 1008 nl2desc = (ptsize >> PGSHIFT) * (NPTEPG / SG4_LEV3SIZE); 1009 sg = (st_entry_t *)sysseg_pa; 1010 sg = &sg[SG4_LEV1SIZE]; 1011 esg = &sg[nl2desc]; 1012 sg_proto = RELOC_PA(kbase, ptpa) | SG_U | SG_RW | SG_V; 1013 while (sg < esg) { 1014 *sg++ = sg_proto; 1015 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1016 } 1017 1018 /* 1019 * Initialize level 1 descriptors. We need: 1020 * howmany(nl2desc, SG4_LEV2SIZE) 1021 * level 1 descriptors to map the 'nl2desc' level 2's. 1022 */ 1023 nl1desc = howmany(nl2desc, SG4_LEV2SIZE); 1024 sg = (st_entry_t *)sysseg_pa; 1025 esg = &sg[nl1desc]; 1026 sg_proto = RELOC_PA(kbase, (paddr_t)&sg[SG4_LEV1SIZE]) 1027 | SG_U | SG_RW | SG_V; 1028 while (sg < esg) { 1029 *sg++ = sg_proto; 1030 sg_proto += (SG4_LEV2SIZE * sizeof(st_entry_t)); 1031 } 1032 1033 /* Sysmap is last entry in level 1 */ 1034 sg = (st_entry_t *)sysseg_pa; 1035 sg = &sg[SG4_LEV1SIZE - 1]; 1036 *sg = sg_proto; 1037 1038 /* 1039 * Kernel segment table at end of next level 2 table 1040 */ 1041 i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE); 1042 sg = (st_entry_t *)sysseg_pa; 1043 sg = &sg[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)]; 1044 esg = &sg[NPTEPG / SG4_LEV3SIZE]; 1045 sg_proto = RELOC_PA(kbase, sysptmap_pa) | SG_U | SG_RW | SG_V; 1046 while (sg < esg) { 1047 *sg++ = sg_proto; 1048 sg_proto += (SG4_LEV3SIZE * sizeof(st_entry_t)); 1049 } 1050 1051 /* Include additional level 2 table for Sysmap in protostfree */ 1052 protostfree = (~0 << (1 + nl1desc + 1)) /* & ~(~0 << MAXKL2SIZE) */; 1053 1054 /* 1055 * Initialize Sysptmap 1056 */ 1057 pg = (pt_entry_t *)sysptmap_pa; 1058 epg = &pg[ptsize >> PGSHIFT]; 1059 pg_proto = RELOC_PA(kbase, ptpa) | PG_RW | PG_CI | PG_V; 1060 while (pg < epg) { 1061 *pg++ = pg_proto; 1062 pg_proto += PAGE_SIZE; 1063 } 1064 1065 /* 1066 * Invalidate rest of Sysptmap page. 1067 */ 1068 epg = (pt_entry_t *)sysptmap_pa; 1069 epg = &epg[NPTEPG]; /* XXX: should be TIB_SIZE */ 1070 while (pg < epg) 1071 *pg++ = PG_NV; 1072 1073 /* 1074 * Initialize the PTE for the last one to point Sysptmap. 1075 */ 1076 pg = (pt_entry_t *)sysptmap_pa; 1077 pg = &pg[256 - 1]; /* XXX: should be TIA_SIZE */ 1078 *pg = RELOC_PA(kbase, sysptmap_pa) | PG_RW | PG_CI | PG_V; 1079 } 1080 #endif /* M68040 */ 1081 1082 #if defined(M68060) 1083 int m68060_pcr_init = 0x21; /* make this patchable */ 1084 #endif 1085 1086 static void 1087 initcpu(void) 1088 { 1089 typedef void trapfun(void); 1090 1091 switch (cputype) { 1092 1093 #if defined(M68060) 1094 case CPU_68060: 1095 { 1096 extern trapfun *vectab[256]; 1097 extern trapfun buserr60, addrerr4060, fpfault; 1098 #if defined(M060SP) 1099 extern u_int8_t FP_CALL_TOP[], I_CALL_TOP[]; 1100 #else 1101 extern trapfun illinst; 1102 #endif 1103 1104 __asm volatile ("movl %0,%%d0; .word 0x4e7b,0x0808" : : 1105 "d"(m68060_pcr_init):"d0" ); 1106 1107 /* bus/addrerr vectors */ 1108 vectab[2] = buserr60; 1109 vectab[3] = addrerr4060; 1110 1111 #if defined(M060SP) 1112 /* integer support */ 1113 vectab[61] = (trapfun *)&I_CALL_TOP[128 + 0x00]; 1114 1115 /* floating point support */ 1116 /* 1117 * XXX maybe we really should run-time check for the 1118 * stack frame format here: 1119 */ 1120 vectab[11] = (trapfun *)&FP_CALL_TOP[128 + 0x30]; 1121 1122 vectab[55] = (trapfun *)&FP_CALL_TOP[128 + 0x38]; 1123 vectab[60] = (trapfun *)&FP_CALL_TOP[128 + 0x40]; 1124 1125 vectab[54] = (trapfun *)&FP_CALL_TOP[128 + 0x00]; 1126 vectab[52] = (trapfun *)&FP_CALL_TOP[128 + 0x08]; 1127 vectab[53] = (trapfun *)&FP_CALL_TOP[128 + 0x10]; 1128 vectab[51] = (trapfun *)&FP_CALL_TOP[128 + 0x18]; 1129 vectab[50] = (trapfun *)&FP_CALL_TOP[128 + 0x20]; 1130 vectab[49] = (trapfun *)&FP_CALL_TOP[128 + 0x28]; 1131 #else 1132 vectab[61] = illinst; 1133 #endif 1134 vectab[48] = fpfault; 1135 } 1136 break; 1137 #endif /* defined(M68060) */ 1138 #if defined(M68040) 1139 case CPU_68040: 1140 { 1141 extern trapfun *vectab[256]; 1142 extern trapfun buserr40, addrerr4060; 1143 1144 /* bus/addrerr vectors */ 1145 vectab[2] = buserr40; 1146 vectab[3] = addrerr4060; 1147 } 1148 break; 1149 #endif /* defined(M68040) */ 1150 #if defined(M68030) || defined(M68020) 1151 case CPU_68030: 1152 case CPU_68020: 1153 { 1154 extern trapfun *vectab[256]; 1155 extern trapfun buserr2030, addrerr2030; 1156 1157 /* bus/addrerr vectors */ 1158 vectab[2] = buserr2030; 1159 vectab[3] = addrerr2030; 1160 } 1161 break; 1162 #endif /* defined(M68030) || defined(M68020) */ 1163 } 1164 1165 DCIS(); 1166 } 1167 1168 #ifdef DEBUG 1169 void dump_segtable(u_int *); 1170 void dump_pagetable(u_int *, u_int, u_int); 1171 u_int vmtophys(u_int *, u_int); 1172 1173 void 1174 dump_segtable(u_int *stp) 1175 { 1176 u_int *s, *es; 1177 int shift, i; 1178 1179 s = stp; 1180 { 1181 es = s + (M68K_STSIZE >> 2); 1182 shift = SG_ISHIFT; 1183 } 1184 1185 /* 1186 * XXX need changes for 68040 1187 */ 1188 for (i = 0; s < es; s++, i++) 1189 if (*s & SG_V) 1190 printf("$%08x: $%08x\t", i << shift, *s & SG_FRAME); 1191 printf("\n"); 1192 } 1193 1194 void 1195 dump_pagetable(u_int *ptp, u_int i, u_int n) 1196 { 1197 u_int *p, *ep; 1198 1199 p = ptp + i; 1200 ep = p + n; 1201 for (; p < ep; p++, i++) 1202 if (*p & PG_V) 1203 printf("$%08x -> $%08x\t", i, *p & PG_FRAME); 1204 printf("\n"); 1205 } 1206 1207 u_int 1208 vmtophys(u_int *ste, u_int vm) 1209 { 1210 1211 ste = (u_int *)(*(ste + (vm >> SEGSHIFT)) & SG_FRAME); 1212 ste += (vm & SG_PMASK) >> PGSHIFT; 1213 return (*ste & -PAGE_SIZE) | (vm & (PAGE_SIZE - 1)); 1214 } 1215 1216 #endif 1217