1 /* $NetBSD: pxa2x0var.h,v 1.5 2007/02/21 22:59:39 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed for the NetBSD Project by 18 * Genetec Corporation. 19 * 4. The name of Genetec Corporation may not be used to endorse or 20 * promote products derived from this software without specific prior 21 * written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 37 #ifndef _ARM_XSCALE_PXA2X0VAR_H_ 38 #define _ARM_XSCALE_PXA2X0VAR_H_ 39 40 #include <arm/sa11x0/sa11x0_var.h> 41 42 /* PXA2X0's integrated peripheral bus. */ 43 44 typedef int (* pxa2x0_irq_handler_t)(void *); 45 46 struct pxaip_attach_args { 47 struct sa11x0_attach_args pxa_sa; 48 bus_dma_tag_t pxa_dmat; 49 int pxa_index; /* to specify device by index number */ 50 51 #define pxa_iot pxa_sa.sa_iot 52 #define pxa_addr pxa_sa.sa_addr 53 #define pxa_size pxa_sa.sa_size 54 #define pxa_intr pxa_sa.sa_intr 55 }; 56 57 58 extern struct bus_space pxa2x0_bs_tag; 59 extern struct arm32_bus_dma_tag pxa2x0_bus_dma_tag; 60 extern struct bus_space pxa2x0_a4x_bs_tag; 61 62 /* misc. */ 63 extern void pxa2x0_fcs_init(void); 64 extern void pxa2x0_freq_change(int); 65 extern void pxa2x0_turbo_mode(int); 66 extern int pxa2x0_i2c_master_tx( int, uint8_t *, int ); 67 68 /* 69 * Probe the memory controller to deterimine which SDRAM are 70 * populated, and what size of SDRAM is present in each bank. 71 * 72 * This routine should be called from a port's initarm() 73 * function, with the first parameter set to the address 74 * of the memory controller's registers. 75 */ 76 extern void pxa2x0_probe_sdram(vaddr_t, paddr_t *, psize_t *); 77 78 /* 79 * MEMCTL registers quick access functions. 80 */ 81 extern void pxa2x0_memctl_bootstrap(vaddr_t); 82 extern uint32_t pxa2x0_memctl_read(int); 83 extern void pxa2x0_memctl_write(int, uint32_t); 84 85 /* 86 * Configure one or more clock enables in the Clock Manager's 87 * CKEN register. 88 */ 89 extern void pxa2x0_clkman_bootstrap(vaddr_t); 90 extern void pxa2x0_clkman_config(u_int, bool); 91 92 #endif /* _ARM_XSCALE_PXA2X0VAR_H_ */ 93