1 /* $NetBSD: pxa2x0_intr.h,v 1.15 2018/01/24 09:04:45 skrll Exp $ */ 2 3 /* Derived from i80321_intr.h */ 4 5 /* 6 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 7 * All rights reserved. 8 * 9 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed for the NetBSD Project by 22 * Wasabi Systems, Inc. 23 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 24 * or promote products derived from this software without specific prior 25 * written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 #ifndef _PXA2X0_INTR_H_ 41 #define _PXA2X0_INTR_H_ 42 43 #define ARM_IRQ_HANDLER _C_LABEL(pxa2x0_irq_handler) 44 45 #ifndef _LOCORE 46 47 #include <arm/cpu.h> 48 #include <arm/armreg.h> 49 #include <arm/cpufunc.h> 50 #include <machine/intr.h> 51 52 #include <arm/xscale/pxa2x0reg.h> 53 54 extern vaddr_t pxaic_base; /* Shared with pxa2x0_irq.S */ 55 #define read_icu(offset) (*(volatile uint32_t *)(pxaic_base + (offset))) 56 #define write_icu(offset,value) \ 57 (*(volatile uint32_t *)(pxaic_base + (offset)) = (value)) 58 59 extern volatile int intr_mask; 60 extern int pxa2x0_imask[]; 61 62 63 /* 64 * Cotulla's integrated ICU doesn't have IRQ0..7, so 65 * we map software interrupts to bit 0..3 66 */ 67 static inline void 68 pxa2x0_setipl(int new) 69 { 70 set_curcpl(new); 71 intr_mask = pxa2x0_imask[new]; 72 write_icu(SAIPIC_MR, intr_mask); 73 } 74 75 76 static inline void 77 pxa2x0_splx(int new) 78 { 79 int psw; 80 81 psw = disable_interrupts(I32_bit); 82 pxa2x0_setipl(new); 83 restore_interrupts(psw); 84 85 #ifdef __HAVE_FAST_SOFTINTS 86 cpu_dosoftints(); 87 #endif 88 } 89 90 91 static inline int 92 pxa2x0_splraise(int ipl) 93 { 94 int old, psw; 95 96 old = curcpl(); 97 if (ipl > old) { 98 psw = disable_interrupts(I32_bit); 99 pxa2x0_setipl(ipl); 100 restore_interrupts(psw); 101 } 102 103 return old; 104 } 105 106 static inline int 107 pxa2x0_spllower(int ipl) 108 { 109 int old = curcpl(); 110 int psw = disable_interrupts(I32_bit); 111 112 pxa2x0_splx(ipl); 113 restore_interrupts(psw); 114 return old; 115 } 116 117 /* 118 * An useful function for interrupt handlers. 119 * XXX: This shouldn't be here. 120 */ 121 static inline int 122 find_first_bit(uint32_t bits) 123 { 124 /* 125 * Since CLZ is available only on ARMv5, this isn't portable 126 * to all ARM CPUs. This file is for PXA2[15]0 processor. 127 */ 128 return 31 - __builtin_clz(bits); 129 } 130 131 132 int _splraise(int); 133 int _spllower(int); 134 void splx(int); 135 136 #if !defined(EVBARM_SPL_NOINLINE) 137 138 #define splx(new) pxa2x0_splx(new) 139 #define _spllower(ipl) pxa2x0_spllower(ipl) 140 #define _splraise(ipl) pxa2x0_splraise(ipl) 141 142 #endif /* !EVBARM_SPL_NOINTR */ 143 144 /* 145 * This function *MUST* be called very early on in a port's 146 * initarm() function, before ANY spl*() functions are called. 147 * 148 * The parameter is the virtual address of the PXA2x0's Interrupt 149 * Controller registers. 150 */ 151 void pxa2x0_intr_bootstrap(vaddr_t); 152 153 void pxa2x0_irq_handler(void *); 154 void *pxa2x0_intr_establish(int irqno, int level, 155 int (*func)(void *), void *cookie); 156 void pxa2x0_intr_disestablish(void *cookie); 157 void pxa2x0_update_intr_masks(int irqno, int level); 158 159 #endif /* ! _LOCORE */ 160 161 #endif /* _PXA2X0_INTR_H_ */ 162