1 /* $NetBSD: pxa2x0.c,v 1.3 2003/06/05 13:48:26 scw Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Genetec Corporation. All rights reserved. 5 * Written by Hiroyuki Bessho for Genetec Corporation. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed for the NetBSD Project by 18 * Genetec Corporation. 19 * 4. The name of Genetec Corporation may not be used to endorse or 20 * promote products derived from this software without specific prior 21 * written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 * 36 * Autoconfiguration support for the Intel PXA2[15]0 application 37 * processor. This code is derived from arm/sa11x0/sa11x0.c 38 */ 39 40 /*- 41 * Copyright (c) 2001, The NetBSD Foundation, Inc. All rights reserved. 42 * 43 * This code is derived from software contributed to The NetBSD Foundation 44 * by IWAMOTO Toshihiro and Ichiro FUKUHARA. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by the NetBSD 57 * Foundation, Inc. and its contributors. 58 * 4. Neither the name of The NetBSD Foundation nor the names of its 59 * contributors may be used to endorse or promote products derived 60 * from this software without specific prior written permission. 61 */ 62 /*- 63 * Copyright (c) 1999 64 * Shin Takemura and PocketBSD Project. All rights reserved. 65 * 66 * Redistribution and use in source and binary forms, with or without 67 * modification, are permitted provided that the following conditions 68 * are met: 69 * 1. Redistributions of source code must retain the above copyright 70 * notice, this list of conditions and the following disclaimer. 71 * 2. Redistributions in binary form must reproduce the above copyright 72 * notice, this list of conditions and the following disclaimer in the 73 * documentation and/or other materials provided with the distribution. 74 * 3. All advertising materials mentioning features or use of this software 75 * must display the following acknowledgement: 76 * This product includes software developed by the PocketBSD project 77 * and its contributors. 78 * 4. Neither the name of the project nor the names of its contributors 79 * may be used to endorse or promote products derived from this software 80 * without specific prior written permission. 81 * 82 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 83 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 84 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 85 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 86 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 87 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 88 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 89 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 90 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 91 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 92 * SUCH DAMAGE. 93 * 94 */ 95 96 #include "pxaintc.h" 97 #include "pxagpio.h" 98 #if 0 99 #include "pxadmac.h" /* Not yet */ 100 #endif 101 102 #include "locators.h" 103 104 #include <sys/param.h> 105 #include <sys/systm.h> 106 #include <sys/device.h> 107 #include <sys/kernel.h> 108 #include <sys/reboot.h> 109 110 #include <machine/cpu.h> 111 #include <machine/bus.h> 112 113 #include <arm/cpufunc.h> 114 #include <arm/mainbus/mainbus.h> 115 #include <arm/xscale/pxa2x0reg.h> 116 #include <arm/xscale/pxa2x0var.h> 117 118 struct pxaip_softc { 119 struct device sc_dev; 120 bus_space_tag_t sc_bust; 121 bus_dma_tag_t sc_dmat; 122 bus_space_handle_t sc_bush_clk; 123 }; 124 125 /* prototypes */ 126 static int pxaip_match(struct device *, struct cfdata *, void *); 127 static void pxaip_attach(struct device *, struct device *, void *); 128 static int pxaip_search(struct device *, struct cfdata *, void *); 129 static void pxaip_attach_critical(struct pxaip_softc *); 130 static int pxaip_print(void *, const char *); 131 132 static int pxaip_measure_cpuclock(struct pxaip_softc *); 133 134 /* attach structures */ 135 CFATTACH_DECL(pxaip, sizeof(struct pxaip_softc), 136 pxaip_match, pxaip_attach, NULL, NULL); 137 138 static struct pxaip_softc *pxaip_sc; 139 140 static int 141 pxaip_match(struct device *parent, struct cfdata *match, void *aux) 142 { 143 144 return 1; 145 } 146 147 static void 148 pxaip_attach(struct device *parent, struct device *self, void *aux) 149 { 150 struct pxaip_softc *sc = (struct pxaip_softc *)self; 151 int cpuclock; 152 153 pxaip_sc = sc; 154 sc->sc_bust = &pxa2x0_bs_tag; 155 sc->sc_dmat = &pxa2x0_bus_dma_tag; 156 157 aprint_normal(": PXA2x0 Onchip Peripheral Bus\n"); 158 159 if (bus_space_map(sc->sc_bust, PXA2X0_CLKMAN_BASE, PXA2X0_CLKMAN_SIZE, 160 0, &sc->sc_bush_clk)) 161 panic("pxaip_attach: failed to map CLKMAN"); 162 163 /* 164 * Calculate clock speed 165 * This takes 2 secs at most. 166 */ 167 cpuclock = pxaip_measure_cpuclock(sc) / 1000; 168 printf("%s: CPU clock = %d.%03d MHz\n", self->dv_xname, 169 cpuclock/1000, cpuclock%1000 ); 170 171 /* 172 * Attach critical devices 173 */ 174 pxaip_attach_critical(sc); 175 176 /* 177 * Attach all other devices 178 */ 179 config_search(pxaip_search, self, sc); 180 } 181 182 static int 183 pxaip_search(struct device *parent, struct cfdata *cf, void *aux) 184 { 185 struct pxaip_softc *sc = aux; 186 struct pxaip_attach_args aa; 187 188 aa.pxa_iot = sc->sc_bust; 189 aa.pxa_dmat = sc->sc_dmat; 190 aa.pxa_addr = cf->cf_loc[PXAIPCF_ADDR]; 191 aa.pxa_size = cf->cf_loc[PXAIPCF_SIZE]; 192 aa.pxa_index = cf->cf_loc[PXAIPCF_INDEX]; 193 aa.pxa_intr = cf->cf_loc[PXAIPCF_INTR]; 194 195 if (config_match(parent, cf, &aa)) 196 config_attach(parent, cf, &aa, pxaip_print); 197 198 return 0; 199 } 200 201 static void 202 pxaip_attach_critical(struct pxaip_softc *sc) 203 { 204 struct pxaip_attach_args aa; 205 206 aa.pxa_iot = sc->sc_bust; 207 aa.pxa_dmat = sc->sc_dmat; 208 aa.pxa_addr = PXA2X0_INTCTL_BASE; 209 aa.pxa_size = PXA2X0_INTCTL_SIZE; 210 aa.pxa_intr = PXAIPCF_INTR_DEFAULT; 211 if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL) 212 panic("pxaip_attach_critical: failed to attach INTC!"); 213 214 #if NPXAGPIO > 0 215 aa.pxa_iot = sc->sc_bust; 216 aa.pxa_dmat = sc->sc_dmat; 217 aa.pxa_addr = PXA2X0_GPIO_BASE; 218 aa.pxa_size = PXA2X0_GPIO_SIZE; 219 aa.pxa_intr = PXAIPCF_INTR_DEFAULT; 220 if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL) 221 panic("pxaip_attach_critical: failed to attach GPIO!"); 222 #endif 223 224 #if NPXADMAC > 0 225 aa.pxa_iot = sc->sc_bust; 226 aa.pxa_dmat = sc->sc_dmat; 227 aa.pxa_addr = PXA2X0_DMAC_BASE; 228 aa.pxa_size = PXA2X0_DMAC_SIZE; 229 aa.pxa_intr = PXA2X0_INT_DMA; 230 if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL) 231 panic("pxaip_attach_critical: failed to attach DMAC!"); 232 #endif 233 } 234 235 static int 236 pxaip_print(void *aux, const char *name) 237 { 238 struct pxaip_attach_args *sa = (struct pxaip_attach_args*)aux; 239 240 if (sa->pxa_addr != PXAIPCF_ADDR_DEFAULT) { 241 aprint_normal(" addr 0x%lx", sa->pxa_addr); 242 if (sa->pxa_size > PXAIPCF_SIZE_DEFAULT) 243 aprint_normal("-0x%lx", sa->pxa_addr + sa->pxa_size-1); 244 } 245 if (sa->pxa_intr != PXAIPCF_INTR_DEFAULT) 246 aprint_normal(" intr %d", sa->pxa_intr); 247 248 return (UNCONF); 249 } 250 251 static inline uint32_t 252 read_clock_counter(void) 253 { 254 uint32_t x; 255 __asm __volatile("mrc p14, 0, %0, c1, c0, 0" : "=r" (x) ); 256 257 return x; 258 } 259 260 static int 261 pxaip_measure_cpuclock(struct pxaip_softc *sc) 262 { 263 uint32_t rtc0, rtc1, start, end; 264 uint32_t pmcr_save; 265 bus_space_handle_t ioh; 266 int irq; 267 268 if (bus_space_map(sc->sc_bust, PXA2X0_RTC_BASE, PXA2X0_RTC_SIZE, 0, 269 &ioh)) 270 panic("pxaip_measure_cpuclock: can't map RTC"); 271 272 irq = disable_interrupts(I32_bit|F32_bit); 273 274 __asm __volatile( "mrc p14, 0, %0, c0, c0, 0" : "=r" (pmcr_save) ); 275 /* Enable clock counter */ 276 __asm __volatile( "mcr p14, 0, %0, c0, c0, 0" : : "r" (0x0001) ); 277 278 rtc0 = bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR); 279 /* Wait for next second starts */ 280 while ((rtc1 = bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR)) == rtc0) 281 ; 282 start = read_clock_counter(); 283 while(rtc1 == bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR)) 284 ; /* Wait for 1sec */ 285 end = read_clock_counter(); 286 287 __asm __volatile( "mcr p14, 0, %0, c0, c0, 0" : : "r" (pmcr_save) ); 288 restore_interrupts(irq); 289 290 bus_space_unmap(sc->sc_bust, ioh, PXA2X0_RTC_SIZE); 291 292 return end - start; 293 } 294 295 void 296 pxa2x0_turbo_mode( int f ) 297 { 298 __asm __volatile("mcr p14, 0, %0, c6, c0, 0" : : "r" (f)); 299 } 300 301 void 302 pxa2x0_probe_sdram(vaddr_t memctl_va, paddr_t *start, paddr_t *size) 303 { 304 u_int32_t mdcnfg, dwid, dcac, drac, dnb; 305 int i; 306 307 mdcnfg = *((volatile u_int32_t *)(memctl_va + MEMCTL_MDCNFG)); 308 309 /* 310 * Scan all 4 SDRAM banks 311 */ 312 for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) { 313 start[i] = 0; 314 size[i] = 0; 315 316 switch (i) { 317 case 0: 318 case 1: 319 if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) || 320 (i == 1 && (mdcnfg & MDCNFG_DE1) == 0)) 321 continue; 322 dwid = mdcnfg >> MDCNFD_DWID01_SHIFT; 323 dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT; 324 drac = mdcnfg >> MDCNFD_DRAC01_SHIFT; 325 dnb = mdcnfg >> MDCNFD_DNB01_SHIFT; 326 break; 327 328 case 2: 329 case 3: 330 if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) || 331 (i == 3 && (mdcnfg & MDCNFG_DE3) == 0)) 332 continue; 333 dwid = mdcnfg >> MDCNFD_DWID23_SHIFT; 334 dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT; 335 drac = mdcnfg >> MDCNFD_DRAC23_SHIFT; 336 dnb = mdcnfg >> MDCNFD_DNB23_SHIFT; 337 break; 338 } 339 340 dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK)); /* 16/32 width */ 341 dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8); /* 8-11 columns */ 342 drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */ 343 dnb = 2 << (dnb & MDCNFD_DNB_MASK); /* # of banks */ 344 345 size[i] = (paddr_t)(dwid * dcac * drac * dnb); 346 start[i] = PXA2X0_SDRAM0_START + (i * PXA2X0_SDRAM_BANK_SIZE); 347 } 348 } 349 350 void 351 pxa2x0_clkman_config(u_int clk, boolean_t enable) 352 { 353 struct pxaip_softc *sc; 354 u_int32_t rv; 355 356 KDASSERT(pxaip_sc != NULL); 357 sc = pxaip_sc; 358 359 rv = bus_space_read_4(sc->sc_bust, sc->sc_bush_clk, CLKMAN_CKEN); 360 rv &= ~clk; 361 362 if (enable) 363 rv |= clk; 364 365 bus_space_write_4(sc->sc_bust, sc->sc_bush_clk, CLKMAN_CKEN, rv); 366 } 367