xref: /netbsd-src/sys/arch/arm/xscale/pxa2x0.c (revision aaf4ece63a859a04e37cf3a7229b5fab0157cc06)
1 /*	$NetBSD: pxa2x0.c,v 1.11 2005/12/24 20:06:52 perry Exp $ */
2 
3 /*
4  * Copyright (c) 2002, 2005  Genetec Corporation.  All rights reserved.
5  * Written by Hiroyuki Bessho for Genetec Corporation.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed for the NetBSD Project by
18  *	Genetec Corporation.
19  * 4. The name of Genetec Corporation may not be used to endorse or
20  *    promote products derived from this software without specific prior
21  *    written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33  * POSSIBILITY OF SUCH DAMAGE.
34  *
35  *
36  * Autoconfiguration support for the Intel PXA2[15]0 application
37  * processor. This code is derived from arm/sa11x0/sa11x0.c
38  */
39 
40 /*-
41  * Copyright (c) 2001, The NetBSD Foundation, Inc.  All rights reserved.
42  *
43  * This code is derived from software contributed to The NetBSD Foundation
44  * by IWAMOTO Toshihiro and Ichiro FUKUHARA.
45  *
46  * Redistribution and use in source and binary forms, with or without
47  * modification, are permitted provided that the following conditions
48  * are met:
49  * 1. Redistributions of source code must retain the above copyright
50  *    notice, this list of conditions and the following disclaimer.
51  * 2. Redistributions in binary form must reproduce the above copyright
52  *    notice, this list of conditions and the following disclaimer in the
53  *    documentation and/or other materials provided with the distribution.
54  * 3. All advertising materials mentioning features or use of this software
55  *    must display the following acknowledgement:
56  *      This product includes software developed by the NetBSD
57  *      Foundation, Inc. and its contributors.
58  * 4. Neither the name of The NetBSD Foundation nor the names of its
59  *    contributors may be used to endorse or promote products derived
60  *    from this software without specific prior written permission.
61  */
62 /*-
63  * Copyright (c) 1999
64  *         Shin Takemura and PocketBSD Project. All rights reserved.
65  *
66  * Redistribution and use in source and binary forms, with or without
67  * modification, are permitted provided that the following conditions
68  * are met:
69  * 1. Redistributions of source code must retain the above copyright
70  *    notice, this list of conditions and the following disclaimer.
71  * 2. Redistributions in binary form must reproduce the above copyright
72  *    notice, this list of conditions and the following disclaimer in the
73  *    documentation and/or other materials provided with the distribution.
74  * 3. All advertising materials mentioning features or use of this software
75  *    must display the following acknowledgement:
76  *	This product includes software developed by the PocketBSD project
77  *	and its contributors.
78  * 4. Neither the name of the project nor the names of its contributors
79  *    may be used to endorse or promote products derived from this software
80  *    without specific prior written permission.
81  *
82  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
83  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
84  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
85  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
86  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
87  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
88  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
89  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
90  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
91  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
92  * SUCH DAMAGE.
93  *
94  */
95 
96 #include <sys/cdefs.h>
97 __KERNEL_RCSID(0, "$NetBSD: pxa2x0.c,v 1.11 2005/12/24 20:06:52 perry Exp $");
98 
99 #include "pxaintc.h"
100 #include "pxagpio.h"
101 #if 0
102 #include "pxadmac.h"	/* Not yet */
103 #endif
104 
105 #include "locators.h"
106 
107 #include <sys/param.h>
108 #include <sys/systm.h>
109 #include <sys/device.h>
110 #include <sys/kernel.h>
111 #include <sys/reboot.h>
112 
113 #include <machine/cpu.h>
114 #include <machine/bus.h>
115 
116 #include <arm/cpufunc.h>
117 #include <arm/mainbus/mainbus.h>
118 #include <arm/xscale/pxa2x0cpu.h>
119 #include <arm/xscale/pxa2x0reg.h>
120 #include <arm/xscale/pxa2x0var.h>
121 #include <arm/xscale/xscalereg.h>
122 
123 struct pxaip_softc {
124 	struct device sc_dev;
125 	bus_space_tag_t sc_bust;
126 	bus_dma_tag_t sc_dmat;
127 	bus_space_handle_t sc_bush_clk;
128 };
129 
130 /* prototypes */
131 static int	pxaip_match(struct device *, struct cfdata *, void *);
132 static void	pxaip_attach(struct device *, struct device *, void *);
133 static int 	pxaip_search(struct device *, struct cfdata *,
134 			     const int *, void *);
135 static void	pxaip_attach_critical(struct pxaip_softc *);
136 static int	pxaip_print(void *, const char *);
137 
138 static int	pxaip_measure_cpuclock(struct pxaip_softc *);
139 
140 #if defined(CPU_XSCALE_PXA250) && defined(CPU_XSCALE_PXA270)
141 # define SUPPORTED_CPU	"PXA250 and PXA270"
142 #elif defined(CPU_XSCALE_PXA250)
143 # define SUPPORTED_CPU	"PXA250"
144 #elif defined(CPU_XSCALE_PXA270)
145 # define SUPPORTED_CPU	"PXA270"
146 #else
147 # define SUPPORTED_CPU	"none of PXA2xx"
148 #endif
149 
150 /* attach structures */
151 CFATTACH_DECL(pxaip, sizeof(struct pxaip_softc),
152     pxaip_match, pxaip_attach, NULL, NULL);
153 
154 static struct pxaip_softc *pxaip_sc;
155 
156 static int
157 pxaip_match(struct device *parent, struct cfdata *match, void *aux)
158 {
159 
160 #if	!defined(CPU_XSCALE_PXA270)
161 	if (__CPU_IS_PXA270)
162 		goto bad_config;
163 #endif
164 
165 #if	!defined(CPU_XSCALE_PXA250)
166 	if (__CPU_IS_PXA250)
167 		goto bad_config;
168 #endif
169 
170 	return 1;
171 
172 #if	defined(CPU_XSCALE_PXA250) + defined(CPU_XSCALE_PXA270) != 2
173  bad_config:
174 	aprint_error("Kernel is configured for %s, but CPU is %s\n",
175 		     SUPPORTED_CPU, __CPU_IS_PXA270 ? "PXA270" : "PXA250");
176 	return 0;
177 #endif
178 }
179 
180 static void
181 pxaip_attach(struct device *parent, struct device *self, void *aux)
182 {
183 	struct pxaip_softc *sc = (struct pxaip_softc *)self;
184 	int cpuclock;
185 
186 	pxaip_sc = sc;
187 	sc->sc_bust = &pxa2x0_bs_tag;
188 	sc->sc_dmat = &pxa2x0_bus_dma_tag;
189 
190 	aprint_normal(": PXA2x0 Onchip Peripheral Bus\n");
191 
192 	if (bus_space_map(sc->sc_bust, PXA2X0_CLKMAN_BASE, PXA2X0_CLKMAN_SIZE,
193 	    0, &sc->sc_bush_clk))
194 		panic("pxaip_attach: failed to map CLKMAN");
195 
196 	/*
197 	 * Calculate clock speed
198 	 * This takes 2 secs at most.
199 	 */
200 	cpuclock = pxaip_measure_cpuclock(sc) / 1000;
201 	printf("%s: CPU clock = %d.%03d MHz\n", self->dv_xname,
202 	    cpuclock/1000, cpuclock%1000 );
203 
204 	aprint_normal("%s: kernel is configured for " SUPPORTED_CPU
205 		      ", cpu type is %s\n",
206 		      self->dv_xname,
207 		      __CPU_IS_PXA270 ? "PXA270" : "PXA250");
208 
209 	/*
210 	 * Attach critical devices
211 	 */
212 	pxaip_attach_critical(sc);
213 
214 	/*
215 	 * Attach all other devices
216 	 */
217 	config_search_ia(pxaip_search, self, "pxaip", sc);
218 }
219 
220 static int
221 pxaip_search(struct device *parent, struct cfdata *cf,
222 	     const int *ldesc, void *aux)
223 {
224 	struct pxaip_softc *sc = aux;
225 	struct pxaip_attach_args aa;
226 
227         aa.pxa_iot = sc->sc_bust;
228         aa.pxa_dmat = sc->sc_dmat;
229         aa.pxa_addr = cf->cf_loc[PXAIPCF_ADDR];
230         aa.pxa_size = cf->cf_loc[PXAIPCF_SIZE];
231 	aa.pxa_index = cf->cf_loc[PXAIPCF_INDEX];
232         aa.pxa_intr = cf->cf_loc[PXAIPCF_INTR];
233 
234         if (config_match(parent, cf, &aa))
235                 config_attach(parent, cf, &aa, pxaip_print);
236 
237         return 0;
238 }
239 
240 static void
241 pxaip_attach_critical(struct pxaip_softc *sc)
242 {
243 	struct pxaip_attach_args aa;
244 
245         aa.pxa_iot = sc->sc_bust;
246         aa.pxa_dmat = sc->sc_dmat;
247         aa.pxa_addr = PXA2X0_INTCTL_BASE;
248         aa.pxa_size = PXA2X0_INTCTL_SIZE;
249         aa.pxa_intr = PXAIPCF_INTR_DEFAULT;
250 	if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL)
251 		panic("pxaip_attach_critical: failed to attach INTC!");
252 
253 #if NPXAGPIO > 0
254         aa.pxa_iot = sc->sc_bust;
255         aa.pxa_dmat = sc->sc_dmat;
256         aa.pxa_addr = PXA2X0_GPIO_BASE;
257         aa.pxa_size = PXA2X0_GPIO_SIZE;
258         aa.pxa_intr = PXAIPCF_INTR_DEFAULT;
259 	if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL)
260 		panic("pxaip_attach_critical: failed to attach GPIO!");
261 #endif
262 
263 #if NPXADMAC > 0
264         aa.pxa_iot = sc->sc_bust;
265         aa.pxa_dmat = sc->sc_dmat;
266         aa.pxa_addr = PXA2X0_DMAC_BASE;
267         aa.pxa_size = PXA2X0_DMAC_SIZE;
268         aa.pxa_intr = PXA2X0_INT_DMA;
269 	if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL)
270 		panic("pxaip_attach_critical: failed to attach DMAC!");
271 #endif
272 }
273 
274 static int
275 pxaip_print(void *aux, const char *name)
276 {
277 	struct pxaip_attach_args *sa = (struct pxaip_attach_args*)aux;
278 
279 	if (sa->pxa_addr != PXAIPCF_ADDR_DEFAULT) {
280                 aprint_normal(" addr 0x%lx", sa->pxa_addr);
281 	        if (sa->pxa_size > PXAIPCF_SIZE_DEFAULT)
282 	                aprint_normal("-0x%lx", sa->pxa_addr + sa->pxa_size-1);
283 	}
284         if (sa->pxa_intr != PXAIPCF_INTR_DEFAULT)
285                 aprint_normal(" intr %d", sa->pxa_intr);
286 
287         return (UNCONF);
288 }
289 
290 static inline uint32_t
291 read_clock_counter_xsc1(void)
292 {
293   uint32_t x;
294   __asm volatile("mrc	p14, 0, %0, c1, c0, 0" : "=r" (x) );
295 
296   return x;
297 }
298 
299 static inline uint32_t
300 read_clock_counter_xsc2(void)
301 {
302   uint32_t x;
303   __asm volatile("mrc	p14, 0, %0, c1, c1, 0" : "=r" (x) );
304 
305   return x;
306 }
307 
308 static int
309 pxaip_measure_cpuclock(struct pxaip_softc *sc)
310 {
311 	uint32_t rtc0, rtc1, start, end;
312 	uint32_t pmcr_save;
313 	bus_space_handle_t ioh;
314 	int irq;
315 	int is_xsc2 = CPU_IS_PXA270;
316 #define	read_clock_counter()	(is_xsc2 ? read_clock_counter_xsc2() : \
317 					read_clock_counter_xsc1())
318 
319 	if (bus_space_map(sc->sc_bust, PXA2X0_RTC_BASE, PXA2X0_RTC_SIZE, 0,
320 	    &ioh))
321 		panic("pxaip_measure_cpuclock: can't map RTC");
322 
323 	irq = disable_interrupts(I32_bit|F32_bit);
324 
325 	if (is_xsc2) {
326 		__asm volatile(
327 			"mrc p14, 0, %0, c0, c1, 0" : "=r" (pmcr_save));
328 		/* Enable clock counter */
329 		__asm volatile(
330 			"mcr p14, 0, %0, c0, c1, 0" : : "r" (PMNC_E|PMNC_C));
331 	}
332 	else {
333 		__asm volatile(
334 			"mrc p14, 0, %0, c0, c0, 0" : "=r" (pmcr_save));
335 		/* Enable clock counter */
336 		__asm volatile(
337 			"mcr p14, 0, %0, c0, c0, 0" : : "r" (PMNC_E|PMNC_C));
338 	}
339 
340 	rtc0 = bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR);
341 	/* Wait for next second starts */
342 	while ((rtc1 = bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR)) == rtc0)
343 		;
344 	start = read_clock_counter();
345 	while(rtc1 == bus_space_read_4(sc->sc_bust, ioh, RTC_RCNR))
346 		;		/* Wait for 1sec */
347 	end = read_clock_counter();
348 
349 	if (is_xsc2)
350 		__asm volatile(
351 			"mcr p14, 0, %0, c0, c1, 0" : : "r" (pmcr_save));
352 	else
353 		__asm volatile(
354 			"mcr p14, 0, %0, c0, c0, 0" : : "r" (pmcr_save));
355 	restore_interrupts(irq);
356 
357 	bus_space_unmap(sc->sc_bust, ioh, PXA2X0_RTC_SIZE);
358 
359 	return end - start;
360 }
361 
362 void
363 pxa2x0_turbo_mode(int f)
364 {
365   __asm volatile("mcr p14, 0, %0, c6, c0, 0" : : "r" (f));
366 }
367 
368 void
369 pxa2x0_probe_sdram(vaddr_t memctl_va, paddr_t *start, paddr_t *size)
370 {
371 	u_int32_t mdcnfg, dwid, dcac, drac, dnb;
372 	int i;
373 
374 	mdcnfg = *((volatile u_int32_t *)(memctl_va + MEMCTL_MDCNFG));
375 
376 	/*
377 	 * Scan all 4 SDRAM banks
378 	 */
379 	for (i = 0; i < PXA2X0_SDRAM_BANKS; i++) {
380 		start[i] = 0;
381 		size[i] = 0;
382 
383 		switch (i) {
384 		case 0:
385 		case 1:
386 			if ((i == 0 && (mdcnfg & MDCNFG_DE0) == 0) ||
387 			    (i == 1 && (mdcnfg & MDCNFG_DE1) == 0))
388 				continue;
389 			dwid = mdcnfg >> MDCNFD_DWID01_SHIFT;
390 			dcac = mdcnfg >> MDCNFD_DCAC01_SHIFT;
391 			drac = mdcnfg >> MDCNFD_DRAC01_SHIFT;
392 			dnb = mdcnfg >> MDCNFD_DNB01_SHIFT;
393 			break;
394 
395 		case 2:
396 		case 3:
397 			if ((i == 2 && (mdcnfg & MDCNFG_DE2) == 0) ||
398 			    (i == 3 && (mdcnfg & MDCNFG_DE3) == 0))
399 				continue;
400 			dwid = mdcnfg >> MDCNFD_DWID23_SHIFT;
401 			dcac = mdcnfg >> MDCNFD_DCAC23_SHIFT;
402 			drac = mdcnfg >> MDCNFD_DRAC23_SHIFT;
403 			dnb = mdcnfg >> MDCNFD_DNB23_SHIFT;
404 			break;
405 		default:
406 			panic("pxa2x0_probe_sdram: impossible");
407 		}
408 
409 		dwid = 2 << (1 - (dwid & MDCNFD_DWID_MASK));  /* 16/32 width */
410 		dcac = 1 << ((dcac & MDCNFD_DCAC_MASK) + 8);  /* 8-11 columns */
411 		drac = 1 << ((drac & MDCNFD_DRAC_MASK) + 11); /* 11-13 rows */
412 		dnb = 2 << (dnb & MDCNFD_DNB_MASK);	      /* # of banks */
413 
414 		size[i] = (paddr_t)(dwid * dcac * drac * dnb);
415 		start[i] = PXA2X0_SDRAM0_START + (i * PXA2X0_SDRAM_BANK_SIZE);
416 	}
417 }
418 
419 void
420 pxa2x0_clkman_config(u_int clk, boolean_t enable)
421 {
422 	struct pxaip_softc *sc;
423 	u_int32_t rv;
424 
425 	KDASSERT(pxaip_sc != NULL);
426 	sc = pxaip_sc;
427 
428 	rv = bus_space_read_4(sc->sc_bust, sc->sc_bush_clk, CLKMAN_CKEN);
429 	rv &= ~clk;
430 
431 	if (enable)
432 		rv |= clk;
433 
434 	bus_space_write_4(sc->sc_bust, sc->sc_bush_clk, CLKMAN_CKEN, rv);
435 }
436