1 /* $NetBSD: ixp425_timer.c,v 1.5 2003/11/16 12:41:03 scw Exp $ */ 2 3 /* 4 * Copyright (c) 2003 5 * Ichiro FUKUHARA <ichiro@ichiro.org>. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Ichiro FUKUHARA. 19 * 4. The name of the company nor the name of the author may be used to 20 * endorse or promote products derived from this software without specific 21 * prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: ixp425_timer.c,v 1.5 2003/11/16 12:41:03 scw Exp $"); 38 39 #include "opt_perfctrs.h" 40 41 #include <sys/types.h> 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/time.h> 46 #include <sys/device.h> 47 48 #include <dev/clock_subr.h> 49 50 #include <machine/bus.h> 51 #include <machine/intr.h> 52 53 #include <arm/cpufunc.h> 54 55 #include <arm/xscale/ixp425reg.h> 56 #include <arm/xscale/ixp425var.h> 57 #include <arm/xscale/ixp425_sipvar.h> 58 59 static int ixpclk_match(struct device *, struct cfdata *, void *); 60 static void ixpclk_attach(struct device *, struct device *, void *); 61 62 static uint32_t counts_per_hz; 63 64 static void *clock_ih; 65 66 /* callback functions for intr_functions */ 67 int ixpclk_intr(void *); 68 69 struct ixpclk_softc { 70 struct device sc_dev; 71 bus_addr_t sc_baseaddr; 72 bus_space_tag_t sc_iot; 73 bus_space_handle_t sc_ioh; 74 }; 75 76 #define COUNTS_PER_SEC 66666600 /* 66MHz */ 77 #define COUNTS_PER_USEC ((COUNTS_PER_SEC / 1000000) + 1) 78 79 static struct ixpclk_softc *ixpclk_sc; 80 81 CFATTACH_DECL(ixpclk, sizeof(struct ixpclk_softc), 82 ixpclk_match, ixpclk_attach, NULL, NULL); 83 84 #define GET_TIMER_VALUE(sc) (bus_space_read_4((sc)->sc_iot, \ 85 (sc)->sc_ioh, \ 86 IXP425_OST_TIM0)) 87 88 #define GET_TS_VALUE(sc) (*(volatile u_int32_t *) \ 89 (IXP425_TIMER_VBASE + IXP425_OST_TS)) 90 91 static int 92 ixpclk_match(struct device *parent, struct cfdata *match, void *aux) 93 { 94 return 2; 95 } 96 97 static void 98 ixpclk_attach(struct device *parent, struct device *self, void *aux) 99 { 100 struct ixpclk_softc *sc = (struct ixpclk_softc*) self; 101 struct ixpsip_attach_args *sa = aux; 102 103 printf("\n"); 104 105 ixpclk_sc = sc; 106 107 sc->sc_iot = sa->sa_iot; 108 sc->sc_baseaddr = sa->sa_addr; 109 110 if (bus_space_map(sc->sc_iot, sa->sa_addr, sa->sa_size, 0, 111 &sc->sc_ioh)) 112 panic("%s: Cannot map registers", self->dv_xname); 113 114 aprint_normal("%s: IXP425 Interval Timer\n", sc->sc_dev.dv_xname); 115 } 116 117 /* 118 * cpu_initclocks: 119 * 120 * Initialize the clock and get them going. 121 */ 122 void 123 cpu_initclocks(void) 124 { 125 struct ixpclk_softc* sc = ixpclk_sc; 126 u_int oldirqstate; 127 #if defined(PERFCTRS) 128 void *pmu_ih; 129 #endif 130 131 if (hz < 50 || COUNTS_PER_SEC % hz) { 132 aprint_error("Cannot get %d Hz clock; using 100 Hz\n", hz); 133 hz = 100; 134 } 135 tick = 1000000 / hz; /* number of microseconds between interrupts */ 136 tickfix = 1000000 - (hz * tick); 137 if (tickfix) { 138 int ftp; 139 140 ftp = min(ffs(tickfix), ffs(hz)); 141 tickfix >>= (ftp - 1); 142 tickfixinterval = hz >> (ftp - 1); 143 } 144 145 /* 146 * We only have one timer available; stathz and profhz are 147 * always left as 0 (the upper-layer clock code deals with 148 * this situation). 149 */ 150 if (stathz != 0) 151 aprint_error("Cannot get %d Hz statclock\n", stathz); 152 stathz = 0; 153 154 if (profhz != 0) 155 aprint_error("Cannot get %d Hz profclock\n", profhz); 156 profhz = 0; 157 158 /* Report the clock frequency. */ 159 aprint_normal("clock: hz=%d stathz=%d profhz=%d\n", hz, stathz, profhz); 160 161 oldirqstate = disable_interrupts(I32_bit); 162 163 /* Hook up the clock interrupt handler. */ 164 clock_ih = ixp425_intr_establish(IXP425_INT_TMR0, IPL_CLOCK, 165 ixpclk_intr, NULL); 166 if (clock_ih == NULL) 167 panic("cpu_initclocks: unable to register timer interrupt"); 168 169 #if defined(PERFCTRS) 170 pmu_ih = ixp425_intr_establish(IXP425_INT_XPMU, IPL_STATCLOCK, 171 xscale_pmc_dispatch, NULL); 172 if (pmu_ih == NULL) 173 panic("cpu_initclocks: unable to register timer interrupt"); 174 #endif 175 176 /* Set up the new clock parameters. */ 177 178 /* clear interrupt */ 179 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_OST_STATUS, 180 OST_WARM_RESET | OST_WDOG_INT | OST_TS_INT | 181 OST_TIM1_INT | OST_TIM0_INT); 182 183 counts_per_hz = COUNTS_PER_SEC / hz; 184 185 /* reload value & Timer enable */ 186 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_OST_TIM0_RELOAD, 187 (counts_per_hz & TIMERRELOAD_MASK) | OST_TIMER_EN); 188 189 restore_interrupts(oldirqstate); 190 } 191 192 /* 193 * setstatclockrate: 194 * 195 * Set the rate of the statistics clock. 196 * 197 * We assume that hz is either stathz or profhz, and that neither 198 * will change after being set by cpu_initclocks(). We could 199 * recalculate the intervals here, but that would be a pain. 200 */ 201 void 202 setstatclockrate(int hz) 203 { 204 205 /* 206 * XXX Use TMR1? 207 */ 208 } 209 210 /* 211 * microtime: 212 * 213 * Fill in the specified timeval struct with the current time 214 * accurate to the microsecond. 215 */ 216 void 217 microtime(struct timeval *tvp) 218 { 219 struct ixpclk_softc* sc = ixpclk_sc; 220 static struct timeval lasttv; 221 u_int oldirqstate; 222 uint32_t counts; 223 224 oldirqstate = disable_interrupts(I32_bit); 225 226 counts = counts_per_hz - GET_TIMER_VALUE(sc); 227 228 /* Fill in the timeval struct. */ 229 *tvp = time; 230 tvp->tv_usec += (counts / COUNTS_PER_USEC); 231 232 /* Make sure microseconds doesn't overflow. */ 233 while (tvp->tv_usec >= 1000000) { 234 tvp->tv_usec -= 1000000; 235 tvp->tv_sec++; 236 } 237 238 /* Make sure the time has advanced. */ 239 if (tvp->tv_sec == lasttv.tv_sec && 240 tvp->tv_usec <= lasttv.tv_usec) { 241 tvp->tv_usec = lasttv.tv_usec + 1; 242 if (tvp->tv_usec >= 1000000) { 243 tvp->tv_usec -= 1000000; 244 tvp->tv_sec++; 245 } 246 } 247 248 lasttv = *tvp; 249 250 restore_interrupts(oldirqstate); 251 } 252 253 /* 254 * delay: 255 * 256 * Delay for at least N microseconds. 257 */ 258 void 259 delay(u_int n) 260 { 261 u_int32_t first, last; 262 int usecs; 263 264 if (n == 0) 265 return; 266 267 /* 268 * Clamp the timeout at a maximum value (about 32 seconds with 269 * a 66MHz clock). *Nobody* should be delay()ing for anywhere 270 * near that length of time and if they are, they should be hung 271 * out to dry. 272 */ 273 if (n >= (0x80000000U / COUNTS_PER_USEC)) 274 usecs = (0x80000000U / COUNTS_PER_USEC) - 1; 275 else 276 usecs = n * COUNTS_PER_USEC; 277 278 /* Note: Timestamp timer counts *up*, unlike the other timers */ 279 first = GET_TS_VALUE(); 280 281 while (usecs > 0) { 282 last = GET_TS_VALUE(); 283 usecs -= (int)(last - first); 284 first = last; 285 } 286 } 287 288 todr_chip_handle_t todr_handle; 289 290 /* 291 * todr_attach: 292 * 293 * Set the specified time-of-day register as the system real-time clock. 294 */ 295 void 296 todr_attach(todr_chip_handle_t todr) 297 { 298 299 if (todr_handle) 300 panic("todr_attach: rtc already configured"); 301 todr_handle = todr; 302 } 303 304 /* 305 * inittodr: 306 * 307 * Initialize time from the time-of-day register. 308 */ 309 #define MINYEAR 2003 /* minimum plausible year */ 310 void 311 inittodr(time_t base) 312 { 313 time_t deltat; 314 int badbase; 315 316 if (base < (MINYEAR - 1970) * SECYR) { 317 printf("WARNING: preposterous time in file system"); 318 /* read the system clock anyway */ 319 base = (MINYEAR - 1970) * SECYR; 320 badbase = 1; 321 } else 322 badbase = 0; 323 324 if (todr_handle == NULL || 325 todr_gettime(todr_handle, (struct timeval *)&time) != 0 || 326 time.tv_sec == 0) { 327 /* 328 * Believe the time in the file system for lack of 329 * anything better, resetting the TODR. 330 */ 331 time.tv_sec = base; 332 time.tv_usec = 0; 333 if (todr_handle != NULL && !badbase) { 334 printf("WARNING: preposterous clock chip time\n"); 335 resettodr(); 336 } 337 goto bad; 338 } 339 340 if (!badbase) { 341 /* 342 * See if we tained/lost two or more days; if 343 * so, assume something is amiss. 344 */ 345 deltat = time.tv_sec - base; 346 if (deltat < 0) 347 deltat = -deltat; 348 if (deltat < 2 * SECDAY) 349 return; /* all is well */ 350 printf("WARNING: clock %s %ld days\n", 351 time.tv_sec < base ? "lost" : "gained", 352 (long)deltat / SECDAY); 353 } 354 bad: 355 printf("WARNING: CHECK AND RESET THE DATE!\n"); 356 } 357 358 /* 359 * resettodr: 360 * 361 * Reset the time-of-day register with the current time. 362 */ 363 void 364 resettodr(void) 365 { 366 367 if (time.tv_sec == 0) 368 return; 369 370 if (todr_handle != NULL && 371 todr_settime(todr_handle, (struct timeval *)&time) != 0) 372 printf("resettodr: failed to set time\n"); 373 } 374 375 /* 376 * ixpclk_intr: 377 * 378 * Handle the hardclock interrupt. 379 */ 380 int 381 ixpclk_intr(void *arg) 382 { 383 struct ixpclk_softc* sc = ixpclk_sc; 384 struct clockframe *frame = arg; 385 386 bus_space_write_4(sc->sc_iot, sc->sc_ioh, IXP425_OST_STATUS, 387 OST_TIM0_INT); 388 389 hardclock(frame); 390 391 return (1); 392 } 393