1 /* $NetBSD: i80321_intr.h,v 1.3 2003/01/03 00:41:20 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _I80321_INTR_H_ 39 #define _I80321_INTR_H_ 40 41 #define ARM_IRQ_HANDLER _C_LABEL(i80321_intr_dispatch) 42 43 #ifndef _LOCORE 44 45 #include <arm/armreg.h> 46 #include <arm/cpufunc.h> 47 48 #include <arm/xscale/i80321reg.h> 49 50 void i80321_do_pending(void); 51 52 static __inline void __attribute__((__unused__)) 53 i80321_set_intrmask(void) 54 { 55 extern __volatile uint32_t intr_enabled; 56 57 __asm __volatile("mcr p6, 0, %0, c0, c0, 0" 58 : 59 : "r" (intr_enabled & ICU_INT_HWMASK)); 60 } 61 62 #define INT_SWMASK \ 63 ((1U << ICU_INT_bit26) | (1U << ICU_INT_bit22) | \ 64 (1U << ICU_INT_bit5) | (1U << ICU_INT_bit4)) 65 66 static __inline void __attribute__((__unused__)) 67 i80321_splx(int new) 68 { 69 extern __volatile uint32_t intr_enabled; 70 extern __volatile int current_spl_level; 71 extern __volatile int i80321_ipending; 72 extern void i80321_do_pending(void); 73 int oldirqstate, hwpend; 74 75 current_spl_level = new; 76 77 hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~new; 78 if (hwpend != 0) { 79 oldirqstate = disable_interrupts(I32_bit); 80 intr_enabled |= hwpend; 81 i80321_set_intrmask(); 82 restore_interrupts(oldirqstate); 83 } 84 85 if ((i80321_ipending & INT_SWMASK) & ~new) 86 i80321_do_pending(); 87 } 88 89 static __inline int __attribute__((__unused__)) 90 i80321_splraise(int ipl) 91 { 92 extern __volatile int current_spl_level; 93 extern int i80321_imask[]; 94 int old; 95 96 old = current_spl_level; 97 current_spl_level |= i80321_imask[ipl]; 98 99 return (old); 100 } 101 102 static __inline int __attribute__((__unused__)) 103 i80321_spllower(int ipl) 104 { 105 extern __volatile int current_spl_level; 106 extern int i80321_imask[]; 107 int old = current_spl_level; 108 109 i80321_splx(i80321_imask[ipl]); 110 return(old); 111 } 112 113 #if !defined(EVBARM_SPL_NOINLINE) 114 115 #define splx(new) i80321_splx(new) 116 #define _spllower(ipl) i80321_spllower(ipl) 117 #define _splraise(ipl) i80321_splraise(ipl) 118 void _setsoftintr(int); 119 120 #else 121 122 int _splraise(int); 123 int _spllower(int); 124 void splx(int); 125 void _setsoftintr(int); 126 127 #endif /* ! EVBARM_SPL_NOINLINE */ 128 129 #endif /* _LOCORE */ 130 131 #endif _I80321_INTR_H_ 132