xref: /netbsd-src/sys/arch/arm/xscale/i80321_intr.h (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: i80321_intr.h,v 1.9 2006/11/08 23:45:41 scw Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2002, 2006 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe and Steve C. Woodford for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef _I80321_INTR_H_
39 #define _I80321_INTR_H_
40 
41 #define	ARM_IRQ_HANDLER	_C_LABEL(i80321_intr_dispatch)
42 
43 #ifndef _LOCORE
44 
45 #include <arm/armreg.h>
46 #include <arm/cpufunc.h>
47 
48 #include <arm/xscale/i80321reg.h>
49 
50 void i80321_do_pending(void);
51 
52 static inline void __attribute__((__unused__))
53 i80321_set_intrmask(void)
54 {
55 	extern volatile uint32_t intr_enabled;
56 
57 	__asm volatile("mcr p6, 0, %0, c0, c0, 0"
58 		:
59 		: "r" (intr_enabled & ICU_INT_HWMASK));
60 }
61 
62 #define INT_SWMASK							\
63 	((1U << ICU_INT_bit26) | (1U << ICU_INT_bit22) |		\
64 	 (1U << ICU_INT_bit5)  | (1U << ICU_INT_bit4))
65 
66 #define INT_HPIMASK	(1u << ICU_INT_HPI)
67 
68 static inline void __attribute__((__unused__))
69 i80321_splx(int new)
70 {
71 	extern volatile uint32_t intr_enabled;
72 	extern volatile int current_spl_level;
73 	extern volatile int i80321_ipending;
74 	extern void i80321_do_pending(void);
75 	int oldirqstate, hwpend;
76 
77 	/* Don't let the compiler re-order this code with preceding code */
78 	__insn_barrier();
79 
80 	current_spl_level = new;
81 
82 	hwpend = (i80321_ipending & ICU_INT_HWMASK) & ~new;
83 	if (hwpend != 0) {
84 		oldirqstate = disable_interrupts(I32_bit);
85 		intr_enabled |= hwpend;
86 		i80321_set_intrmask();
87 #ifdef I80321_HPI_ENABLED
88 		if (__predict_false(hwpend & INT_HPIMASK))
89 			oldirqstate &= ~I32_bit;
90 #endif
91 		restore_interrupts(oldirqstate);
92 	}
93 
94 	if ((i80321_ipending & INT_SWMASK) & ~new)
95 		i80321_do_pending();
96 }
97 
98 static inline int __attribute__((__unused__))
99 i80321_splraise(int ipl)
100 {
101 	extern volatile int current_spl_level;
102 	extern int i80321_imask[];
103 	int	old;
104 
105 	old = current_spl_level;
106 	current_spl_level |= i80321_imask[ipl];
107 
108 	/* Don't let the compiler re-order this code with subsequent code */
109 	__insn_barrier();
110 
111 	return (old);
112 }
113 
114 static inline int __attribute__((__unused__))
115 i80321_spllower(int ipl)
116 {
117 	extern volatile int current_spl_level;
118 	extern int i80321_imask[];
119 	int old = current_spl_level;
120 
121 	i80321_splx(i80321_imask[ipl]);
122 	return(old);
123 }
124 
125 #if !defined(EVBARM_SPL_NOINLINE)
126 
127 #define splx(new)		i80321_splx(new)
128 #define	_spllower(ipl)		i80321_spllower(ipl)
129 #define	_splraise(ipl)		i80321_splraise(ipl)
130 void	_setsoftintr(int);
131 
132 #else
133 
134 int	_splraise(int);
135 int	_spllower(int);
136 void	splx(int);
137 void	_setsoftintr(int);
138 
139 #endif /* ! EVBARM_SPL_NOINLINE */
140 
141 #endif /* _LOCORE */
142 
143 #endif /* _I80321_INTR_H_ */
144