xref: /netbsd-src/sys/arch/arm/xscale/i80312_space.c (revision 9fbd88883c38d0c0fbfcbe66d76fe6b0fab3f9de)
1 /*	$NetBSD: i80312_space.c,v 1.2 2001/11/28 21:08:47 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2001 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * bus_space functions for i80312 Companion I/O chip.
40  */
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 
45 #include <uvm/uvm_extern.h>
46 
47 #include <machine/bus.h>
48 
49 #include <arm/xscale/i80312reg.h>
50 #include <arm/xscale/i80312var.h>
51 
52 /* Prototypes for all the bus_space structure functions */
53 bs_protos(i80312);
54 bs_protos(i80312_io);
55 bs_protos(i80312_mem);
56 bs_protos(bs_notimpl);
57 
58 /*
59  * Template bus_space -- copied, and the bits that are NULL are
60  * filled in.
61  */
62 const struct bus_space i80312_bs_tag_template = {
63 	/* cookie */
64 	(void *) 0,
65 
66 	/* mapping/unmapping */
67 	NULL,
68 	NULL,
69 	i80312_bs_subregion,
70 
71 	/* allocation/deallocation */
72 	NULL,
73 	NULL,
74 
75 	/* get kernel virtual address */
76 	i80312_bs_vaddr,
77 
78 	/* mmap */
79 	i80312_bs_mmap,
80 
81 	/* barrier */
82 	i80312_bs_barrier,
83 
84 	/* read (single) */
85 	i80312_bs_r_1,
86 	i80312_bs_r_2,
87 	i80312_bs_r_4,
88 	bs_notimpl_bs_r_8,
89 
90 	/* read multiple */
91 	i80312_bs_rm_1,
92 	i80312_bs_rm_2,
93 	i80312_bs_rm_4,
94 	bs_notimpl_bs_rm_8,
95 
96 	/* read region */
97 	bs_notimpl_bs_rr_1,
98 	i80312_bs_rr_2,
99 	i80312_bs_rr_4,
100 	bs_notimpl_bs_rr_8,
101 
102 	/* write (single) */
103 	i80312_bs_w_1,
104 	i80312_bs_w_2,
105 	i80312_bs_w_4,
106 	bs_notimpl_bs_w_8,
107 
108 	/* write multiple */
109 	i80312_bs_wm_1,
110 	i80312_bs_wm_2,
111 	i80312_bs_wm_4,
112 	bs_notimpl_bs_wm_8,
113 
114 	/* write region */
115 	bs_notimpl_bs_wr_1,
116 	i80312_bs_wr_2,
117 	i80312_bs_wr_4,
118 	bs_notimpl_bs_wr_8,
119 
120 	/* set multiple */
121 	bs_notimpl_bs_sm_1,
122 	bs_notimpl_bs_sm_2,
123 	bs_notimpl_bs_sm_4,
124 	bs_notimpl_bs_sm_8,
125 
126 	/* set region */
127 	bs_notimpl_bs_sr_1,
128 	i80312_bs_sr_2,
129 	bs_notimpl_bs_sr_4,
130 	bs_notimpl_bs_sr_8,
131 
132 	/* copy */
133 	bs_notimpl_bs_c_1,
134 	i80312_bs_c_2,
135 	bs_notimpl_bs_c_4,
136 	bs_notimpl_bs_c_8,
137 };
138 
139 void
140 i80312_bs_init(bus_space_tag_t bs, void *cookie)
141 {
142 
143 	*bs = i80312_bs_tag_template;
144 	bs->bs_cookie = cookie;
145 }
146 
147 void
148 i80312_io_bs_init(bus_space_tag_t bs, void *cookie)
149 {
150 
151 	*bs = i80312_bs_tag_template;
152 	bs->bs_cookie = cookie;
153 
154 	bs->bs_map = i80312_io_bs_map;
155 	bs->bs_unmap = i80312_io_bs_unmap;
156 	bs->bs_alloc = i80312_io_bs_alloc;
157 	bs->bs_free = i80312_io_bs_free;
158 
159 	bs->bs_vaddr = i80312_io_bs_vaddr;
160 }
161 
162 void
163 i80312_mem_bs_init(bus_space_tag_t bs, void *cookie)
164 {
165 
166 	*bs = i80312_bs_tag_template;
167 	bs->bs_cookie = cookie;
168 
169 	bs->bs_map = i80312_mem_bs_map;
170 	bs->bs_unmap = i80312_mem_bs_unmap;
171 	bs->bs_alloc = i80312_mem_bs_alloc;
172 	bs->bs_free = i80312_mem_bs_free;
173 
174 	bs->bs_mmap = i80312_mem_bs_mmap;
175 }
176 
177 /* *** Routines shared by i80312, PCI IO, and PCI MEM. *** */
178 
179 int
180 i80312_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
181     bus_size_t size, bus_space_handle_t *nbshp)
182 {
183 
184 	*nbshp = bsh + offset;
185 	return (0);
186 }
187 
188 void
189 i80312_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
190     bus_size_t len, int flags)
191 {
192 
193 	/* Nothing to do. */
194 }
195 
196 void *
197 i80312_bs_vaddr(void *t, bus_space_handle_t bsh)
198 {
199 
200 	return ((void *)bsh);
201 }
202 
203 paddr_t
204 i80312_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
205 {
206 
207 	/* Not supported. */
208 	return (-1);
209 }
210 
211 /* *** Routines for PCI IO. *** */
212 
213 int
214 i80312_io_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
215     bus_space_handle_t *bshp)
216 {
217 	struct i80312_softc *sc = t;
218 	vaddr_t winvaddr;
219 	uint32_t busbase, bussize;
220 
221 	if (bpa >= sc->sc_pioout_base &&
222 	    bpa < (sc->sc_pioout_base + sc->sc_pioout_size)) {
223 		busbase = sc->sc_pioout_base;
224 		bussize = sc->sc_pioout_size;
225 		winvaddr = sc->sc_piow_vaddr;
226 	} else if (bpa >= sc->sc_sioout_base &&
227 		   bpa < (sc->sc_sioout_base + sc->sc_sioout_size)) {
228 		busbase = sc->sc_sioout_base;
229 		bussize = sc->sc_sioout_size;
230 		winvaddr = sc->sc_siow_vaddr;
231 	} else
232 		return (EINVAL);
233 
234 	if ((bpa + size) >= (busbase + bussize))
235 		return (EINVAL);
236 
237 	/*
238 	 * Found the window -- PCI I/O space is mapped at a fixed
239 	 * virtual address by board-specific code.  Translate the
240 	 * bus address to the virtual address.
241 	 */
242 	*bshp = winvaddr + (bpa - busbase);
243 
244 	return (0);
245 }
246 
247 void
248 i80312_io_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
249 {
250 
251 	/* Nothing to do. */
252 }
253 
254 int
255 i80312_io_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
256     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
257     bus_addr_t *bpap, bus_space_handle_t *bshp)
258 {
259 
260 	panic("i80312_io_bs_alloc(): not implemented\n");
261 }
262 
263 void
264 i80312_io_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
265 {
266 
267 	panic("i80312_io_bs_free(): not implemented\n");
268 }
269 
270 void *
271 i80312_io_bs_vaddr(void *t, bus_space_handle_t bsh)
272 {
273 
274 	/* Not supported. */
275 	return (NULL);
276 }
277 
278 /* *** Routines for PCI MEM. *** */
279 
280 int
281 i80312_mem_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flags,
282     bus_space_handle_t *bshp)
283 {
284 
285 	struct i80312_softc *sc = t;
286 	vaddr_t va;
287 	uint32_t busbase, bussize;
288 	paddr_t pa, endpa, physbase;
289 
290 	if (bpa >= sc->sc_pmemout_base &&
291 	    bpa < (sc->sc_pmemout_base + sc->sc_pmemout_size)) {
292 		busbase = sc->sc_pmemout_base;
293 		bussize = sc->sc_pmemout_size;
294 		physbase = I80312_PCI_XLATE_PMW_BASE;
295 	} else if (bpa >= sc->sc_smemout_base &&
296 		   bpa < (sc->sc_smemout_base + sc->sc_smemout_size)) {
297 		busbase = sc->sc_smemout_base;
298 		bussize = sc->sc_smemout_size;
299 		physbase = I80312_PCI_XLATE_SMW_BASE;
300 	} else
301 		return (EINVAL);
302 
303 	if ((bpa + size) >= (busbase + bussize))
304 		return (EINVAL);
305 
306 	/*
307 	 * Found the window -- PCI MEM space is not mapped by allocating
308 	 * some kernel VA space and mapping the pages with pmap_enter().
309 	 * pmap_enter() will map unmanaged pages as non-cacheable.
310 	 */
311 	pa = trunc_page((bpa - busbase) + physbase);
312 	endpa = round_page(((bpa - busbase) + physbase) + size);
313 
314 	va = uvm_km_valloc(kernel_map, endpa - pa);
315 	if (va == 0)
316 		return (ENOMEM);
317 
318 	*bshp = va + (bpa & PAGE_MASK);
319 
320 	for (; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
321 		pmap_enter(pmap_kernel(), va, pa,
322 		    VM_PROT_READ | VM_PROT_WRITE, PMAP_WIRED);
323 	}
324 	pmap_update(pmap_kernel());
325 
326 	return (0);
327 }
328 
329 void
330 i80312_mem_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
331 {
332 	vaddr_t va, endva;
333 
334 	va = trunc_page(bsh);
335 	endva = round_page(bsh + size);
336 
337 	/* Free the kernel virtual mapping. */
338 	uvm_km_free(kernel_map, va, endva - va);
339 }
340 
341 int
342 i80312_mem_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
343     bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
344     bus_addr_t *bpap, bus_space_handle_t *bshp)
345 {
346 
347 	panic("i80312_mem_bs_alloc(): not implemented\n");
348 }
349 
350 void
351 i80312_mem_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
352 {
353 
354 	panic("i80312_mem_bs_free(): not implemented\n");
355 }
356 
357 paddr_t
358 i80312_mem_bs_mmap(void *t, bus_addr_t addr, off_t off, int prot, int flags)
359 {
360 
361 	/* XXX */
362 	return (-1);
363 }
364