xref: /netbsd-src/sys/arch/arm/xscale/i80312_i2c.c (revision b1c86f5f087524e68db12794ee9c3e3da1ab17a0)
1 /*	$NetBSD: i80312_i2c.c,v 1.4 2007/12/06 17:00:32 ad Exp $	*/
2 
3 /*
4  * Copyright (c) 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Intel i80321 I/O Processor I2C Controller Unit support.
40  */
41 
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: i80312_i2c.c,v 1.4 2007/12/06 17:00:32 ad Exp $");
44 
45 #include <sys/param.h>
46 #include <sys/mutex.h>
47 #include <sys/systm.h>
48 #include <sys/device.h>
49 #include <sys/kernel.h>
50 
51 #include <machine/bus.h>
52 #include <machine/intr.h>
53 
54 #include <arm/xscale/i80312var.h>
55 
56 #include <dev/i2c/i2cvar.h>
57 
58 #include <arm/xscale/iopi2cvar.h>
59 #include <arm/xscale/iopi2creg.h>
60 
61 static int
62 iic312_match(struct device *parent, struct cfdata *cf, void *aux)
63 {
64 	struct iopxs_attach_args *ia = aux;
65 
66 	if (strcmp(cf->cf_name, ia->ia_name) == 0)
67 		return (1);
68 
69 	return (0);
70 }
71 
72 static void
73 iic312_attach(struct device *parent, struct device *self, void *aux)
74 {
75 	struct iopiic_softc *sc = (void *) self;
76 	struct iopxs_attach_args *ia = aux;
77 	int error;
78 
79 	aprint_naive(": I2C controller\n");
80 	aprint_normal(": I2C controller\n");
81 
82 	sc->sc_st = ia->ia_st;
83 	if ((error = bus_space_subregion(sc->sc_st, ia->ia_sh,
84 					 ia->ia_offset, ia->ia_size,
85 					 &sc->sc_sh)) != 0) {
86 		aprint_error("%s: unable to subregion registers, error = %d\n",
87 		    sc->sc_dev.dv_xname, error);
88 		return;
89 	}
90 
91 	/* XXX Reset the I2C unit? */
92 
93 	mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
94 
95 	/* XXX We don't currently use interrupts.  Fix this some day. */
96 #if 0
97 	sc->sc_ih = i80321_intr_establish(ICU_INT_I2C, IPL_BIO,
98 					  iopiic_intr, sc);
99 	if (sc->sc_ih == NULL) {
100 		aprint_error("%s: unable to establish interrupt handler\n",
101 		    sc->sc_dev.dv_xname);
102 		return;
103 	}
104 #endif
105 
106 	/*
107 	 * Enable the I2C unit as a master running at 100.0 kHz (ICCR=0x1f4
108 	 * per p.12-8 of the i80312 developer's manual).
109 	 * No, we do not support slave mode.
110 	 */
111 	sc->sc_icr = IIC_ICR_GCD | IIC_ICR_UE | IIC_ICR_SCLE;
112 	bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, 0);
113 	bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICCR, 0x1f4);
114 	bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ISAR, 0);
115 	bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, sc->sc_icr);
116 
117 	iopiic_attach(sc);
118 }
119 
120 CFATTACH_DECL(iopiic, sizeof(struct iopiic_softc),
121     iic312_match, iic312_attach, NULL, NULL);
122