1/* $NetBSD: i80200_irq.S,v 1.10 2003/01/02 23:54:41 thorpej Exp $ */ 2 3/* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38#include "assym.h" 39#include "opt_perfctrs.h" 40 41#include <machine/asm.h> 42#include <machine/cpu.h> 43#include <machine/frame.h> 44 45#include <arm/xscale/i80200reg.h> 46 47/* 48 * irq_entry: 49 * 50 * Main entry point for the IRQ vector on i80200 CPUs. Calls 51 * board-specific external interrupt dispatch routine. 52 */ 53 54 .text 55 .align 0 56 57.Lcurrent_intr_depth: 58 .word _C_LABEL(current_intr_depth) 59 60.Lintr_dispatch: 61 .word _C_LABEL(i80200_extirq_dispatch) 62 63#if defined(PERFCTRS) 64.Lpmc_dispatch: 65 .word _C_LABEL(xscale_pmc_dispatch) 66#endif 67 68.Lastpending: 69 .word _C_LABEL(astpending) 70 71ASENTRY_NP(irq_entry) 72 sub lr, lr, #0x00000004 /* Adjust the lr */ 73 74 PUSHFRAMEINSVC /* Push an interrupt frame */ 75 76 /* 77 * Note that we have entered the IRQ handler. We are 78 * in SVC mode so we cannot use the processor mode to 79 * determine if we are in an IRQ. Instead, we will 80 * count each time the interrupt handler is nested. 81 */ 82 ldr r0, .Lcurrent_intr_depth 83 ldr r1, [r0] 84 add r1, r1, #1 85 str r1, [r0] 86 87 /* 88 * Get the interrupt status into a callee-save register. 89 */ 90 mrc p13, 0, r4, c4, c0, 0 91 92#if defined(PERFCTRS) 93 /* 94 * Check for PMU interrupts. 95 * If we have one, call the routine to handle it. 96 */ 97 tst r4, #(INTSRC_PI) 98 beq .Lpmc_intr_return 99 mov r1, r4 100 mov r0, sp 101 mov lr, pc 102 ldr pc, .Lpmc_dispatch 103.Lpmc_intr_return: 104#endif 105 106 /* 107 * XXX - any need to handle BMU interrupts? 108 */ 109 110 /* 111 * Check for external IRQs. If we have one, call the 112 * external IRQ dispatcher. The argument is a pointer 113 * to the stack frame. This function will be called with 114 * interrupts disabled, and will return with interrupts 115 * disabled. 116 */ 117 tst r4, #(INTSRC_II) 118 beq .Lextirq_return /* no external IRQ pending */ 119 ldr r1, .Lintr_dispatch 120 mov r0, sp 121 mov lr, pc 122 ldr pc, [r1] 123.Lextirq_return: 124 125 /* Decremement the nest count. */ 126 ldr r0, .Lcurrent_intr_depth 127 ldr r1, [r0] 128 sub r1, r1, #1 129 str r1, [r0] 130 131 /* 132 * If we're returning to user mode, check for pending ASTs. 133 */ 134 ldr r0, [sp] /* Get the SPSR from stack */ 135 and r0, r0, #(PSR_MODE) /* Test for USR32 mode before the IRQ */ 136 teq r0, #(PSR_USR32_MODE) 137 bne .Lirqout /* Nope, get out now */ 138 139.Lastloop: 140 ldr r0, .Lastpending /* Do we have an AST pending? */ 141 ldr r1, [r0] 142 teq r1, #0x00000000 143 beq .Lirqout /* Nope, get out now */ 144 145 mov r1, #0x00000000 146 str r1, [r0] /* Clear astpending */ 147 148 mrs r4, cpsr /* save CPSR */ 149 bic r0, r4, #(I32_bit) /* Enable IRQs */ 150 msr cpsr_c, r0 151 152 mov r0, sp 153 bl _C_LABEL(ast) /* ast(frame) */ 154 155 msr cpsr_c, r4 /* Disable IRQs */ 156 b .Lastloop /* Check for more ASTs */ 157 158.Lirqout: 159 PULLFRAMEFROMSVCANDEXIT 160 movs pc, lr /* Exit */ 161 162 .bss 163 .align 0 164 165 .global _C_LABEL(astpending) 166_C_LABEL(astpending): 167 .word 0 168 169 .global _C_LABEL(current_intr_depth) 170_C_LABEL(current_intr_depth): 171 .word 0 172 173 /* 174 * XXX Provide intrnames/intrcnt for legacy code, but 175 * don't actually use them. 176 */ 177 178 .global _C_LABEL(intrnames), _C_LABEL(eintrnames) 179 .global _C_LABEL(intrcnt), _C_LABEL(eintrcnt) 180_C_LABEL(intrnames): 181_C_LABEL(eintrnames): 182 183 .global _C_LABEL(intrcnt), _C_LABEL(sintrcnt), _C_LABEL(eintrcnt) 184_C_LABEL(intrcnt): 185_C_LABEL(eintrcnt): 186