1 /* $NetBSD: becc_pci.c,v 1.21 2020/07/07 03:38:46 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * PCI configuration support for the ADI Engineering Big Endian Companion 40 * Chip. 41 */ 42 43 #include <sys/cdefs.h> 44 __KERNEL_RCSID(0, "$NetBSD: becc_pci.c,v 1.21 2020/07/07 03:38:46 thorpej Exp $"); 45 46 #include "opt_pci.h" 47 #include "pci.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/malloc.h> 53 #include <sys/bus.h> 54 55 #include <uvm/uvm_extern.h> 56 57 #include <dev/pci/ppbreg.h> 58 #include <dev/pci/pcivar.h> 59 #include <dev/pci/pciconf.h> 60 61 #include <arm/locore.h> 62 63 #include <arm/xscale/beccreg.h> 64 #include <arm/xscale/beccvar.h> 65 66 void becc_pci_attach_hook(device_t, device_t, 67 struct pcibus_attach_args *); 68 int becc_pci_bus_maxdevs(void *, int); 69 pcitag_t becc_pci_make_tag(void *, int, int, int); 70 void becc_pci_decompose_tag(void *, pcitag_t, int *, int *, 71 int *); 72 pcireg_t becc_pci_conf_read(void *, pcitag_t, int); 73 void becc_pci_conf_write(void *, pcitag_t, int, pcireg_t); 74 void becc_pci_conf_interrupt(void *, int, int, int, int, int *); 75 76 int becc_pci_intr_map(const struct pci_attach_args *, 77 pci_intr_handle_t *); 78 const char *becc_pci_intr_string(void *, pci_intr_handle_t, 79 char *, size_t); 80 const struct evcnt *becc_pci_intr_evcnt(void *, pci_intr_handle_t); 81 void *becc_pci_intr_establish(void *, pci_intr_handle_t, 82 int, int (*)(void *), void *, const char *); 83 void becc_pci_intr_disestablish(void *, void *); 84 85 #define PCI_CONF_LOCK(s) (s) = disable_interrupts(I32_bit) 86 #define PCI_CONF_UNLOCK(s) restore_interrupts((s)) 87 88 #if 0 89 #define DPRINTF(x) printf(x) 90 #else 91 #define DPRINTF(x) 92 #endif 93 94 void 95 becc_pci_init(pci_chipset_tag_t pc, void *cookie) 96 { 97 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) 98 struct becc_softc *sc = cookie; 99 struct pciconf_resources *pcires; 100 #endif 101 102 pc->pc_conf_v = cookie; 103 pc->pc_attach_hook = becc_pci_attach_hook; 104 pc->pc_bus_maxdevs = becc_pci_bus_maxdevs; 105 pc->pc_make_tag = becc_pci_make_tag; 106 pc->pc_decompose_tag = becc_pci_decompose_tag; 107 pc->pc_conf_read = becc_pci_conf_read; 108 pc->pc_conf_write = becc_pci_conf_write; 109 pc->pc_conf_interrupt = becc_pci_conf_interrupt; 110 111 pc->pc_intr_v = cookie; 112 pc->pc_intr_map = becc_pci_intr_map; 113 pc->pc_intr_string = becc_pci_intr_string; 114 pc->pc_intr_evcnt = becc_pci_intr_evcnt; 115 pc->pc_intr_establish = becc_pci_intr_establish; 116 pc->pc_intr_disestablish = becc_pci_intr_disestablish; 117 118 #if NPCI > 0 && defined(PCI_NETBSD_CONFIGURE) 119 /* 120 * Configure the PCI bus. 121 * 122 * XXX We need to revisit this. We only configure the Secondary 123 * bus (and its children). The bus configure code needs changes 124 * to support how the busses are arranged on this chip. We also 125 * need to only configure devices in the private device space on 126 * the Secondary bus. 127 */ 128 129 pcires = pciconf_resource_init(); 130 131 /* Reserve the bottom 32K of the PCI address space. */ 132 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO, 133 sc->sc_ioout_xlate + (32 * 1024), (32 * 1024)); 134 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM, 135 sc->sc_owin_xlate[0], BECC_PCI_MEM1_SIZE); 136 137 aprint_normal("%s: configuring PCI bus\n", device_xname(sc->sc_dev)); 138 pci_configure_bus(pc, pcires, 0, arm_dcache_align); 139 140 pciconf_resource_fini(pcires); 141 #endif 142 } 143 144 void 145 becc_pci_conf_interrupt(void *v, int a, int b, int c, int d, int *p) 146 { 147 } 148 149 void 150 becc_pci_attach_hook(device_t parent, device_t self, 151 struct pcibus_attach_args *pba) 152 { 153 154 /* Nothing to do. */ 155 } 156 157 int 158 becc_pci_bus_maxdevs(void *v, int busno) 159 { 160 161 return (32); 162 } 163 164 pcitag_t 165 becc_pci_make_tag(void *v, int b, int d, int f) 166 { 167 168 return ((b << 16) | (d << 11) | (f << 8)); 169 } 170 171 void 172 becc_pci_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp) 173 { 174 175 if (bp != NULL) 176 *bp = (tag >> 16) & 0xff; 177 if (dp != NULL) 178 *dp = (tag >> 11) & 0x1f; 179 if (fp != NULL) 180 *fp = (tag >> 8) & 0x7; 181 } 182 183 struct pciconf_state { 184 uint32_t ps_offset; 185 186 int ps_b, ps_d, ps_f; 187 int ps_type; 188 }; 189 190 static int 191 becc_pci_conf_setup(struct becc_softc *sc, pcitag_t tag, int offset, 192 struct pciconf_state *ps) 193 { 194 195 if ((unsigned int)offset >= PCI_CONF_SIZE) 196 return (1); 197 198 becc_pci_decompose_tag(sc, tag, &ps->ps_b, &ps->ps_d, &ps->ps_f); 199 200 /* 201 * If the bus # is the same as our own, then use Type 0 cycles, 202 * else use Type 1. 203 */ 204 if (ps->ps_b == 0) { 205 /* XXX This is a platform-specific parameter. */ 206 if (ps->ps_d > (14 - BECC_IDSEL_BIT)) 207 return (1); 208 ps->ps_offset = (1U << (ps->ps_d + BECC_IDSEL_BIT)) | 209 (ps->ps_f << 8) | offset; 210 ps->ps_type = 0; 211 } else { 212 /* The tag is already in the correct format. */ 213 ps->ps_offset = tag | offset | 1; 214 ps->ps_type = 1; 215 } 216 217 return (0); 218 } 219 220 static int becc_pci_conf_cleanup(struct becc_softc *sc); 221 static int 222 becc_pci_conf_cleanup(struct becc_softc *sc) 223 { 224 uint32_t reg; 225 int err=0; 226 227 BECC_CSR_WRITE(BECC_POCR, 0); 228 229 reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG); 230 if (reg & 0xf9000000) { 231 DPRINTF((" ** pci status error: %08x (%08x) **\n", 232 reg, reg & 0xf9000000)); 233 234 err = 1; 235 becc_pcicore_write(sc, PCI_COMMAND_STATUS_REG, 236 reg & 0xf900ffff); 237 reg = becc_pcicore_read(sc, PCI_COMMAND_STATUS_REG); 238 239 DPRINTF((" ** pci status after clearing: %08x (%08x) **\n", 240 reg, reg & 0xf9000000)); 241 } 242 reg = BECC_CSR_READ(BECC_PMISR); 243 if (reg & 0x000f000d) { 244 DPRINTF((" ** pci master isr: %08x (%08x) **\n", 245 reg, reg & 0x000f000d)); 246 247 err = 1; 248 BECC_CSR_WRITE(BECC_PMISR, reg & 0x000f000d); 249 reg = BECC_CSR_READ(BECC_PMISR); 250 251 DPRINTF((" ** pci master isr after clearing: %08x (%08x) **\n", 252 reg, reg & 0x000f000d)); 253 } 254 reg = BECC_CSR_READ(BECC_PSISR); 255 if (reg & 0x000f0210) { 256 DPRINTF((" ** pci slave isr: %08x (%08x) **\n", 257 reg, reg & 0x000f0210)); 258 259 err = 1; 260 BECC_CSR_WRITE(BECC_PSISR, reg & 0x000f0210); 261 reg = BECC_CSR_READ(BECC_PSISR); 262 263 DPRINTF((" ** pci slave isr after clearing: %08x (%08x) **\n", 264 reg, reg & 0x000f0210)); 265 } 266 267 return err; 268 } 269 270 pcireg_t 271 becc_pci_conf_read(void *v, pcitag_t tag, int offset) 272 { 273 struct becc_softc *sc = v; 274 struct pciconf_state ps; 275 vaddr_t va; 276 pcireg_t rv; 277 u_int s; 278 279 if (becc_pci_conf_setup(sc, tag, offset, &ps)) 280 return ((pcireg_t) -1); 281 282 /* 283 * Skip device 0 (the BECC itself). We don't want it 284 * to appear as part of the PCI device space. 285 */ 286 if (ps.ps_b == 0 && ps.ps_d == 0) 287 return ((pcireg_t) -1); 288 289 PCI_CONF_LOCK(s); 290 291 va = sc->sc_pci_cfg_base + ps.ps_offset; 292 BECC_CSR_WRITE(BECC_POCR, ps.ps_type); 293 294 if (badaddr_read((void *) va, sizeof(rv), &rv)) { 295 /* XXX Check master/target abort? */ 296 #if 0 297 printf("conf_read: %d/%d/%d bad address\n", 298 ps.ps_b, ps.ps_d, ps.ps_f); 299 #endif 300 rv = (pcireg_t) -1; 301 } 302 303 if (becc_pci_conf_cleanup(sc)) 304 rv = (pcireg_t) -1; 305 306 PCI_CONF_UNLOCK(s); 307 308 return (rv); 309 } 310 311 void 312 becc_pci_conf_write(void *v, pcitag_t tag, int offset, pcireg_t val) 313 { 314 struct becc_softc *sc = v; 315 struct pciconf_state ps; 316 vaddr_t va; 317 u_int s; 318 319 if (becc_pci_conf_setup(sc, tag, offset, &ps)) 320 return; 321 322 PCI_CONF_LOCK(s); 323 BECC_CSR_WRITE(BECC_POCR, ps.ps_type); 324 325 va = sc->sc_pci_cfg_base + ps.ps_offset; 326 327 *(volatile pcireg_t *)va = val; 328 329 becc_pci_conf_cleanup(sc); 330 331 PCI_CONF_UNLOCK(s); 332 } 333 334 int 335 becc_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 336 { 337 int irq; 338 339 if (pa->pa_bus == 0) { 340 switch (pa->pa_device) { 341 case 1: irq = ICU_PCI_INTB; break; /* Ethernet #0 */ 342 case 2: irq = ICU_PCI_INTC; break; /* Ethernet #1 */ 343 case 3: /* Card slot */ 344 switch (pa->pa_intrpin) { 345 case 1: irq = ICU_PCI_INTA; break; 346 case 2: irq = ICU_PCI_INTB; break; 347 case 3: irq = ICU_PCI_INTC; break; 348 case 4: irq = ICU_PCI_INTD; break; 349 default: 350 printf("becc_pci_intr_map: bogus pin: %d\n", 351 pa->pa_intrpin); 352 return (1); 353 } 354 break; 355 default: 356 printf("becc_pci_intr_map: bogus device: %d\n", 357 pa->pa_device); 358 return (1); 359 } 360 } else { 361 switch (pa->pa_intrpin) { 362 case 1: irq = ICU_PCI_INTA; break; 363 case 2: irq = ICU_PCI_INTB; break; 364 case 3: irq = ICU_PCI_INTC; break; 365 case 4: irq = ICU_PCI_INTD; break; 366 default: 367 printf("becc_pci_intr_map: bogus pin: %d\n", 368 pa->pa_intrpin); 369 return (1); 370 } 371 } 372 373 *ihp = irq; 374 return (0); 375 } 376 377 const char * 378 becc_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 379 { 380 381 strlcpy(buf, becc_irqnames[ih], len); 382 return buf; 383 } 384 385 const struct evcnt * 386 becc_pci_intr_evcnt(void *v, pci_intr_handle_t ih) 387 { 388 389 /* XXX For now. */ 390 return (NULL); 391 } 392 393 void * 394 becc_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 395 int (*func)(void *), void *arg, const char *xname) 396 { 397 398 return (becc_intr_establish(ih, ipl, func, arg)); 399 } 400 401 void 402 becc_pci_intr_disestablish(void *v, void *cookie) 403 { 404 405 becc_intr_disestablish(cookie); 406 } 407