1 /* $NetBSD: becc_intr.h,v 1.1 2003/01/25 01:57:18 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #ifndef _BECC_INTR_H_ 39 #define _BECC_INTR_H_ 40 41 #include <arm/armreg.h> 42 #include <arm/cpufunc.h> 43 44 #include <arm/xscale/beccreg.h> 45 #include <arm/xscale/becc_csrvar.h> 46 47 static __inline void __attribute__((__unused__)) 48 becc_set_intrmask(void) 49 { 50 extern __volatile uint32_t intr_enabled; 51 52 /* 53 * The bits in the ICMR indicate which interrupts are masked 54 * (disabled), so we must invert our intr_enabled mask. 55 */ 56 57 BECC_CSR_WRITE(BECC_ICMR, ~intr_enabled & ICU_VALID_MASK); 58 (void) BECC_CSR_READ(BECC_ICMR); 59 } 60 61 static __inline int __attribute__((__unused__)) 62 becc_splraise(int ipl) 63 { 64 extern __volatile uint32_t current_spl_level; 65 extern uint32_t becc_imask[]; 66 uint32_t old; 67 68 old = current_spl_level; 69 current_spl_level |= becc_imask[ipl]; 70 71 return (old); 72 } 73 74 static __inline void __attribute__((__unused__)) 75 becc_splx(int new) 76 { 77 extern __volatile uint32_t intr_enabled, becc_ipending; 78 extern __volatile uint32_t current_spl_level; 79 uint32_t oldirqstate, hwpend; 80 81 current_spl_level = new; 82 83 /* 84 * If there are pending HW interrupts which are being 85 * unmasked, then enable them in the ICMR register. 86 * This will cause them to come flooding in. This 87 * includes soft interrupts. 88 */ 89 hwpend = becc_ipending & ~new; 90 if (hwpend != 0) { 91 oldirqstate = disable_interrupts(I32_bit); 92 intr_enabled |= hwpend; 93 becc_set_intrmask(); 94 restore_interrupts(oldirqstate); 95 } 96 } 97 98 static __inline int __attribute__((__unused__)) 99 becc_spllower(int ipl) 100 { 101 extern __volatile uint32_t current_spl_level; 102 extern uint32_t becc_imask[]; 103 uint32_t old = current_spl_level; 104 105 becc_splx(becc_imask[ipl]); 106 return (old); 107 } 108 109 static __inline void __attribute__((__unused__)) 110 becc_setsoftintr(int si) 111 { 112 extern __volatile uint32_t becc_sipending; 113 114 becc_sipending |= (1 << si); 115 BECC_CSR_WRITE(BECC_ICSR, (1U << ICU_SOFT)); 116 } 117 118 int becc_softint(void *arg); 119 120 #if !defined(EVBARM_SPL_NOINLINE) 121 122 #define _splraise(ipl) becc_splraise(ipl) 123 #define splx(new) becc_splx(new) 124 #define _spllower(ipl) becc_spllower(ipl) 125 #define _setsoftintr(si) becc_setsoftintr(si) 126 127 #else 128 129 int _splraise(int); 130 void splx(int); 131 int _spllower(int); 132 void _setsoftintr(int); 133 134 #endif /* ! EVBARM_SPL_NOINLINE */ 135 136 #endif /* _BECC_INTR_H_ */ 137