1 /* $NetBSD: zynq_platform.c,v 1.5 2021/04/24 23:36:29 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2019 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "opt_console.h" 33 #include "opt_soc.h" 34 35 #include "arml2cc.h" 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: zynq_platform.c,v 1.5 2021/04/24 23:36:29 thorpej Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/bus.h> 42 #include <sys/cpu.h> 43 #include <sys/device.h> 44 45 #include <dev/fdt/fdtvar.h> 46 #include <arm/fdt/arm_fdtvar.h> 47 48 #include <uvm/uvm_extern.h> 49 50 #include <machine/bootconfig.h> 51 52 #include <arm/cortex/a9tmr_var.h> 53 #include <arm/xilinx/zynq_uartreg.h> 54 55 #include <evbarm/fdt/platform.h> 56 57 #include <libfdt.h> 58 59 #include <arm/cortex/pl310_var.h> 60 61 #define ZYNQ_REF_FREQ 24000000 62 63 #define ZYNQ7000_DDR_PBASE 0x00000000 64 #define ZYNQ7000_DDR_SIZE 0x40000000 65 66 #define ZYNQ_IOREG_VBASE KERNEL_IO_VBASE 67 #define ZYNQ_IOREG_PBASE 0xe0000000 68 #define ZYNQ_IOREG_SIZE 0x00200000 69 70 #define ZYNQ_GPV_VBASE (ZYNQ_IOREG_VBASE + ZYNQ_IOREG_SIZE) 71 #define ZYNQ_GPV_PBASE 0xf8900000 72 #define ZYNQ_GPV_SIZE 0x00100000 73 74 #define ZYNQ_ARMCORE_VBASE (ZYNQ_GPV_VBASE + ZYNQ_GPV_SIZE) 75 #define ZYNQ_ARMCORE_PBASE 0xf8f00000 76 #define ZYNQ_ARMCORE_SIZE 0x00003000 77 78 extern struct bus_space arm_generic_bs_tag; 79 extern struct arm32_bus_dma_tag arm_generic_dma_tag; 80 81 void zynq_platform_early_putchar(char); 82 83 static const struct pmap_devmap * 84 zynq_platform_devmap(void) 85 { 86 static const struct pmap_devmap devmap[] = { 87 DEVMAP_ENTRY(ZYNQ_IOREG_VBASE, 88 ZYNQ_IOREG_PBASE, 89 ZYNQ_IOREG_SIZE), 90 DEVMAP_ENTRY(ZYNQ_GPV_VBASE, 91 ZYNQ_GPV_PBASE, 92 ZYNQ_GPV_SIZE), 93 DEVMAP_ENTRY(ZYNQ_ARMCORE_VBASE, 94 ZYNQ_ARMCORE_PBASE, 95 ZYNQ_ARMCORE_SIZE), 96 DEVMAP_ENTRY_END 97 }; 98 99 return devmap; 100 } 101 102 static void 103 zynq_platform_init_attach_args(struct fdt_attach_args *faa) 104 { 105 faa->faa_bst = &arm_generic_bs_tag; 106 faa->faa_dmat = &arm_generic_dma_tag; 107 } 108 109 void __noasan 110 zynq_platform_early_putchar(char c) 111 { 112 #ifdef CONSADDR 113 #define CONSADDR_VA ((CONSADDR - ZYNQ_IOREG_PBASE) + ZYNQ_IOREG_VBASE) 114 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? 115 (volatile uint32_t *)CONSADDR_VA : 116 (volatile uint32_t *)CONSADDR; 117 118 /* QEMU needs CR_TXEN to be set and CR_TXDIS to be unset */ 119 uartaddr[UART_CONTROL / 4] = CR_TXEN; 120 while ((le32toh(uartaddr[UART_CHNL_INT_STS / 4]) & STS_TEMPTY) == 0) 121 ; 122 123 uartaddr[UART_TX_RX_FIFO / 4] = htole32(c); 124 #endif 125 } 126 127 static void 128 zynq_platform_device_register(device_t dev, void *aux) 129 { 130 prop_dictionary_t dict = device_properties(dev); 131 132 if (device_is_a(dev, "arma9tmr")) { 133 prop_dictionary_set_uint32(dict, "frequency", 134 ZYNQ_REF_FREQ / 4); 135 } 136 } 137 138 static u_int 139 zynq_platform_uart_freq(void) 140 { 141 return ZYNQ_REF_FREQ; 142 } 143 144 #define ZYNQ_ARMCORE_L2C_BASE 0x00002000 145 #define ZYNQ_ARM_PL310_BASE ZYNQ_ARMCORE_VBASE + ZYNQ_ARMCORE_L2C_BASE 146 147 static void 148 zynq_platform_bootstrap(void) 149 { 150 #if NARML2CC > 0 151 const bus_space_handle_t pl310_bh = ZYNQ_ARM_PL310_BASE; 152 arml2cc_init(&arm_generic_bs_tag, pl310_bh, 0); 153 #endif 154 155 arm_fdt_cpu_bootstrap(); 156 157 void *fdt_data = __UNCONST(fdtbus_get_data()); 158 const int chosen_off = fdt_path_offset(fdt_data, "/chosen"); 159 if (chosen_off < 0) 160 return; 161 162 if (match_bootconf_option(boot_args, "console", "fb")) { 163 const int framebuffer_off = 164 fdt_path_offset(fdt_data, "/chosen/framebuffer"); 165 if (framebuffer_off >= 0) { 166 const char *status = fdt_getprop(fdt_data, 167 framebuffer_off, "status", NULL); 168 if (status == NULL || strncmp(status, "ok", 2) == 0) { 169 fdt_setprop_string(fdt_data, chosen_off, 170 "stdout-path", "/chosen/framebuffer"); 171 } 172 } 173 } else if (match_bootconf_option(boot_args, "console", "serial")) { 174 fdt_setprop_string(fdt_data, chosen_off, 175 "stdout-path", "serial0:115200n8"); 176 } 177 } 178 179 static void 180 zynq_platform_reset(void) 181 { 182 183 } 184 185 static const struct arm_platform zynq_platform = { 186 .ap_devmap = zynq_platform_devmap, 187 .ap_bootstrap = zynq_platform_bootstrap, 188 .ap_init_attach_args = zynq_platform_init_attach_args, 189 .ap_device_register = zynq_platform_device_register, 190 .ap_reset = zynq_platform_reset, 191 .ap_delay = a9tmr_delay, 192 .ap_uart_freq = zynq_platform_uart_freq, 193 #if 0 194 .ap_mpstart = arm_fdt_cpu_mpstart, 195 #endif 196 }; 197 198 199 ARM_PLATFORM(zynq, "xlnx,zynq-7000", &zynq_platform); 200