1 /* $NetBSD: vfp_init.c,v 1.27 2013/11/18 18:02:01 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2008 ARM Ltd 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the company may not be used to endorse or promote 16 * products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY 23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 25 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 28 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 29 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/param.h> 33 #include <sys/types.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/proc.h> 37 #include <sys/cpu.h> 38 39 #include <arm/locore.h> 40 #include <arm/pcb.h> 41 #include <arm/undefined.h> 42 #include <arm/vfpreg.h> 43 #include <arm/mcontext.h> 44 45 #include <uvm/uvm_extern.h> /* for pmap.h */ 46 47 extern int cpu_media_and_vfp_features[]; 48 extern int cpu_neon_present; 49 50 #ifdef FPU_VFP 51 52 /* FLDMD <X>, {d0-d15} */ 53 static inline void 54 load_vfpregs_lo(const uint64_t *p) 55 { 56 /* vldmia rN, {d0-d15} */ 57 __asm __volatile("ldc\tp11, c0, [%0], {32}" :: "r" (p) : "memory"); 58 } 59 60 /* FSTMD <X>, {d0-d15} */ 61 static inline void 62 save_vfpregs_lo(uint64_t *p) 63 { 64 __asm __volatile("stc\tp11, c0, [%0], {32}" :: "r" (p) : "memory"); 65 } 66 67 #ifdef CPU_CORTEX 68 /* FLDMD <X>, {d16-d31} */ 69 static inline void 70 load_vfpregs_hi(const uint64_t *p) 71 { 72 __asm __volatile("ldcl\tp11, c0, [%0], {32}" :: "r" (&p[16]) : "memory"); 73 } 74 75 /* FLDMD <X>, {d16-d31} */ 76 static inline void 77 save_vfpregs_hi(uint64_t *p) 78 { 79 __asm __volatile("stcl\tp11, c0, [%0], {32}" :: "r" (&p[16]) : "memory"); 80 } 81 #endif 82 83 static inline void 84 load_vfpregs(const struct vfpreg *fregs) 85 { 86 load_vfpregs_lo(fregs->vfp_regs); 87 #ifdef CPU_CORTEX 88 #ifdef CPU_ARM11 89 switch (curcpu()->ci_vfp_id) { 90 case FPU_VFP_CORTEXA5: 91 case FPU_VFP_CORTEXA7: 92 case FPU_VFP_CORTEXA8: 93 case FPU_VFP_CORTEXA9: 94 case FPU_VFP_CORTEXA15: 95 #endif 96 load_vfpregs_hi(fregs->vfp_regs); 97 #ifdef CPU_ARM11 98 break; 99 } 100 #endif 101 #endif 102 } 103 104 static inline void 105 save_vfpregs(struct vfpreg *fregs) 106 { 107 save_vfpregs_lo(fregs->vfp_regs); 108 #ifdef CPU_CORTEX 109 #ifdef CPU_ARM11 110 switch (curcpu()->ci_vfp_id) { 111 case FPU_VFP_CORTEXA5: 112 case FPU_VFP_CORTEXA7: 113 case FPU_VFP_CORTEXA8: 114 case FPU_VFP_CORTEXA9: 115 case FPU_VFP_CORTEXA15: 116 #endif 117 save_vfpregs_hi(fregs->vfp_regs); 118 #ifdef CPU_ARM11 119 break; 120 } 121 #endif 122 #endif 123 } 124 125 /* The real handler for VFP bounces. */ 126 static int vfp_handler(u_int, u_int, trapframe_t *, int); 127 #ifdef CPU_CORTEX 128 static int neon_handler(u_int, u_int, trapframe_t *, int); 129 #endif 130 131 static void vfp_state_load(lwp_t *, u_int); 132 static void vfp_state_save(lwp_t *, u_int); 133 static void vfp_state_release(lwp_t *, u_int); 134 135 const pcu_ops_t arm_vfp_ops = { 136 .pcu_id = PCU_FPU, 137 .pcu_state_save = vfp_state_save, 138 .pcu_state_load = vfp_state_load, 139 .pcu_state_release = vfp_state_release, 140 }; 141 142 struct evcnt vfpevent_use; 143 struct evcnt vfpevent_reuse; 144 struct evcnt vfpevent_fpe; 145 146 /* 147 * Used to test for a VFP. The following function is installed as a coproc10 148 * handler on the undefined instruction vector and then we issue a VFP 149 * instruction. If undefined_test is non zero then the VFP did not handle 150 * the instruction so must be absent, or disabled. 151 */ 152 153 static int undefined_test; 154 155 static int 156 vfp_test(u_int address, u_int insn, trapframe_t *frame, int fault_code) 157 { 158 159 frame->tf_pc += INSN_SIZE; 160 ++undefined_test; 161 return 0; 162 } 163 164 #endif /* FPU_VFP */ 165 166 struct evcnt vfp_fpscr_ev = 167 EVCNT_INITIALIZER(EVCNT_TYPE_TRAP, NULL, "VFP", "FPSCR traps"); 168 EVCNT_ATTACH_STATIC(vfp_fpscr_ev); 169 170 static int 171 vfp_fpscr_handler(u_int address, u_int insn, trapframe_t *frame, int fault_code) 172 { 173 struct lwp * const l = curlwp; 174 const u_int regno = (insn >> 12) & 0xf; 175 /* 176 * Only match move to/from the FPSCR register and we 177 * can't be using the SP,LR,PC as a source. 178 */ 179 if ((insn & 0xffef0fff) != 0xeee10a10 || regno > 12) 180 return 1; 181 182 struct pcb * const pcb = lwp_getpcb(l); 183 184 #ifdef FPU_VFP 185 /* 186 * If FPU is valid somewhere, let's just reenable VFP and 187 * retry the instruction (only safe thing to do since the 188 * pcb has a stale copy). 189 */ 190 if (pcb->pcb_vfp.vfp_fpexc & VFP_FPEXC_EN) 191 return 1; 192 193 if (__predict_false(!vfp_used_p())) { 194 pcb->pcb_vfp.vfp_fpscr = 195 (VFP_FPSCR_DN | VFP_FPSCR_FZ); /* Runfast */ 196 } 197 #endif 198 199 /* 200 * We know know the pcb has the saved copy. 201 */ 202 register_t * const regp = &frame->tf_r0 + regno; 203 if (insn & 0x00100000) { 204 *regp = pcb->pcb_vfp.vfp_fpscr; 205 } else { 206 register_t tmp = *regp; 207 if (!(cpu_media_and_vfp_features[0] & ARM_MVFR0_EXCEPT_MASK)) 208 tmp &= ~VFP_FPSCR_ESUM; 209 pcb->pcb_vfp.vfp_fpscr = tmp; 210 } 211 212 vfp_fpscr_ev.ev_count++; 213 214 frame->tf_pc += INSN_SIZE; 215 return 0; 216 } 217 218 #ifndef FPU_VFP 219 /* 220 * If we don't want VFP support, we still need to handle emulating VFP FPSCR 221 * instructions. 222 */ 223 void 224 vfp_attach(void) 225 { 226 install_coproc_handler(VFP_COPROC, vfp_fpscr_handler); 227 } 228 229 #else 230 #if 0 231 static bool 232 vfp_patch_branch(uintptr_t code, uintptr_t func, uintptr_t newfunc) 233 { 234 for (;; code += sizeof(uint32_t)) { 235 uint32_t insn = *(uint32_t *)code; 236 if ((insn & 0xffd08000) == 0xe8908000) /* ldm ... { pc } */ 237 return false; 238 if ((insn & 0xfffffff0) == 0xe12fff10) /* bx rN */ 239 return false; 240 if ((insn & 0xf1a0f000) == 0xe1a0f000) /* mov pc, ... */ 241 return false; 242 if ((insn >> 25) != 0x75) /* not b/bl insn */ 243 continue; 244 intptr_t imm26 = ((int32_t)insn << 8) >> 6; 245 if (code + imm26 + 8 == func) { 246 int32_t imm24 = (newfunc - (code + 8)) >> 2; 247 uint32_t new_insn = (insn & 0xff000000) 248 | (imm24 & 0xffffff); 249 KASSERTMSG((uint32_t)((imm24 >> 24) + 1) <= 1, "%x", 250 ((imm24 >> 24) + 1)); 251 *(uint32_t *)code = new_insn; 252 cpu_idcache_wbinv_range(code, sizeof(uint32_t)); 253 return true; 254 } 255 } 256 } 257 #endif 258 259 void 260 vfp_attach(void) 261 { 262 struct cpu_info * const ci = curcpu(); 263 const char *model = NULL; 264 bool vfp_p = false; 265 266 if (CPU_ID_ARM11_P(curcpu()->ci_arm_cpuid) 267 || CPU_ID_CORTEX_P(curcpu()->ci_arm_cpuid)) { 268 const uint32_t cpacr_vfp = CPACR_CPn(VFP_COPROC); 269 const uint32_t cpacr_vfp2 = CPACR_CPn(VFP_COPROC2); 270 271 /* 272 * We first need to enable access to the coprocessors. 273 */ 274 uint32_t cpacr = armreg_cpacr_read(); 275 cpacr |= __SHIFTIN(CPACR_ALL, cpacr_vfp); 276 cpacr |= __SHIFTIN(CPACR_ALL, cpacr_vfp2); 277 #if 0 278 if (CPU_ID_CORTEX_P(curcpu()->ci_arm_cpuid)) { 279 /* 280 * Disable access to the upper 16 FP registers and NEON. 281 */ 282 cpacr |= CPACR_V7_D32DIS; 283 cpacr |= CPACR_V7_ASEDIS; 284 } 285 #endif 286 armreg_cpacr_write(cpacr); 287 288 /* 289 * If we could enable them, then they exist. 290 */ 291 cpacr = armreg_cpacr_read(); 292 vfp_p = __SHIFTOUT(cpacr, cpacr_vfp2) != CPACR_NOACCESS 293 || __SHIFTOUT(cpacr, cpacr_vfp) != CPACR_NOACCESS; 294 } 295 296 void *uh = install_coproc_handler(VFP_COPROC, vfp_test); 297 298 undefined_test = 0; 299 300 const uint32_t fpsid = armreg_fpsid_read(); 301 302 remove_coproc_handler(uh); 303 304 if (undefined_test != 0) { 305 aprint_normal_dev(ci->ci_dev, "No VFP detected\n"); 306 install_coproc_handler(VFP_COPROC, vfp_fpscr_handler); 307 ci->ci_vfp_id = 0; 308 return; 309 } 310 311 ci->ci_vfp_id = fpsid; 312 switch (fpsid & ~ VFP_FPSID_REV_MSK) { 313 case FPU_VFP10_ARM10E: 314 model = "VFP10 R1"; 315 break; 316 case FPU_VFP11_ARM11: 317 model = "VFP11"; 318 break; 319 case FPU_VFP_CORTEXA5: 320 case FPU_VFP_CORTEXA7: 321 case FPU_VFP_CORTEXA8: 322 case FPU_VFP_CORTEXA9: 323 case FPU_VFP_CORTEXA15: 324 model = "NEON MPE (VFP 3.0+)"; 325 cpu_neon_present = 1; 326 break; 327 default: 328 aprint_normal_dev(ci->ci_dev, "unrecognized VFP version %x\n", 329 fpsid); 330 install_coproc_handler(VFP_COPROC, vfp_fpscr_handler); 331 return; 332 } 333 334 cpu_fpu_present = 1; 335 cpu_media_and_vfp_features[0] = armreg_mvfr0_read(); 336 cpu_media_and_vfp_features[1] = armreg_mvfr1_read(); 337 if (fpsid != 0) { 338 aprint_normal("vfp%d at %s: %s\n", 339 device_unit(curcpu()->ci_dev), 340 device_xname(curcpu()->ci_dev), 341 model); 342 aprint_verbose("vfp%d: mvfr: [0]=%#x [1]=%#x\n", 343 device_unit(curcpu()->ci_dev), 344 cpu_media_and_vfp_features[0], 345 cpu_media_and_vfp_features[1]); 346 } 347 evcnt_attach_dynamic(&vfpevent_use, EVCNT_TYPE_MISC, NULL, 348 "VFP", "coproc use"); 349 evcnt_attach_dynamic(&vfpevent_reuse, EVCNT_TYPE_MISC, NULL, 350 "VFP", "coproc re-use"); 351 evcnt_attach_dynamic(&vfpevent_fpe, EVCNT_TYPE_TRAP, NULL, 352 "VFP", "coproc fault"); 353 install_coproc_handler(VFP_COPROC, vfp_handler); 354 install_coproc_handler(VFP_COPROC2, vfp_handler); 355 #ifdef CPU_CORTEX 356 install_coproc_handler(CORE_UNKNOWN_HANDLER, neon_handler); 357 #endif 358 359 #if 0 360 vfp_patch_branch((uintptr_t)pmap_copy_page_generic, 361 (uintptr_t)bcopy_page, (uintptr_t)bcopy_page_vfp); 362 vfp_patch_branch((uintptr_t)pmap_zero_page_generic, 363 (uintptr_t)bzero_page, (uintptr_t)bzero_page_vfp); 364 #endif 365 } 366 367 /* The real handler for VFP bounces. */ 368 static int 369 vfp_handler(u_int address, u_int insn, trapframe_t *frame, int fault_code) 370 { 371 struct cpu_info * const ci = curcpu(); 372 373 /* This shouldn't ever happen. */ 374 if (fault_code != FAULT_USER) 375 panic("VFP fault at %#x in non-user mode", frame->tf_pc); 376 377 if (ci->ci_vfp_id == 0) { 378 /* No VFP detected, just fault. */ 379 return 1; 380 } 381 382 /* 383 * If we are just changing/fetching FPSCR, don't bother loading it. 384 */ 385 if (!vfp_fpscr_handler(address, insn, frame, fault_code)) 386 return 0; 387 388 /* 389 * Make sure we own the FP. 390 */ 391 pcu_load(&arm_vfp_ops); 392 393 uint32_t fpexc = armreg_fpexc_read(); 394 if (fpexc & VFP_FPEXC_EX) { 395 ksiginfo_t ksi; 396 KASSERT(fpexc & VFP_FPEXC_EN); 397 398 vfpevent_fpe.ev_count++; 399 400 pcu_save(&arm_vfp_ops); 401 402 /* 403 * Need the clear the exception condition so any signal 404 * can run. 405 */ 406 armreg_fpexc_write(fpexc & ~(VFP_FPEXC_EX|VFP_FPEXE_FSUM)); 407 408 KSI_INIT_TRAP(&ksi); 409 ksi.ksi_signo = SIGFPE; 410 if (fpexc & VFP_FPEXC_IXF) 411 ksi.ksi_code = FPE_FLTRES; 412 else if (fpexc & VFP_FPEXC_UFF) 413 ksi.ksi_code = FPE_FLTUND; 414 else if (fpexc & VFP_FPEXC_OFF) 415 ksi.ksi_code = FPE_FLTOVF; 416 else if (fpexc & VFP_FPEXC_DZF) 417 ksi.ksi_code = FPE_FLTDIV; 418 else if (fpexc & VFP_FPEXC_IOF) 419 ksi.ksi_code = FPE_FLTINV; 420 ksi.ksi_addr = (uint32_t *)address; 421 ksi.ksi_trap = 0; 422 trapsignal(curlwp, &ksi); 423 return 0; 424 } 425 426 /* Need to restart the faulted instruction. */ 427 // frame->tf_pc -= INSN_SIZE; 428 return 0; 429 } 430 431 #ifdef CPU_CORTEX 432 /* The real handler for NEON bounces. */ 433 static int 434 neon_handler(u_int address, u_int insn, trapframe_t *frame, int fault_code) 435 { 436 struct cpu_info * const ci = curcpu(); 437 438 if (ci->ci_vfp_id == 0) 439 /* No VFP detected, just fault. */ 440 return 1; 441 442 if ((insn & 0xfe000000) != 0xf2000000 443 && (insn & 0xfe000000) != 0xf4000000) 444 /* Not NEON instruction, just fault. */ 445 return 1; 446 447 /* This shouldn't ever happen. */ 448 if (fault_code != FAULT_USER) 449 panic("NEON fault in non-user mode"); 450 451 pcu_load(&arm_vfp_ops); 452 453 /* Need to restart the faulted instruction. */ 454 // frame->tf_pc -= INSN_SIZE; 455 return 0; 456 } 457 #endif 458 459 static void 460 vfp_state_load(lwp_t *l, u_int flags) 461 { 462 struct pcb * const pcb = lwp_getpcb(l); 463 464 KASSERT(flags & PCU_ENABLE); 465 466 if (flags & PCU_KERNEL) { 467 if ((flags & PCU_LOADED) == 0) { 468 pcb->pcb_kernel_vfp.vfp_fpexc = pcb->pcb_vfp.vfp_fpexc; 469 } 470 pcb->pcb_vfp.vfp_fpexc = VFP_FPEXC_EN; 471 armreg_fpexc_write(pcb->pcb_vfp.vfp_fpexc); 472 /* 473 * Load the kernel registers (just the first 16) if they've 474 * been used.. 475 */ 476 if (flags & PCU_LOADED) { 477 load_vfpregs_lo(pcb->pcb_kernel_vfp.vfp_regs); 478 } 479 return; 480 } 481 struct vfpreg * const fregs = &pcb->pcb_vfp; 482 483 /* 484 * Instrument VFP usage -- if a process has not previously 485 * used the VFP, mark it as having used VFP for the first time, 486 * and count this event. 487 * 488 * If a process has used the VFP, count a "used VFP, and took 489 * a trap to use it again" event. 490 */ 491 if (__predict_false((flags & PCU_LOADED) == 0)) { 492 vfpevent_use.ev_count++; 493 pcb->pcb_vfp.vfp_fpscr = /* Runfast */ 494 (VFP_FPSCR_DN | VFP_FPSCR_FZ | VFP_FPSCR_RN); 495 } else { 496 vfpevent_reuse.ev_count++; 497 } 498 499 if (fregs->vfp_fpexc & VFP_FPEXC_EN) { 500 /* 501 * If we think the VFP is enabled, it must have be disabled by 502 * vfp_state_release for another LWP so we can just restore 503 * FPEXC and return since our VFP state is still loaded. 504 */ 505 armreg_fpexc_write(fregs->vfp_fpexc); 506 return; 507 } 508 509 /* Load and Enable the VFP (so that we can write the registers). */ 510 if (flags & PCU_RELOAD) { 511 uint32_t fpexc = armreg_fpexc_read(); 512 KDASSERT((fpexc & VFP_FPEXC_EX) == 0); 513 armreg_fpexc_write(fpexc | VFP_FPEXC_EN); 514 515 load_vfpregs(fregs); 516 armreg_fpscr_write(fregs->vfp_fpscr); 517 518 if (fregs->vfp_fpexc & VFP_FPEXC_EX) { 519 /* Need to restore the exception handling state. */ 520 armreg_fpinst2_write(fregs->vfp_fpinst2); 521 if (fregs->vfp_fpexc & VFP_FPEXC_FP2V) 522 armreg_fpinst_write(fregs->vfp_fpinst); 523 } 524 } 525 526 /* Finally, restore the FPEXC but don't enable the VFP. */ 527 fregs->vfp_fpexc |= VFP_FPEXC_EN; 528 armreg_fpexc_write(fregs->vfp_fpexc); 529 } 530 531 void 532 vfp_state_save(lwp_t *l, u_int flags) 533 { 534 struct pcb * const pcb = lwp_getpcb(l); 535 uint32_t fpexc = armreg_fpexc_read(); 536 armreg_fpexc_write((fpexc | VFP_FPEXC_EN) & ~VFP_FPEXC_EX); 537 538 if (flags & PCU_KERNEL) { 539 /* 540 * Save the kernel set of VFP registers. 541 * (just the first 16). 542 */ 543 save_vfpregs_lo(pcb->pcb_kernel_vfp.vfp_regs); 544 return; 545 } 546 547 struct vfpreg * const fregs = &pcb->pcb_vfp; 548 549 /* 550 * Enable the VFP (so we can read the registers). 551 * Make sure the exception bit is cleared so that we can 552 * safely dump the registers. 553 */ 554 fregs->vfp_fpexc = fpexc; 555 if (fpexc & VFP_FPEXC_EX) { 556 /* Need to save the exception handling state */ 557 fregs->vfp_fpinst = armreg_fpinst_read(); 558 if (fpexc & VFP_FPEXC_FP2V) 559 fregs->vfp_fpinst2 = armreg_fpinst2_read(); 560 } 561 fregs->vfp_fpscr = armreg_fpscr_read(); 562 save_vfpregs(fregs); 563 564 /* Disable the VFP. */ 565 armreg_fpexc_write(fpexc); 566 } 567 568 void 569 vfp_state_release(lwp_t *l, u_int flags) 570 { 571 struct pcb * const pcb = lwp_getpcb(l); 572 573 if (flags & PCU_KERNEL) { 574 /* 575 * Restore the FPEXC since we borrowed that field. 576 */ 577 pcb->pcb_vfp.vfp_fpexc = pcb->pcb_kernel_vfp.vfp_fpexc; 578 } else { 579 /* 580 * Now mark the VFP as disabled (and our state 581 * has been already saved or is being discarded). 582 */ 583 pcb->pcb_vfp.vfp_fpexc &= ~VFP_FPEXC_EN; 584 } 585 586 /* 587 * Turn off the FPU so the next time a VFP instruction is issued 588 * an exception happens. We don't know if this LWP's state was 589 * loaded but if we turned off the FPU for some other LWP, when 590 * pcu_load invokes vfp_state_load it will see that VFP_FPEXC_EN 591 * is still set so it just restore fpexc and return since its 592 * contents are still sitting in the VFP. 593 */ 594 armreg_fpexc_write(armreg_fpexc_read() & ~VFP_FPEXC_EN); 595 } 596 597 void 598 vfp_savecontext(void) 599 { 600 pcu_save(&arm_vfp_ops); 601 } 602 603 void 604 vfp_discardcontext(bool used_p) 605 { 606 pcu_discard(&arm_vfp_ops, used_p); 607 } 608 609 bool 610 vfp_used_p(void) 611 { 612 return pcu_used_p(&arm_vfp_ops); 613 } 614 615 void 616 vfp_kernel_acquire(void) 617 { 618 if (__predict_false(cpu_intr_p())) { 619 armreg_fpexc_write(VFP_FPEXC_EN); 620 if (curcpu()->ci_data.cpu_pcu_curlwp[PCU_FPU] != NULL) { 621 lwp_t * const l = curlwp; 622 struct pcb * const pcb = lwp_getpcb(l); 623 KASSERT((l->l_md.md_flags & MDLWP_VFPINTR) == 0); 624 l->l_md.md_flags |= MDLWP_VFPINTR; 625 save_vfpregs_lo(&pcb->pcb_kernel_vfp.vfp_regs[16]); 626 } 627 } else { 628 pcu_kernel_acquire(&arm_vfp_ops); 629 } 630 } 631 632 void 633 vfp_kernel_release(void) 634 { 635 if (__predict_false(cpu_intr_p())) { 636 uint32_t fpexc = 0; 637 if (curcpu()->ci_data.cpu_pcu_curlwp[PCU_FPU] != NULL) { 638 lwp_t * const l = curlwp; 639 struct pcb * const pcb = lwp_getpcb(l); 640 KASSERT(l->l_md.md_flags & MDLWP_VFPINTR); 641 load_vfpregs_lo(&pcb->pcb_kernel_vfp.vfp_regs[16]); 642 l->l_md.md_flags &= ~MDLWP_VFPINTR; 643 fpexc = pcb->pcb_vfp.vfp_fpexc; 644 } 645 armreg_fpexc_write(fpexc); 646 } else { 647 pcu_kernel_release(&arm_vfp_ops); 648 } 649 } 650 651 void 652 vfp_getcontext(struct lwp *l, mcontext_t *mcp, int *flagsp) 653 { 654 if (vfp_used_p()) { 655 const struct pcb * const pcb = lwp_getpcb(l); 656 pcu_save(&arm_vfp_ops); 657 mcp->__fpu.__vfpregs.__vfp_fpscr = pcb->pcb_vfp.vfp_fpscr; 658 memcpy(mcp->__fpu.__vfpregs.__vfp_fstmx, pcb->pcb_vfp.vfp_regs, 659 sizeof(mcp->__fpu.__vfpregs.__vfp_fstmx)); 660 *flagsp |= _UC_FPU|_UC_ARM_VFP; 661 } 662 } 663 664 void 665 vfp_setcontext(struct lwp *l, const mcontext_t *mcp) 666 { 667 pcu_discard(&arm_vfp_ops, true); 668 struct pcb * const pcb = lwp_getpcb(l); 669 pcb->pcb_vfp.vfp_fpscr = mcp->__fpu.__vfpregs.__vfp_fpscr; 670 memcpy(pcb->pcb_vfp.vfp_regs, mcp->__fpu.__vfpregs.__vfp_fstmx, 671 sizeof(mcp->__fpu.__vfpregs.__vfp_fstmx)); 672 } 673 674 #endif /* FPU_VFP */ 675