1 /* $NetBSD: am3_platform.c,v 1.3 2020/09/28 11:54:23 jmcneill Exp $ */ 2 3 #include "opt_console.h" 4 5 #include <sys/cdefs.h> 6 __KERNEL_RCSID(0, "$NetBSD: am3_platform.c,v 1.3 2020/09/28 11:54:23 jmcneill Exp $"); 7 8 #include <sys/param.h> 9 10 #include <dev/fdt/fdtvar.h> 11 #include <arm/fdt/arm_fdtvar.h> 12 13 #include <uvm/uvm_extern.h> 14 15 #include <dev/ic/comreg.h> 16 17 #include <machine/vmparam.h> 18 #include <arch/evbarm/fdt/platform.h> 19 20 extern struct bus_space armv7_generic_bs_tag; 21 extern struct arm32_bus_dma_tag arm_generic_dma_tag; 22 23 void am33xx_platform_early_putchar(char); 24 25 void __noasan 26 am33xx_platform_early_putchar(char c) 27 { 28 #ifdef CONSADDR 29 #define CONSADDR_VA ((CONSADDR - 0x44c00000) + (KERNEL_IO_VBASE | 0x04c00000)) 30 volatile uint32_t *uartaddr = cpu_earlydevice_va_p() ? 31 (volatile uint32_t *)CONSADDR_VA : 32 (volatile uint32_t *)CONSADDR; 33 34 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0) 35 ; 36 37 uartaddr[com_data] = htole32(c); 38 #endif 39 } 40 41 42 static const struct pmap_devmap * 43 am33xx_platform_devmap(void) 44 { 45 static const struct pmap_devmap devmap[] = { 46 DEVMAP_ENTRY(KERNEL_IO_VBASE | 0x04c00000, 0x44c00000, 0x00400000), 47 DEVMAP_ENTRY(KERNEL_IO_VBASE | 0x08000000, 0x48000000, 0x01000000), 48 DEVMAP_ENTRY(KERNEL_IO_VBASE | 0x0a000000, 0x4a000000, 0x01000000), 49 DEVMAP_ENTRY_END 50 }; 51 52 return devmap; 53 } 54 55 static void 56 am33xx_platform_init_attach_args(struct fdt_attach_args *faa) 57 { 58 faa->faa_bst = &armv7_generic_bs_tag; 59 faa->faa_dmat = &arm_generic_dma_tag; 60 } 61 62 static void 63 wdelay(bus_space_tag_t bst, bus_space_handle_t bsh) 64 { 65 while (bus_space_read_4(bst, bsh, 0x34) != 0) 66 delay(10); 67 } 68 69 static void 70 am33xx_platform_bootstrap(void) 71 { 72 static bus_space_tag_t bst = &armv7_generic_bs_tag; 73 static bus_space_handle_t bsh; 74 75 bus_space_map(bst, 0x44e00000, 0x1000, 0, &bsh); 76 bus_space_write_4(bst, bsh, 0x508, 0x1); /* CLKSEL_TIMER2_CLK: CLK_M_OSC */ 77 bus_space_write_4(bst, bsh, 0x50c, 0x1); /* CLKSEL_TIMER3_CLK: CLK_M_OSC */ 78 bus_space_write_4(bst, bsh, 0x80, 0x2); /* CM_PER_TIMER2_CLKCTRL: MODULEMODE: ENABLE */ 79 bus_space_write_4(bst, bsh, 0x84, 0x2); /* CM_PER_TIMER3_CLKCTRL: MODULEMODE: ENABLE */ 80 bus_space_unmap(bst, bsh, 0x1000); 81 82 bus_space_map(bst, 0x48040000, 0x1000, 0, &bsh); /* TIMER2 for delay() */ 83 84 bus_space_write_4(bst, bsh, 0x40, 0); /* Load */ 85 bus_space_write_4(bst, bsh, 0x3c, 0); /* Counter */ 86 bus_space_write_4(bst, bsh, 0x38, 3); /* Control */ 87 88 bus_space_unmap(bst, bsh, 0x1000); 89 90 bus_space_map(bst, 0x44e35000, 0x1000, 0, &bsh); 91 wdelay(bst, bsh); 92 bus_space_write_4(bst, bsh, 0x48, 0xAAAA); 93 wdelay(bst, bsh); 94 bus_space_write_4(bst, bsh, 0x48, 0x5555); 95 wdelay(bst, bsh); 96 bus_space_unmap(bst, bsh, 0x1000); 97 98 bus_space_map(bst, 0x44e00000, 0x1000, 0, &bsh); 99 bus_space_write_4(bst, bsh, 0x4d4, 0); /* suspend watch dog */ 100 bus_space_unmap(bst, bsh, 0x1000); 101 } 102 103 static u_int 104 am33xx_platform_uart_freq(void) 105 { 106 return 48000000; 107 } 108 109 static void 110 am33xx_platform_delay(u_int n) 111 { 112 static bus_space_tag_t bst = &armv7_generic_bs_tag; 113 static bus_space_handle_t bsh = 0; 114 115 uint32_t cur, prev; 116 long ticks = n * 24; 117 118 if (bsh == 0) 119 bus_space_map(bst, 0x48040000, 0x1000, 0, &bsh); /* TIMER2 */ 120 121 prev = bus_space_read_4(bst, bsh, 0x3c); 122 while (ticks > 0) { 123 cur = bus_space_read_4(bst, bsh, 0x3c); 124 if (cur >= prev) 125 ticks -= (cur - prev); 126 else 127 ticks -= (UINT32_MAX - cur + prev); 128 prev = cur; 129 } 130 } 131 132 static void 133 am33xx_platform_reset(void) 134 { 135 volatile uint32_t *resetaddr = (volatile uint32_t *)(KERNEL_IO_VBASE | 0x04e00f00); 136 137 *resetaddr = 1; 138 } 139 140 static const struct arm_platform am33xx_platform = { 141 .ap_devmap = am33xx_platform_devmap, 142 .ap_init_attach_args = am33xx_platform_init_attach_args, 143 .ap_bootstrap = am33xx_platform_bootstrap, 144 .ap_uart_freq = am33xx_platform_uart_freq, 145 .ap_delay = am33xx_platform_delay, 146 .ap_reset = am33xx_platform_reset, 147 }; 148 149 ARM_PLATFORM(am33xx, "ti,am33xx", &am33xx_platform); 150