1 /* $NetBSD: sunxi_resets.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: sunxi_resets.c,v 1.2 2021/01/27 03:10:20 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/device.h> 36 37 #include <dev/fdt/fdtvar.h> 38 39 #include <dev/clk/clk_backend.h> 40 41 #define RESET_REG(index) (((index) / 32) * 4) 42 #define RESET_MASK(index) __BIT((index) % 32) 43 44 static const struct device_compatible_entry compat_data[] = { 45 { .compat = "allwinner,sun6i-a31-clock-reset" }, 46 DEVICE_COMPAT_EOL 47 }; 48 49 struct sunxi_resets_softc { 50 device_t sc_dev; 51 bus_space_tag_t sc_bst; 52 bus_space_handle_t sc_bsh; 53 }; 54 55 #define RESET_READ(sc, reg) \ 56 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 57 #define RESET_WRITE(sc, reg, val) \ 58 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 59 60 static void * 61 sunxi_resets_acquire(device_t dev, const void *data, size_t len) 62 { 63 if (len != 4) 64 return NULL; 65 66 /* Specifier is an index. Just return it. */ 67 return (void *)(uintptr_t)be32dec(data); 68 } 69 70 static void 71 sunxi_resets_release(device_t dev, void *priv) 72 { 73 } 74 75 static int 76 sunxi_resets_assert(device_t dev, void *priv) 77 { 78 struct sunxi_resets_softc * const sc = device_private(dev); 79 const uintptr_t index = (uintptr_t)priv; 80 81 const bus_size_t reset_reg = RESET_REG(index); 82 const uint32_t reset_mask = RESET_MASK(index); 83 84 const uint32_t val = RESET_READ(sc, reset_reg); 85 RESET_WRITE(sc, reset_reg, val & ~reset_mask); 86 87 return 0; 88 } 89 90 static int 91 sunxi_resets_deassert(device_t dev, void *priv) 92 { 93 struct sunxi_resets_softc * const sc = device_private(dev); 94 const uintptr_t index = (uintptr_t)priv; 95 96 const bus_size_t reset_reg = RESET_REG(index); 97 const uint32_t reset_mask = RESET_MASK(index); 98 99 const uint32_t val = RESET_READ(sc, reset_reg); 100 RESET_WRITE(sc, reset_reg, val | reset_mask); 101 102 return 0; 103 } 104 105 static const struct fdtbus_reset_controller_func sunxi_fdtreset_funcs = { 106 .acquire = sunxi_resets_acquire, 107 .release = sunxi_resets_release, 108 .reset_assert = sunxi_resets_assert, 109 .reset_deassert = sunxi_resets_deassert, 110 }; 111 112 static int 113 sunxi_resets_match(device_t parent, cfdata_t cf, void *aux) 114 { 115 struct fdt_attach_args * const faa = aux; 116 117 return of_compatible_match(faa->faa_phandle, compat_data); 118 } 119 120 static void 121 sunxi_resets_attach(device_t parent, device_t self, void *aux) 122 { 123 struct sunxi_resets_softc * const sc = device_private(self); 124 struct fdt_attach_args * const faa = aux; 125 const int phandle = faa->faa_phandle; 126 bus_addr_t addr; 127 bus_size_t size; 128 129 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 130 aprint_error(": couldn't get registers\n"); 131 return; 132 } 133 134 sc->sc_dev = self; 135 sc->sc_bst = faa->faa_bst; 136 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 137 aprint_error(": couldn't map registers\n"); 138 return; 139 } 140 141 aprint_naive("\n"); 142 aprint_normal("\n"); 143 144 fdtbus_register_reset_controller(sc->sc_dev, phandle, 145 &sunxi_fdtreset_funcs); 146 } 147 148 CFATTACH_DECL_NEW(sunxi_resets, sizeof(struct sunxi_resets_softc), 149 sunxi_resets_match, sunxi_resets_attach, NULL, NULL); 150