1 /* $NetBSD: sunxi_platform.c,v 1.18 2017/12/23 12:50:55 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include "opt_soc.h" 30 #include "opt_multiprocessor.h" 31 #include "opt_fdt_arm.h" 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: sunxi_platform.c,v 1.18 2017/12/23 12:50:55 jmcneill Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/bus.h> 38 #include <sys/cpu.h> 39 #include <sys/device.h> 40 #include <sys/termios.h> 41 42 #include <dev/fdt/fdtvar.h> 43 #include <arm/fdt/arm_fdtvar.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/bootconfig.h> 48 #include <arm/cpufunc.h> 49 50 #include <arm/cortex/gtmr_var.h> 51 #include <arm/cortex/gic_reg.h> 52 53 #include <dev/ic/ns16550reg.h> 54 #include <dev/ic/comreg.h> 55 56 #include <arm/arm/psci.h> 57 #include <arm/fdt/psci_fdt.h> 58 59 #include <arm/sunxi/sunxi_platform.h> 60 61 #include <libfdt.h> 62 63 #define SUNXI_REF_FREQ 24000000 64 65 #define SUN4I_TIMER_BASE 0x01c20c00 66 #define SUN4I_TIMER_SIZE 0x90 67 #define SUN4I_TIMER_1_CTRL 0x20 68 #define SUN4I_TIMER_1_CTRL_CLK_SRC __BITS(3,2) 69 #define SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M 1 70 #define SUN4I_TIMER_1_CTRL_RELOAD __BIT(1) 71 #define SUN4I_TIMER_1_CTRL_EN __BIT(0) 72 #define SUN4I_TIMER_1_INTV_VALUE 0x24 73 #define SUN4I_TIMER_1_VAL 0x28 74 75 #define SUN4I_WDT_BASE 0x01c20c90 76 #define SUN4I_WDT_SIZE 0x10 77 #define SUN4I_WDT_CTRL 0x00 78 #define SUN4I_WDT_CTRL_KEY (0x333 << 1) 79 #define SUN4I_WDT_CTRL_RESTART __BIT(0) 80 #define SUN4I_WDT_MODE 0x04 81 #define SUN4I_WDT_MODE_RST_EN __BIT(1) 82 #define SUN4I_WDT_MODE_EN __BIT(0) 83 84 #define SUN6I_WDT_BASE 0x01c20ca0 85 #define SUN6I_WDT_SIZE 0x20 86 #define SUN6I_WDT_CFG 0x14 87 #define SUN6I_WDT_CFG_SYS __BIT(0) 88 #define SUN6I_WDT_MODE 0x18 89 #define SUN6I_WDT_MODE_EN __BIT(0) 90 91 #define SUN9I_WDT_BASE 0x06000ca0 92 #define SUN9I_WDT_SIZE 0x20 93 #define SUN9I_WDT_CFG 0x14 94 #define SUN9I_WDT_CFG_SYS __BIT(0) 95 #define SUN9I_WDT_MODE 0x18 96 #define SUN9I_WDT_MODE_EN __BIT(0) 97 98 extern struct bus_space armv7_generic_bs_tag; 99 extern struct bus_space armv7_generic_a4x_bs_tag; 100 extern struct arm32_bus_dma_tag armv7_generic_dma_tag; 101 102 static const struct pmap_devmap * 103 sunxi_platform_devmap(void) 104 { 105 static const struct pmap_devmap devmap[] = { 106 DEVMAP_ENTRY(SUNXI_CORE_VBASE, 107 SUNXI_CORE_PBASE, 108 SUNXI_CORE_SIZE), 109 DEVMAP_ENTRY_END 110 }; 111 112 return devmap; 113 } 114 115 static void 116 sunxi_platform_init_attach_args(struct fdt_attach_args *faa) 117 { 118 faa->faa_bst = &armv7_generic_bs_tag; 119 faa->faa_a4x_bst = &armv7_generic_a4x_bs_tag; 120 faa->faa_dmat = &armv7_generic_dma_tag; 121 } 122 123 static void 124 sunxi_platform_early_putchar(char c) 125 { 126 #ifdef CONSADDR 127 #define CONSADDR_VA ((CONSADDR - SUNXI_CORE_PBASE) + SUNXI_CORE_VBASE) 128 volatile uint32_t *uartaddr = (volatile uint32_t *)CONSADDR_VA; 129 130 while ((le32toh(uartaddr[com_lsr]) & LSR_TXRDY) == 0) 131 ; 132 133 uartaddr[com_data] = htole32(c); 134 #endif 135 } 136 137 static void 138 sunxi_platform_device_register(device_t self, void *aux) 139 { 140 prop_dictionary_t prop = device_properties(self); 141 142 if (device_is_a(self, "rgephy")) { 143 /* Pine64+ gigabit ethernet workaround */ 144 const char * compat[] = { "pine64,pine64-plus", NULL }; 145 if (of_match_compatible(OF_finddevice("/"), compat)) { 146 prop_dictionary_set_bool(prop, "no-rx-delay", true); 147 } 148 } 149 } 150 151 static u_int 152 sunxi_platform_uart_freq(void) 153 { 154 return SUNXI_REF_FREQ; 155 } 156 157 static void 158 sunxi_platform_bootstrap(void) 159 { 160 if (match_bootconf_option(boot_args, "console", "fb")) { 161 void *fdt_data = __UNCONST(fdtbus_get_data()); 162 const int chosen_off = fdt_path_offset(fdt_data, "/chosen"); 163 const int framebuffer_off = 164 fdt_path_offset(fdt_data, "/chosen/framebuffer"); 165 if (chosen_off >= 0 && framebuffer_off >= 0) 166 fdt_setprop_string(fdt_data, chosen_off, "stdout-path", 167 "/chosen/framebuffer"); 168 } 169 } 170 171 static void 172 sunxi_platform_psci_bootstrap(void) 173 { 174 psci_fdt_bootstrap(); 175 sunxi_platform_bootstrap(); 176 } 177 178 static void 179 sun4i_platform_reset(void) 180 { 181 bus_space_tag_t bst = &armv7_generic_bs_tag; 182 bus_space_handle_t bsh; 183 184 bus_space_map(bst, SUN4I_WDT_BASE, SUN4I_WDT_SIZE, 0, &bsh); 185 186 bus_space_write_4(bst, bsh, SUN4I_WDT_CTRL, 187 SUN4I_WDT_CTRL_KEY | SUN4I_WDT_CTRL_RESTART); 188 for (;;) { 189 bus_space_write_4(bst, bsh, SUN4I_WDT_MODE, 190 SUN4I_WDT_MODE_EN | SUN4I_WDT_MODE_RST_EN); 191 } 192 } 193 194 static void 195 sun4i_platform_delay(u_int n) 196 { 197 static bus_space_tag_t bst = &armv7_generic_bs_tag; 198 static bus_space_handle_t bsh = 0; 199 const long incs_per_us = SUNXI_REF_FREQ / 1000000; 200 long ticks = n * incs_per_us; 201 uint32_t cur, prev; 202 203 if (bsh == 0) { 204 bus_space_map(bst, SUN4I_TIMER_BASE, SUN4I_TIMER_SIZE, 0, &bsh); 205 206 /* Enable Timer 1 */ 207 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_INTV_VALUE, ~0U); 208 bus_space_write_4(bst, bsh, SUN4I_TIMER_1_CTRL, 209 SUN4I_TIMER_1_CTRL_EN | 210 SUN4I_TIMER_1_CTRL_RELOAD | 211 __SHIFTIN(SUN4I_TIMER_1_CTRL_CLK_SRC_OSC24M, 212 SUN4I_TIMER_1_CTRL_CLK_SRC)); 213 } 214 215 prev = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 216 while (ticks > 0) { 217 cur = ~bus_space_read_4(bst, bsh, SUN4I_TIMER_1_VAL); 218 if (cur > prev) 219 ticks -= (cur - prev); 220 else 221 ticks -= (~0U - cur + prev); 222 prev = cur; 223 } 224 } 225 226 static void 227 sun6i_platform_reset(void) 228 { 229 bus_space_tag_t bst = &armv7_generic_bs_tag; 230 bus_space_handle_t bsh; 231 232 bus_space_map(bst, SUN6I_WDT_BASE, SUN6I_WDT_SIZE, 0, &bsh); 233 234 bus_space_write_4(bst, bsh, SUN6I_WDT_CFG, SUN6I_WDT_CFG_SYS); 235 bus_space_write_4(bst, bsh, SUN6I_WDT_MODE, SUN6I_WDT_MODE_EN); 236 } 237 238 static void 239 sun9i_platform_reset(void) 240 { 241 bus_space_tag_t bst = &armv7_generic_bs_tag; 242 bus_space_handle_t bsh; 243 244 bus_space_map(bst, SUN9I_WDT_BASE, SUN9I_WDT_SIZE, 0, &bsh); 245 246 bus_space_write_4(bst, bsh, SUN9I_WDT_CFG, SUN9I_WDT_CFG_SYS); 247 bus_space_write_4(bst, bsh, SUN9I_WDT_MODE, SUN9I_WDT_MODE_EN); 248 } 249 250 static const struct arm_platform sun4i_platform = { 251 .devmap = sunxi_platform_devmap, 252 .bootstrap = sunxi_platform_bootstrap, 253 .init_attach_args = sunxi_platform_init_attach_args, 254 .early_putchar = sunxi_platform_early_putchar, 255 .device_register = sunxi_platform_device_register, 256 .reset = sun4i_platform_reset, 257 .delay = sun4i_platform_delay, 258 .uart_freq = sunxi_platform_uart_freq, 259 }; 260 261 ARM_PLATFORM(sun4i_a10, "allwinner,sun4i-a10", &sun4i_platform); 262 263 static const struct arm_platform sun5i_platform = { 264 .devmap = sunxi_platform_devmap, 265 .bootstrap = sunxi_platform_bootstrap, 266 .init_attach_args = sunxi_platform_init_attach_args, 267 .early_putchar = sunxi_platform_early_putchar, 268 .device_register = sunxi_platform_device_register, 269 .reset = sun4i_platform_reset, 270 .delay = sun4i_platform_delay, 271 .uart_freq = sunxi_platform_uart_freq, 272 }; 273 274 ARM_PLATFORM(sun5i_a13, "allwinner,sun5i-a13", &sun5i_platform); 275 ARM_PLATFORM(sun5i_gr8, "nextthing,gr8", &sun5i_platform); 276 277 static const struct arm_platform sun6i_platform = { 278 .devmap = sunxi_platform_devmap, 279 .bootstrap = sunxi_platform_psci_bootstrap, 280 .init_attach_args = sunxi_platform_init_attach_args, 281 .early_putchar = sunxi_platform_early_putchar, 282 .device_register = sunxi_platform_device_register, 283 .reset = sun6i_platform_reset, 284 .delay = gtmr_delay, 285 .uart_freq = sunxi_platform_uart_freq, 286 }; 287 288 ARM_PLATFORM(sun6i_a31, "allwinner,sun6i-a31", &sun6i_platform); 289 290 static const struct arm_platform sun7i_platform = { 291 .devmap = sunxi_platform_devmap, 292 .bootstrap = sunxi_platform_psci_bootstrap, 293 .init_attach_args = sunxi_platform_init_attach_args, 294 .early_putchar = sunxi_platform_early_putchar, 295 .device_register = sunxi_platform_device_register, 296 .reset = sun4i_platform_reset, 297 .delay = sun4i_platform_delay, 298 .uart_freq = sunxi_platform_uart_freq, 299 }; 300 301 ARM_PLATFORM(sun7i_a20, "allwinner,sun7i-a20", &sun7i_platform); 302 303 static const struct arm_platform sun8i_platform = { 304 .devmap = sunxi_platform_devmap, 305 .bootstrap = sunxi_platform_psci_bootstrap, 306 .init_attach_args = sunxi_platform_init_attach_args, 307 .early_putchar = sunxi_platform_early_putchar, 308 .device_register = sunxi_platform_device_register, 309 .reset = sun6i_platform_reset, 310 .delay = gtmr_delay, 311 .uart_freq = sunxi_platform_uart_freq, 312 }; 313 314 ARM_PLATFORM(sun8i_h2plus, "allwinner,sun8i-h2-plus", &sun8i_platform); 315 ARM_PLATFORM(sun8i_h3, "allwinner,sun8i-h3", &sun8i_platform); 316 ARM_PLATFORM(sun8i_a83t, "allwinner,sun8i-a83t", &sun8i_platform); 317 318 static const struct arm_platform sun9i_platform = { 319 .devmap = sunxi_platform_devmap, 320 .bootstrap = sunxi_platform_bootstrap, 321 .init_attach_args = sunxi_platform_init_attach_args, 322 .early_putchar = sunxi_platform_early_putchar, 323 .device_register = sunxi_platform_device_register, 324 .reset = sun9i_platform_reset, 325 .delay = gtmr_delay, 326 .uart_freq = sunxi_platform_uart_freq, 327 }; 328 329 ARM_PLATFORM(sun9i_a80, "allwinner,sun9i-a80", &sun9i_platform); 330 331 static const struct arm_platform sun50i_platform = { 332 .devmap = sunxi_platform_devmap, 333 .bootstrap = sunxi_platform_bootstrap, 334 .init_attach_args = sunxi_platform_init_attach_args, 335 .early_putchar = sunxi_platform_early_putchar, 336 .device_register = sunxi_platform_device_register, 337 .reset = sun6i_platform_reset, 338 .delay = gtmr_delay, 339 .uart_freq = sunxi_platform_uart_freq, 340 }; 341 342 ARM_PLATFORM(sun50i_a64, "allwinner,sun50i-a64", &sun50i_platform); 343 ARM_PLATFORM(sun50i_h5, "allwinner,sun50i-h5", &sun50i_platform); 344