1 /* $NetBSD: sunxi_gmac.c,v 1.2 2017/10/07 19:42:45 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 31 __KERNEL_RCSID(0, "$NetBSD: sunxi_gmac.c,v 1.2 2017/10/07 19:42:45 jmcneill Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/bus.h> 35 #include <sys/device.h> 36 #include <sys/intr.h> 37 #include <sys/systm.h> 38 #include <sys/gpio.h> 39 40 #include <net/if.h> 41 #include <net/if_ether.h> 42 #include <net/if_media.h> 43 44 #include <dev/mii/miivar.h> 45 46 #include <dev/ic/dwc_gmac_var.h> 47 #include <dev/ic/dwc_gmac_reg.h> 48 49 #include <dev/fdt/fdtvar.h> 50 51 #define GMAC_TX_RATE_MII 25000000 52 #define GMAC_TX_RATE_RGMII 125000000 53 54 static const char * compatible[] = { 55 "allwinner,sun7i-a20-gmac", 56 NULL 57 }; 58 59 static int 60 sunxi_gmac_reset(const int phandle) 61 { 62 struct fdtbus_gpio_pin *pin_reset; 63 const u_int *reset_delay_us; 64 bool reset_active_low; 65 int len, val; 66 67 pin_reset = fdtbus_gpio_acquire(phandle, "snps,reset-gpio", GPIO_PIN_OUTPUT); 68 if (pin_reset == NULL) 69 return 0; 70 71 reset_delay_us = fdtbus_get_prop(phandle, "snps,reset-delays-us", &len); 72 if (reset_delay_us == NULL || len != 12) 73 return ENXIO; 74 75 reset_active_low = of_hasprop(phandle, "snps,reset-active-low"); 76 77 val = reset_active_low ? 1 : 0; 78 79 fdtbus_gpio_write(pin_reset, val); 80 delay(be32toh(reset_delay_us[0])); 81 fdtbus_gpio_write(pin_reset, !val); 82 delay(be32toh(reset_delay_us[1])); 83 fdtbus_gpio_write(pin_reset, val); 84 delay(be32toh(reset_delay_us[2])); 85 86 return 0; 87 } 88 89 static int 90 sunxi_gmac_intr(void *arg) 91 { 92 return dwc_gmac_intr(arg); 93 } 94 95 static int 96 sunxi_gmac_match(device_t parent, cfdata_t cf, void *aux) 97 { 98 struct fdt_attach_args * const faa = aux; 99 100 return of_match_compatible(faa->faa_phandle, compatible); 101 } 102 103 static void 104 sunxi_gmac_attach(device_t parent, device_t self, void *aux) 105 { 106 struct dwc_gmac_softc * const sc = device_private(self); 107 struct fdt_attach_args * const faa = aux; 108 const int phandle = faa->faa_phandle; 109 struct clk *clk_gmac, *clk_gmac_tx; 110 struct fdtbus_reset *rst_gmac; 111 const char *phy_mode; 112 char intrstr[128]; 113 bus_addr_t addr; 114 bus_size_t size; 115 116 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 117 aprint_error(": couldn't get registers\n"); 118 return; 119 } 120 121 sc->sc_dev = self; 122 sc->sc_bst = faa->faa_bst; 123 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 124 aprint_error(": couldn't map registers\n"); 125 return; 126 } 127 sc->sc_dmat = faa->faa_dmat; 128 129 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 130 aprint_error(": failed to decode interrupt\n"); 131 return; 132 } 133 134 clk_gmac = fdtbus_clock_get(phandle, "stmmaceth"); 135 clk_gmac_tx = fdtbus_clock_get(phandle, "allwinner_gmac_tx"); 136 if (clk_gmac == NULL || clk_gmac_tx == NULL) { 137 aprint_error(": couldn't get clocks\n"); 138 return; 139 } 140 141 rst_gmac = fdtbus_reset_get(phandle, "stmmaceth"); 142 143 phy_mode = fdtbus_get_string(phandle, "phy-mode"); 144 if (phy_mode == NULL) { 145 aprint_error(": missing 'phy-mode' property\n"); 146 return; 147 } 148 if (strcmp(phy_mode, "mii") == 0) { 149 if (clk_set_rate(clk_gmac_tx, GMAC_TX_RATE_MII) != 0) { 150 aprint_error(": failed to set TX clock rate (MII)\n"); 151 return; 152 } 153 } else if (strcmp(phy_mode, "rgmii") == 0) { 154 if (clk_set_rate(clk_gmac_tx, GMAC_TX_RATE_RGMII) != 0) { 155 aprint_error(": failed to set TX clock rate (RGMII)\n"); 156 return; 157 } 158 } else { 159 aprint_error(": unsupported phy-mode '%s'\n", phy_mode); 160 return; 161 } 162 163 if (clk_enable(clk_gmac_tx) != 0 || clk_enable(clk_gmac) != 0) { 164 aprint_error(": couldn't enable clocks\n"); 165 return; 166 } 167 168 if (rst_gmac != NULL && fdtbus_reset_deassert(rst_gmac) != 0) { 169 aprint_error(": couldn't de-assert reset\n"); 170 return; 171 } 172 173 aprint_naive("\n"); 174 aprint_normal(": GMAC\n"); 175 176 if (fdtbus_intr_establish(phandle, 0, IPL_NET, 0, sunxi_gmac_intr, sc) == NULL) { 177 aprint_error_dev(self, "failed to establish interrupt on %s\n", intrstr); 178 return; 179 } 180 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 181 182 if (sunxi_gmac_reset(phandle) != 0) 183 aprint_error_dev(self, "PHY reset failed\n"); 184 185 dwc_gmac_attach(sc, GMAC_MII_CLK_150_250M_DIV102); 186 } 187 188 CFATTACH_DECL_NEW(sunxi_gmac, sizeof(struct dwc_gmac_softc), 189 sunxi_gmac_match, sunxi_gmac_attach, NULL, NULL); 190