xref: /netbsd-src/sys/arch/arm/sunxi/sunxi_de2_ccu.c (revision cef8759bd76c1b621f8eab8faa6f208faabc2e15)
1 /* $NetBSD: sunxi_de2_ccu.c,v 1.3 2019/01/31 01:49:28 jmcneill Exp $ */
2 
3 /*-
4  * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 
31 __KERNEL_RCSID(1, "$NetBSD: sunxi_de2_ccu.c,v 1.3 2019/01/31 01:49:28 jmcneill Exp $");
32 
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/device.h>
36 #include <sys/systm.h>
37 
38 #include <dev/fdt/fdtvar.h>
39 
40 #include <arm/sunxi/sunxi_ccu.h>
41 #include <arm/sunxi/sunxi_de2_ccu.h>
42 
43 static int sunxi_de2_ccu_match(device_t, cfdata_t, void *);
44 static void sunxi_de2_ccu_attach(device_t, device_t, void *);
45 
46 CFATTACH_DECL_NEW(sunxi_de2ccu, sizeof(struct sunxi_ccu_softc),
47 	sunxi_de2_ccu_match, sunxi_de2_ccu_attach, NULL, NULL);
48 
49 static struct sunxi_ccu_reset sun8i_h3_de2_ccu_resets[] = {
50 	SUNXI_CCU_RESET(DE2_RST_MIXER0, 0x08, 0),
51 	SUNXI_CCU_RESET(DE2_RST_WB, 0x08, 2),
52 };
53 
54 static struct sunxi_ccu_reset sun50i_a64_de2_ccu_resets[] = {
55 	SUNXI_CCU_RESET(DE2_RST_MIXER0, 0x08, 0),
56 	SUNXI_CCU_RESET(DE2_RST_MIXER1, 0x08, 1),
57 	SUNXI_CCU_RESET(DE2_RST_WB, 0x08, 2),
58 };
59 
60 static const char *mod_parents[] = { "mod" };
61 
62 static struct sunxi_ccu_clk sun8i_h3_de2_ccu_clks[] = {
63 	SUNXI_CCU_GATE(DE2_CLK_BUS_MIXER0, "bus-mixer0", "bus", 0x04, 0),
64 	SUNXI_CCU_GATE(DE2_CLK_BUS_MIXER1, "bus-mixer1", "bus", 0x04, 1),
65 	SUNXI_CCU_GATE(DE2_CLK_BUS_WB, "bus-wb", "bus", 0x04, 2),
66 
67 	SUNXI_CCU_DIV(DE2_CLK_MIXER0_DIV, "mixer0-div", mod_parents,
68 	    0x0c, __BITS(3,0), 0, SUNXI_CCU_DIV_SET_RATE_PARENT),
69 	SUNXI_CCU_DIV(DE2_CLK_MIXER1_DIV, "mixer1-div", mod_parents,
70 	    0x0c, __BITS(7,4), 0, SUNXI_CCU_DIV_SET_RATE_PARENT),
71 	SUNXI_CCU_DIV(DE2_CLK_WB_DIV, "wb-div", mod_parents,
72 	    0x0c, __BITS(11,8), 0, SUNXI_CCU_DIV_SET_RATE_PARENT),
73 
74 	SUNXI_CCU_GATE(DE2_CLK_MIXER0, "mixer0", "mixer0-div", 0x00, 0),
75 	SUNXI_CCU_GATE(DE2_CLK_MIXER1, "mixer1", "mixer1-div", 0x00, 1),
76 	SUNXI_CCU_GATE(DE2_CLK_WB, "wb", "wb-div", 0x00, 2),
77 };
78 
79 struct sunxi_de2_ccu_config {
80 	struct sunxi_ccu_reset	*resets;
81 	u_int			nresets;
82 	struct sunxi_ccu_clk	*clks;
83 	u_int			nclks;
84 };
85 
86 static const struct sunxi_de2_ccu_config sun8i_h3_de2_config = {
87 	.resets = sun8i_h3_de2_ccu_resets,
88 	.nresets = __arraycount(sun8i_h3_de2_ccu_resets),
89 	.clks = sun8i_h3_de2_ccu_clks,
90 	.nclks = __arraycount(sun8i_h3_de2_ccu_clks),
91 };
92 
93 static const struct sunxi_de2_ccu_config sun50i_a64_de2_config = {
94 	.resets = sun50i_a64_de2_ccu_resets,
95 	.nresets = __arraycount(sun50i_a64_de2_ccu_resets),
96 	.clks = sun8i_h3_de2_ccu_clks,
97 	.nclks = __arraycount(sun8i_h3_de2_ccu_clks),
98 };
99 
100 static const struct of_compat_data compat_data[] = {
101 	{ "allwinner,sun8i-h3-de2-clk",		(uintptr_t)&sun8i_h3_de2_config },
102 	{ "allwinner,sun50i-a64-de2-clk",	(uintptr_t)&sun50i_a64_de2_config },
103 	{ "allwinner,sun50i-h5-de2-clk",	(uintptr_t)&sun50i_a64_de2_config },
104 	{ NULL }
105 };
106 
107 static int
108 sunxi_de2_ccu_match(device_t parent, cfdata_t cf, void *aux)
109 {
110 	struct fdt_attach_args * const faa = aux;
111 
112 	return of_match_compat_data(faa->faa_phandle, compat_data);
113 }
114 
115 static void
116 sunxi_de2_ccu_attach(device_t parent, device_t self, void *aux)
117 {
118 	struct sunxi_ccu_softc * const sc = device_private(self);
119 	struct fdt_attach_args * const faa = aux;
120 	const int phandle = faa->faa_phandle;
121 	const struct sunxi_de2_ccu_config *conf;
122 	struct clk *clk_bus, *clk_mod;
123 	struct fdtbus_reset *rst;
124 
125 	sc->sc_dev = self;
126 	sc->sc_phandle = phandle;
127 	sc->sc_bst = faa->faa_bst;
128 
129 	conf = (void *)of_search_compatible(phandle, compat_data)->data;
130 
131 	sc->sc_resets = conf->resets;
132 	sc->sc_nresets = conf->nresets;
133 	sc->sc_clks = conf->clks;
134 	sc->sc_nclks = conf->nclks;
135 
136 	clk_bus = fdtbus_clock_get(phandle, "bus");
137 	if (clk_bus == NULL || clk_enable(clk_bus) != 0) {
138 		aprint_error(": couldn't enable bus clock\n");
139 		return;
140 	}
141 	clk_mod = fdtbus_clock_get(phandle, "mod");
142 	if (clk_mod == NULL || clk_enable(clk_mod) != 0) {
143 		aprint_error(": couldn't enable mod clock\n");
144 		return;
145 	}
146 	rst = fdtbus_reset_get_index(phandle, 0);
147 	if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
148 		aprint_error(": couldn't de-assert reset\n");
149 		return;
150 	}
151 
152 	if (sunxi_ccu_attach(sc) != 0)
153 		return;
154 
155 	aprint_naive("\n");
156 	aprint_normal(": DE2 CCU\n");
157 
158 	sunxi_ccu_print(sc);
159 }
160